MPC85xx: Load and enable QE microcode patch in IRAM

For the silicon which doesn't have ROM support in QE, it always needs to load a pre-built ucode binary to IRAM so that QE can work. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>

MPC85xx: Load and enable QE microcode patch in IRAM
For the silicon which doesn't have ROM support in QE, it always needs to load a pre-built ucode binary to IRAM so that QE can work. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
Haiying Wang · Kumar Gala
1 parent 1b3e4044a2
Showing 2 changed files with 10 additions and 0 deletions Side-by-side Diff
drivers/qe/qe.c
drivers/qe/qe.h
@@ -161,6 +161,15 @@
 	/* Init the QE IMMR base */
 	qe_immr = (qe_map_t *)qe_base;
  
+#ifdef CONFIG_SYS_QE_FW_ADDR
+        /* Upload microcode to IRAM for those SOCs which do not have ROM in QE.
+         */
+        qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
+
+        /* enable the microcode in IRAM */
+        out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
+#endif
+
 	gd->mp_alloc_base = QE_DATAONLY_BASE;
 	gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
  
@@ -230,6 +230,7 @@
 /* I-RAM */
 #define QE_IRAM_IADD_AIE	0x80000000	/* Auto Increment Enable */
 #define QE_IRAM_IADD_BADDR	0x00080000	/* Base Address */
+#define QE_IRAM_READY		0x80000000
  
 /* Structure that defines QE firmware binary files.
  *
...	...	@@ -161,6 +161,15 @@
161	161	/* Init the QE IMMR base */
162	162	qe_immr = (qe_map_t *)qe_base;
163	163
	164	+#ifdef CONFIG_SYS_QE_FW_ADDR
	165	+ /* Upload microcode to IRAM for those SOCs which do not have ROM in QE.
	166	+ */
	167	+ qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
	168	+
	169	+ /* enable the microcode in IRAM */
	170	+ out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
	171	+#endif
	172	+
164	173	gd->mp_alloc_base = QE_DATAONLY_BASE;
165	174	gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
166	175
...	...	@@ -230,6 +230,7 @@
230	230	/* I-RAM */
231	231	#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
232	232	#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
	233	+#define QE_IRAM_READY 0x80000000
233	234
234	235	/* Structure that defines QE firmware binary files.
235	236	*