dm: video: Repurpose the 'displayport' uclass to 'display'

The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and LVDS LCD displays. Generalise the uclass so that it can be used with these devices as well. Adjust the uclass to handle the EDID reading and conversion to display_timing internally. Also update nyan-big which is affected by this. Signed-off-by: Simon Glass <sjg@chromium.org>

dm: video: Repurpose the 'displayport' uclass to 'display'
The current DisplayPort uclass is too specific. The operations it provides are shared with other types of output devices, such as HDMI and LVDS LCD displays. Generalise the uclass so that it can be used with these devices as well. Adjust the uclass to handle the EDID reading and conversion to display_timing internally. Also update nyan-big which is affected by this. Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass
1 parent cd9c2070ea
Showing 11 changed files with 143 additions and 119 deletions Side-by-side Diff
configs/nyan-big_defconfig
drivers/video/Kconfig
drivers/video/Makefile
drivers/video/display-uclass.c
drivers/video/dp-uclass.c
drivers/video/tegra124/display.c
drivers/video/tegra124/dp.c
include/display.h
include/displayport.h
include/dm/uclass-id.h
include/edid.h
@@ -25,7 +25,7 @@
 CONFIG_TPM_TIS_INFINEON=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-CONFIG_DISPLAY_PORT=y
+CONFIG_DISPLAY=y
 CONFIG_VIDEO_TEGRA124=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_TPM=y
@@ -293,12 +293,15 @@
 	option takes a string in the format understood by 'name_to_gpio'
 	function, e.g. PH1 for pin 1 of port H.
  
-config DISPLAY_PORT
-	bool "Enable DisplayPort support"
+config DISPLAY
+	bool "Enable Display support"
+	depends on DM
+	default y
 	help
-	   eDP (Embedded DisplayPort) is a standard widely used in laptops
-	   to drive LCD panels. This framework provides support for enabling
-	   these displays where supported by the video hardware.
+	   This supports drivers that provide a display, such as eDP (Embedded
+	   DisplayPort) and HDMI (High Definition Multimedia Interface).
+	   The devices provide a simple interface to start up the display,
+	   read display information and enable it.
  
 config VIDEO_SANDBOX_SDL
 	bool "Enable sandbox video console using SDL"
@@ -6,7 +6,7 @@
 #
  
 ifdef CONFIG_DM
-obj-$(CONFIG_DISPLAY_PORT) += dp-uclass.o
+obj-$(CONFIG_DISPLAY) += display-uclass.o
 obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
 obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
 obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o console_normal.o
+/*
+ * Copyright 2014 Google Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <display.h>
+#include <edid.h>
+#include <errno.h>
+
+int display_read_edid(struct udevice *dev, u8 *buf, int buf_size)
+{
+	struct dm_display_ops *ops = display_get_ops(dev);
+
+	if (!ops || !ops->read_edid)
+		return -ENOSYS;
+	return ops->read_edid(dev, buf, buf_size);
+}
+
+int display_enable(struct udevice *dev, int panel_bpp,
+			const struct display_timing *timing)
+{
+	struct dm_display_ops *ops = display_get_ops(dev);
+
+	if (!ops || !ops->enable)
+		return -ENOSYS;
+	return ops->enable(dev, panel_bpp, timing);
+}
+
+int display_read_timing(struct udevice *dev, struct display_timing *timing)
+{
+	struct dm_display_ops *ops = display_get_ops(dev);
+	int panel_bits_per_colour;
+	u8 buf[EDID_EXT_SIZE];
+	int ret;
+
+	if (!ops || !ops->read_edid)
+		return -ENOSYS;
+	ret = ops->read_edid(dev, buf, sizeof(buf));
+	if (ret < 0)
+		return ret;
+
+	return edid_get_timing(buf, ret, timing, &panel_bits_per_colour);
+}
+
+UCLASS_DRIVER(display) = {
+	.id		= UCLASS_DISPLAY,
+	.name		= "display",
+	.per_device_platdata_auto_alloc_size	= sizeof(struct display_plat),
+};
-/*
- * Copyright 2014 Google Inc.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <displayport.h>
-#include <errno.h>
-
-int display_port_read_edid(struct udevice *dev, u8 *buf, int buf_size)
-{
-	struct dm_display_port_ops *ops = display_port_get_ops(dev);
-
-	if (!ops || !ops->read_edid)
-		return -ENOSYS;
-	return ops->read_edid(dev, buf, buf_size);
-}
-
-int display_port_enable(struct udevice *dev, int panel_bpp,
-			const struct display_timing *timing)
-{
-	struct dm_display_port_ops *ops = display_port_get_ops(dev);
-
-	if (!ops || !ops->enable)
-		return -ENOSYS;
-	return ops->enable(dev, panel_bpp, timing);
-}
-
-UCLASS_DRIVER(display_port) = {
-	.id		= UCLASS_DISPLAY_PORT,
-	.name		= "display_port",
-};
@@ -10,7 +10,7 @@
 #include <dm.h>
 #include <edid.h>
 #include <errno.h>
-#include <displayport.h>
+#include <display.h>
 #include <edid.h>
 #include <fdtdec.h>
 #include <lcd.h>
  
  
@@ -324,20 +324,12 @@
 					   int *panel_bppp,
 					   struct display_timing *timing)
 {
-	u8 buf[EDID_SIZE];
-	int bpc, ret;
+	int ret;
  
-	ret = display_port_read_edid(dp_dev, buf, sizeof(buf));
-	if (ret < 0)
-		return ret;
-	ret = edid_get_timing(buf, ret, timing, &bpc);
+	ret = display_read_timing(dp_dev, timing);
 	if (ret)
 		return ret;
  
-	/* Use this information if valid */
-	if (bpc != -1)
-		*panel_bppp = bpc * 3;
-
 	return 0;
 }
  
@@ -398,7 +390,7 @@
 	int node;
 	int ret;
  
-	ret = uclass_get_device(UCLASS_DISPLAY_PORT, 0, &dp_dev);
+	ret = uclass_get_device(UCLASS_DISPLAY, 0, &dp_dev);
 	if (ret)
 		return ret;
  
@@ -450,7 +442,7 @@
 	}
  
 	/* Enable dp */
-	ret = display_port_enable(dp_dev, panel_bpp, timing);
+	ret = display_enable(dp_dev, panel_bpp, timing);
 	if (ret)
 		return ret;
  
@@ -6,16 +6,17 @@
  */
  
 #include <common.h>
-#include <displayport.h>
+#include <display.h>
 #include <dm.h>
 #include <div64.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/dc.h>
-#include "displayport.h"
+#include "display.h"
 #include "edid.h"
 #include "sor.h"
+#include "displayport.h"
  
 DECLARE_GLOBAL_DATA_PTR;
  
@@ -1573,7 +1574,7 @@
 				     buf_size, &aux_stat);
 }
  
-static const struct dm_display_port_ops dp_tegra_ops = {
+static const struct dm_display_ops dp_tegra_ops = {
 	.read_edid = tegra_dp_read_edid,
 	.enable = tegra_dp_enable,
 };
@@ -1596,7 +1597,7 @@
  
 U_BOOT_DRIVER(dp_tegra) = {
 	.name	= "dpaux_tegra",
-	.id	= UCLASS_DISPLAY_PORT,
+	.id	= UCLASS_DISPLAY,
 	.of_match = tegra_dp_ids,
 	.ofdata_to_platdata = tegra_dp_ofdata_to_platdata,
 	.probe	= dp_tegra_probe,
+/*
+ * Copyright 2014 Google Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _DISPLAY_H
+#define _DISPLAY_H
+
+struct udevice;
+struct display_timing;
+
+/**
+ * Display uclass platform data for each device
+ *
+ * @source_id:	ID for the source of the display data, typically a video
+ * controller
+ * @src_dev:	Source device providing the video
+ */
+struct display_plat {
+	int source_id;
+	struct udevice *src_dev;
+};
+
+/**
+ * display_read_timing() - Read timing information from EDID
+ *
+ * @dev:	Device to read from
+ * @return 0 if OK, -ve on error
+ */
+int display_read_timing(struct udevice *dev, struct display_timing *timing);
+
+/**
+ * display_port_enable() - Enable a display port device
+ *
+ * @dev:	Device to enable
+ * @panel_bpp:	Number of bits per pixel for panel
+ * @timing:	Display timings
+ * @return 0 if OK, -ve on error
+ */
+int display_enable(struct udevice *dev, int panel_bpp,
+		   const struct display_timing *timing);
+
+struct dm_display_ops {
+	/**
+	 * read_edid() - Read information from EDID
+	 *
+	 * @dev:	Device to read from
+	 * @buf:	Buffer to read into (should be EDID_SIZE bytes)
+	 * @buf_size:	Buffer size (should be EDID_SIZE)
+	 * @return number of bytes read, <=0 for error
+	 */
+	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);
+
+	/**
+	 * enable() - Enable the display port device
+	 *
+	 * @dev:	Device to enable
+	 * @panel_bpp:	Number of bits per pixel for panel
+	 * @timing:	Display timings
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*enable)(struct udevice *dev, int panel_bpp,
+		      const struct display_timing *timing);
+};
+
+#define display_get_ops(dev)	((struct dm_display_ops *)(dev)->driver->ops)
+
+#endif
-/*
- * Copyright 2014 Google Inc.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef _DISPLAYPORT_H
-#define _DISPLAYPORT_H
-
-struct udevice;
-struct display_timing;
-
-/**
- * display_port_read_edid() - Read information from EDID
- *
- * @dev:	Device to read from
- * @buf:	Buffer to read into (should be EDID_SIZE bytes)
- * @buf_size:	Buffer size (should be EDID_SIZE)
- * @return number of bytes read, <=0 for error
- */
-int display_port_read_edid(struct udevice *dev, u8 *buf, int buf_size);
-
-/**
- * display_port_enable() - Enable a display port device
- *
- * @dev:	Device to enable
- * @panel_bpp:	Number of bits per pixel for panel
- * @timing:	Display timings
- * @return 0 if OK, -ve on error
- */
-int display_port_enable(struct udevice *dev, int panel_bpp,
-			const struct display_timing *timing);
-
-struct dm_display_port_ops {
-	/**
-	 * read_edid() - Read information from EDID
-	 *
-	 * @dev:	Device to read from
-	 * @buf:	Buffer to read into (should be EDID_SIZE bytes)
-	 * @buf_size:	Buffer size (should be EDID_SIZE)
-	 * @return number of bytes read, <=0 for error
-	 */
-	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);
-
-	/**
-	 * enable() - Enable the display port device
-	 *
-	 * @dev:	Device to enable
-	 * @panel_bpp:	Number of bits per pixel for panel
-	 * @timing:	Display timings
-	 * @return 0 if OK, -ve on error
-	 */
-	int (*enable)(struct udevice *dev, int panel_bpp,
-		      const struct display_timing *timing);
-};
-
-#define display_port_get_ops(dev)	\
-	((struct dm_display_port_ops *)(dev)->driver->ops)
-
-#endif
@@ -29,7 +29,7 @@
 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
 	UCLASS_CPU,		/* CPU, typically part of an SoC */
 	UCLASS_CROS_EC,		/* Chrome OS EC */
-	UCLASS_DISPLAY_PORT,	/* Display port video */
+	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_RAM,		/* RAM controller */
 	UCLASS_ETH,		/* Ethernet device */
 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
@@ -17,6 +17,7 @@
  
 /* Size of the EDID data */
 #define EDID_SIZE	128
+#define EDID_EXT_SIZE	256
  
 #define GET_BIT(_x, _pos) \
 	(((_x) >> (_pos)) & 1)
...	...	@@ -25,7 +25,7 @@
25	25	CONFIG_TPM_TIS_INFINEON=y
26	26	CONFIG_USB=y
27	27	CONFIG_DM_USB=y
28		-CONFIG_DISPLAY_PORT=y
	28	+CONFIG_DISPLAY=y
29	29	CONFIG_VIDEO_TEGRA124=y
30	30	CONFIG_USE_PRIVATE_LIBGCC=y
31	31	CONFIG_TPM=y
...	...	@@ -293,12 +293,15 @@
293	293	option takes a string in the format understood by 'name_to_gpio'
294	294	function, e.g. PH1 for pin 1 of port H.
295	295
296		-config DISPLAY_PORT
297		- bool "Enable DisplayPort support"
	296	+config DISPLAY
	297	+ bool "Enable Display support"
	298	+ depends on DM
	299	+ default y
298	300	help
299		- eDP (Embedded DisplayPort) is a standard widely used in laptops
300		- to drive LCD panels. This framework provides support for enabling
301		- these displays where supported by the video hardware.
	301	+ This supports drivers that provide a display, such as eDP (Embedded
	302	+ DisplayPort) and HDMI (High Definition Multimedia Interface).
	303	+ The devices provide a simple interface to start up the display,
	304	+ read display information and enable it.
302	305
303	306	config VIDEO_SANDBOX_SDL
304	307	bool "Enable sandbox video console using SDL"
...	...	@@ -6,7 +6,7 @@
6	6	#
7	7
8	8	ifdef CONFIG_DM
9		-obj-$(CONFIG_DISPLAY_PORT) += dp-uclass.o
	9	+obj-$(CONFIG_DISPLAY) += display-uclass.o
10	10	obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
11	11	obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
12	12	obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o console_normal.o
	1	+/*
	2	+ * Copyright 2014 Google Inc.
	3	+ *
	4	+ * SPDX-License-Identifier: GPL-2.0+
	5	+ */
	6	+
	7	+#include <common.h>
	8	+#include <dm.h>
	9	+#include <display.h>
	10	+#include <edid.h>
	11	+#include <errno.h>
	12	+
	13	+int display_read_edid(struct udevice dev, u8 buf, int buf_size)
	14	+{
	15	+ struct dm_display_ops *ops = display_get_ops(dev);
	16	+
	17	+ if (!ops \|\| !ops->read_edid)
	18	+ return -ENOSYS;
	19	+ return ops->read_edid(dev, buf, buf_size);
	20	+}
	21	+
	22	+int display_enable(struct udevice *dev, int panel_bpp,
	23	+ const struct display_timing *timing)
	24	+{
	25	+ struct dm_display_ops *ops = display_get_ops(dev);
	26	+
	27	+ if (!ops \|\| !ops->enable)
	28	+ return -ENOSYS;
	29	+ return ops->enable(dev, panel_bpp, timing);
	30	+}
	31	+
	32	+int display_read_timing(struct udevice dev, struct display_timing timing)
	33	+{
	34	+ struct dm_display_ops *ops = display_get_ops(dev);
	35	+ int panel_bits_per_colour;
	36	+ u8 buf[EDID_EXT_SIZE];
	37	+ int ret;
	38	+
	39	+ if (!ops \|\| !ops->read_edid)
	40	+ return -ENOSYS;
	41	+ ret = ops->read_edid(dev, buf, sizeof(buf));
	42	+ if (ret < 0)
	43	+ return ret;
	44	+
	45	+ return edid_get_timing(buf, ret, timing, &panel_bits_per_colour);
	46	+}
	47	+
	48	+UCLASS_DRIVER(display) = {
	49	+ .id = UCLASS_DISPLAY,
	50	+ .name = "display",
	51	+ .per_device_platdata_auto_alloc_size = sizeof(struct display_plat),
	52	+};
1		-/*
2		- * Copyright 2014 Google Inc.
3		- *
4		- * SPDX-License-Identifier: GPL-2.0+
5		- */
6		-
7		-#include <common.h>
8		-#include <dm.h>
9		-#include <displayport.h>
10		-#include <errno.h>
11		-
12		-int display_port_read_edid(struct udevice dev, u8 buf, int buf_size)
13		-{
14		- struct dm_display_port_ops *ops = display_port_get_ops(dev);
15		-
16		- if (!ops \|\| !ops->read_edid)
17		- return -ENOSYS;
18		- return ops->read_edid(dev, buf, buf_size);
19		-}
20		-
21		-int display_port_enable(struct udevice *dev, int panel_bpp,
22		- const struct display_timing *timing)
23		-{
24		- struct dm_display_port_ops *ops = display_port_get_ops(dev);
25		-
26		- if (!ops \|\| !ops->enable)
27		- return -ENOSYS;
28		- return ops->enable(dev, panel_bpp, timing);
29		-}
30		-
31		-UCLASS_DRIVER(display_port) = {
32		- .id = UCLASS_DISPLAY_PORT,
33		- .name = "display_port",
34		-};
...	...	@@ -10,7 +10,7 @@
10	10	#include <dm.h>
11	11	#include <edid.h>
12	12	#include <errno.h>
13		-#include <displayport.h>
	13	+#include <display.h>
14	14	#include <edid.h>
15	15	#include <fdtdec.h>
16	16	#include <lcd.h>
17	17
18	18
...	...	@@ -324,20 +324,12 @@
324	324	int *panel_bppp,
325	325	struct display_timing *timing)
326	326	{
327		- u8 buf[EDID_SIZE];
328		- int bpc, ret;
	327	+ int ret;
329	328
330		- ret = display_port_read_edid(dp_dev, buf, sizeof(buf));
331		- if (ret < 0)
332		- return ret;
333		- ret = edid_get_timing(buf, ret, timing, &bpc);
	329	+ ret = display_read_timing(dp_dev, timing);
334	330	if (ret)
335	331	return ret;
336	332
337		- /* Use this information if valid */
338		- if (bpc != -1)
339		- panel_bppp = bpc 3;
340		-
341	333	return 0;
342	334	}
343	335
...	...	@@ -398,7 +390,7 @@
398	390	int node;
399	391	int ret;
400	392
401		- ret = uclass_get_device(UCLASS_DISPLAY_PORT, 0, &dp_dev);
	393	+ ret = uclass_get_device(UCLASS_DISPLAY, 0, &dp_dev);
402	394	if (ret)
403	395	return ret;
404	396
...	...	@@ -450,7 +442,7 @@
450	442	}
451	443
452	444	/* Enable dp */
453		- ret = display_port_enable(dp_dev, panel_bpp, timing);
	445	+ ret = display_enable(dp_dev, panel_bpp, timing);
454	446	if (ret)
455	447	return ret;
456	448
...	...	@@ -6,16 +6,17 @@
6	6	*/
7	7
8	8	#include <common.h>
9		-#include <displayport.h>
	9	+#include <display.h>
10	10	#include <dm.h>
11	11	#include <div64.h>
12	12	#include <errno.h>
13	13	#include <fdtdec.h>
14	14	#include <asm/io.h>
15	15	#include <asm/arch-tegra/dc.h>
16		-#include "displayport.h"
	16	+#include "display.h"
17	17	#include "edid.h"
18	18	#include "sor.h"
	19	+#include "displayport.h"
19	20
20	21	DECLARE_GLOBAL_DATA_PTR;
21	22
...	...	@@ -1573,7 +1574,7 @@
1573	1574	buf_size, &aux_stat);
1574	1575	}
1575	1576
1576		-static const struct dm_display_port_ops dp_tegra_ops = {
	1577	+static const struct dm_display_ops dp_tegra_ops = {
1577	1578	.read_edid = tegra_dp_read_edid,
1578	1579	.enable = tegra_dp_enable,
1579	1580	};
...	...	@@ -1596,7 +1597,7 @@
1596	1597
1597	1598	U_BOOT_DRIVER(dp_tegra) = {
1598	1599	.name = "dpaux_tegra",
1599		- .id = UCLASS_DISPLAY_PORT,
	1600	+ .id = UCLASS_DISPLAY,
1600	1601	.of_match = tegra_dp_ids,
1601	1602	.ofdata_to_platdata = tegra_dp_ofdata_to_platdata,
1602	1603	.probe = dp_tegra_probe,
...	...	@@ -29,7 +29,7 @@
29	29	UCLASS_CLK, /* Clock source, e.g. used by peripherals */
30	30	UCLASS_CPU, /* CPU, typically part of an SoC */
31	31	UCLASS_CROS_EC, /* Chrome OS EC */
32		- UCLASS_DISPLAY_PORT, /* Display port video */
	32	+ UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
33	33	UCLASS_RAM, /* RAM controller */
34	34	UCLASS_ETH, /* Ethernet device */
35	35	UCLASS_GPIO, /* Bank of general-purpose I/O pins */
...	...	@@ -17,6 +17,7 @@
17	17
18	18	/* Size of the EDID data */
19	19	#define EDID_SIZE 128
	20	+#define EDID_EXT_SIZE 256
20	21
21	22	#define GET_BIT(_x, _pos) \
22	23	(((_x) >> (_pos)) & 1)