Commit 2e88bb28d8061286d2f1cabcac224df15b941b82

Authored by Kun-Hua Huang
Committed by Tom Rini
1 parent 14006a5671

NDS32: Generic Board Support and Unsupport

Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>

Showing 14 changed files with 104 additions and 427 deletions Side-by-side Diff

... ... @@ -56,6 +56,8 @@
56 56  
57 57 config NDS32
58 58 bool "NDS32 architecture"
  59 + select HAVE_GENERIC_BOARD
  60 + select SYS_GENERIC_BOARD
59 61  
60 62 config NIOS2
61 63 bool "Nios II architecture"
arch/nds32/cpu/n1213/Makefile
... ... @@ -12,5 +12,4 @@
12 12 extra-y = start.o
13 13  
14 14 obj-$(if $(filter ag101,$(SOC)),y) += ag101/
15   -obj-$(if $(filter ag102,$(SOC)),y) += ag102/
arch/nds32/cpu/n1213/ag101/lowlevel_init.S
... ... @@ -205,8 +205,8 @@
205 205 * Remapping
206 206 */
207 207 led 0x1a
208   - write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001100
209   - write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001140
  208 + write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001800
  209 + write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001880
210 210  
211 211 /* clear empty BSR registers */
212 212 led 0x1b
... ... @@ -272,7 +272,11 @@
272 272 */
273 273 led 0x1c
274 274 write32 SDMC_B0_BSR_A, 0x00001000
275   - write32 SDMC_B1_BSR_A, 0x00001040
  275 + write32 SDMC_B1_BSR_A, 0x00001200
  276 + li $r5, CONFIG_SYS_TEXT_BASE /* flash base address */
  277 + add $r11, $r11, $r5 /* add flash address offset for ret */
  278 + add $r10, $r10, $r5
  279 + move $lp, $r11
276 280 setbf15 AHBC_CR_A, FTAHBC020S_CR_REMAP ! 0x1
277 281  
278 282 /*
279 283  
... ... @@ -282,9 +286,9 @@
282 286 li $r5, AHBC_BSR6_A
283 287 lwi $r6, [$r5]
284 288 li $r4, 0xfff0ffff
285   - and $r6 ,$r4 , $r6
  289 + and $r6 ,$r4, $r6
286 290 li $r4, 0x000b0000
287   - or $r6, $r4, $r6
  291 + or $r6, $r4, $r6
288 292 swi $r6, [$r5]
289 293  
290 294 /*
... ... @@ -299,7 +303,7 @@
299 303 or $r5, $r5, $r6
300 304 swi $r5, [$r4]
301 305 #endif /* #ifdef CONFIG_MEM_REMAP */
302   - move $lp, $r11
  306 + move $lp, $r11
303 307 2:
304 308 ret
305 309  
arch/nds32/cpu/n1213/start.S
... ... @@ -153,8 +153,11 @@
153 153 * $sp must be 8-byte alignment for ABI compliance.
154 154 */
155 155 call_board_init_f:
156   - li $sp, CONFIG_SYS_INIT_SP_ADDR
157   - li $r0, 0x00000000
  156 + li $sp, CONFIG_SYS_INIT_SP_ADDR
  157 + li $r10, GD_SIZE /* get GD size */
  158 + sub $sp, $sp, $r10 /* GD start addr */
  159 + move $r10, $sp
  160 + li $r0, 0x00000000
158 161  
159 162 #ifdef __PIC__
160 163 #ifdef __NDS32_N1213_43U1H__
arch/nds32/include/asm/u-boot.h
... ... @@ -30,6 +30,7 @@
30 30 unsigned long bi_flashstart; /* start of FLASH memory */
31 31 unsigned long bi_flashsize; /* size of FLASH memory */
32 32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
  33 + unsigned char bi_enetaddr[6];
33 34  
34 35 struct /* RAM configuration */
35 36 {
arch/nds32/lib/Makefile
... ... @@ -9,7 +9,6 @@
9 9 # SPDX-License-Identifier: GPL-2.0+
10 10 #
11 11  
12   -obj-y += board.o
13 12 obj-y += cache.o
14 13 obj-$(CONFIG_CMD_BOOTM) += bootm.o
15 14 obj-y += interrupts.o
arch/nds32/lib/board.c
1   -/*
2   - * (C) Copyright 2002-2006
3   - * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   - *
5   - * Copyright (C) 2011 Andes Technology Corporation
6   - * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
7   - * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
8   - *
9   - * SPDX-License-Identifier: GPL-2.0+
10   - */
11   -
12   -#include <common.h>
13   -#include <command.h>
14   -#include <malloc.h>
15   -#include <stdio_dev.h>
16   -#include <timestamp.h>
17   -#include <version.h>
18   -#include <net.h>
19   -#include <serial.h>
20   -#include <nand.h>
21   -#include <onenand_uboot.h>
22   -#include <mmc.h>
23   -#include <asm/sections.h>
24   -
25   -DECLARE_GLOBAL_DATA_PTR;
26   -
27   -#if defined(CONFIG_SYS_I2C)
28   -#include <i2c.h>
29   -#endif
30   -
31   -ulong monitor_flash_len;
32   -
33   -/*
34   - * Init Utilities
35   - */
36   -
37   -#if !defined(CONFIG_BAUDRATE)
38   -#define CONFIG_BAUDRATE 38400
39   -#endif
40   -static int init_baudrate(void)
41   -{
42   - gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
43   - return 0;
44   -}
45   -
46   -/*
47   - * WARNING: this code looks "cleaner" than the PowerPC version, but
48   - * has the disadvantage that you either get nothing, or everything.
49   - * On PowerPC, you might see "DRAM: " before the system hangs - which
50   - * gives a simple yet clear indication which part of the
51   - * initialization if failing.
52   - */
53   -static int display_dram_config(void)
54   -{
55   - int i;
56   -
57   -#ifdef DEBUG
58   - puts("RAM Configuration:\n");
59   -
60   - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
61   - printf("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
62   - print_size(gd->bd->bi_dram[i].size, "\n");
63   - }
64   -#else
65   - ulong size = 0;
66   -
67   - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
68   - size += gd->bd->bi_dram[i].size;
69   -
70   - puts("DRAM: ");
71   - print_size(size, "\n");
72   -#endif
73   -
74   - return 0;
75   -}
76   -
77   -#ifndef CONFIG_SYS_NO_FLASH
78   -static void display_flash_config(ulong size)
79   -{
80   - puts("Flash: ");
81   - print_size(size, "\n");
82   -}
83   -#endif /* CONFIG_SYS_NO_FLASH */
84   -
85   -#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
86   -#include <pci.h>
87   -static int nds32_pci_init(void)
88   -{
89   - pci_init();
90   - return 0;
91   -}
92   -#endif /* CONFIG_CMD_PCI || CONFIG_PCI */
93   -
94   -#if defined(CONFIG_PMU) || defined(CONFIG_PCU)
95   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
96   -static int pmu_init(void)
97   -{
98   -#if defined(CONFIG_FTPMU010_POWER)
99   -#ifdef __NDS32_N1213_43U1H__ /* AG101: internal definition in toolchain */
100   - ftpmu010_sdram_clk_disable(CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS);
101   - ftpmu010_mfpsr_select_dev(FTPMU010_MFPSR_AC97CLKSEL);
102   - ftpmu010_sdramhtc_set(CONFIG_SYS_FTPMU010_SDRAMHTC);
103   -#endif /* __NDS32_N1213_43U1H__ */
104   -#endif
105   - return 0;
106   -}
107   -#endif
108   -#endif
109   -
110   -/*
111   - * Breathe some life into the board...
112   - *
113   - * Initialize a serial port as console, and carry out some hardware
114   - * tests.
115   - *
116   - * The first part of initialization is running from Flash memory;
117   - * its main purpose is to initialize the RAM so that we
118   - * can relocate the monitor code to RAM.
119   - */
120   -
121   -/*
122   - * All attempts to come up with a "common" initialization sequence
123   - * that works for all boards and architectures failed: some of the
124   - * requirements are just _too_ different. To get rid of the resulting
125   - * mess of board dependent #ifdef'ed code we now make the whole
126   - * initialization sequence configurable to the user.
127   - *
128   - * The requirements for any new initalization function is simple: it
129   - * receives a pointer to the "global data" structure as it's only
130   - * argument, and returns an integer return code, where 0 means
131   - * "continue" and != 0 means "fatal error, hang the system".
132   - */
133   -typedef int (init_fnc_t)(void);
134   -
135   -void __dram_init_banksize(void)
136   -{
137   - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
138   - gd->bd->bi_dram[0].size = gd->ram_size;
139   -}
140   -void dram_init_banksize(void)
141   - __attribute__((weak, alias("__dram_init_banksize")));
142   -
143   -init_fnc_t *init_sequence[] = {
144   -#if defined(CONFIG_ARCH_CPU_INIT)
145   - arch_cpu_init, /* basic arch cpu dependent setup */
146   -#endif
147   -#if defined(CONFIG_PMU) || defined(CONFIG_PCU)
148   -#ifndef CONFIG_SKIP_LOWLEVEL_INIT
149   - pmu_init,
150   -#endif
151   -#endif
152   - board_init, /* basic board dependent setup */
153   -#if defined(CONFIG_USE_IRQ)
154   - interrupt_init, /* set up exceptions */
155   -#endif
156   - timer_init, /* initialize timer */
157   - env_init, /* initialize environment */
158   - init_baudrate, /* initialze baudrate settings */
159   - serial_init, /* serial communications setup */
160   - console_init_f, /* stage 1 init of console */
161   -#if defined(CONFIG_DISPLAY_BOARDINFO)
162   - checkboard, /* display board info */
163   -#endif
164   -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
165   - init_func_i2c,
166   -#endif
167   - dram_init, /* configure available RAM banks */
168   - display_dram_config,
169   - NULL,
170   -};
171   -
172   -void board_init_f(ulong bootflag)
173   -{
174   - bd_t *bd;
175   - init_fnc_t **init_fnc_ptr;
176   - gd_t *id;
177   - ulong addr, addr_sp;
178   -
179   - /* Pointer is writable since we allocated a register for it */
180   - gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07);
181   -
182   - memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
183   -
184   - gd->mon_len = (unsigned int)(&__bss_end) - (unsigned int)(&_start);
185   -
186   - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
187   - if ((*init_fnc_ptr)() != 0)
188   - hang();
189   - }
190   -
191   - debug("monitor len: %08lX\n", gd->mon_len);
192   - /*
193   - * Ram is setup, size stored in gd !!
194   - */
195   - debug("ramsize: %08lX\n", gd->ram_size);
196   -
197   - addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
198   -
199   - /* round down to next 4 kB limit */
200   - addr &= ~(4096 - 1);
201   - debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
202   -
203   -#ifdef CONFIG_LCD
204   -#ifdef CONFIG_FB_ADDR
205   - gd->fb_base = CONFIG_FB_ADDR;
206   -#else
207   - /* reserve memory for LCD display (always full pages) */
208   - addr = lcd_setmem(addr);
209   - gd->fb_base = addr;
210   -#endif /* CONFIG_FB_ADDR */
211   -#endif /* CONFIG_LCD */
212   -
213   - /*
214   - * reserve memory for U-Boot code, data & bss
215   - * round down to next 4 kB limit
216   - */
217   - addr -= gd->mon_len;
218   - addr &= ~(4096 - 1);
219   -
220   - debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr);
221   -
222   - /*
223   - * reserve memory for malloc() arena
224   - */
225   - addr_sp = addr - TOTAL_MALLOC_LEN;
226   - debug("Reserving %dk for malloc() at: %08lx\n",
227   - TOTAL_MALLOC_LEN >> 10, addr_sp);
228   - /*
229   - * (permanently) allocate a Board Info struct
230   - * and a permanent copy of the "global" data
231   - */
232   - addr_sp -= GENERATED_BD_INFO_SIZE;
233   - bd = (bd_t *) addr_sp;
234   - gd->bd = bd;
235   - memset((void *)bd, 0, GENERATED_BD_INFO_SIZE);
236   - debug("Reserving %zu Bytes for Board Info at: %08lx\n",
237   - GENERATED_BD_INFO_SIZE, addr_sp);
238   -
239   - addr_sp -= GENERATED_GBL_DATA_SIZE;
240   - id = (gd_t *) addr_sp;
241   - debug("Reserving %zu Bytes for Global Data at: %08lx\n",
242   - GENERATED_GBL_DATA_SIZE, addr_sp);
243   -
244   - /* setup stackpointer for exeptions */
245   - gd->irq_sp = addr_sp;
246   -#ifdef CONFIG_USE_IRQ
247   - addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
248   - debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
249   - CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp);
250   -#endif
251   - /* leave 3 words for abort-stack */
252   - addr_sp -= 12;
253   -
254   - /* 8-byte alignment for ABI compliance */
255   - addr_sp &= ~0x07;
256   - debug("New Stack Pointer is: %08lx\n", addr_sp);
257   -
258   - /* Ram isn't board specific, so move it to board code ... */
259   - dram_init_banksize();
260   - display_dram_config(); /* and display it */
261   -
262   - gd->relocaddr = addr;
263   - gd->start_addr_sp = addr_sp;
264   -
265   - gd->reloc_off = addr - _TEXT_BASE;
266   -
267   - debug("relocation Offset is: %08lx\n", gd->reloc_off);
268   - memcpy(id, (void *)gd, GENERATED_GBL_DATA_SIZE);
269   -
270   - relocate_code(addr_sp, id, addr);
271   -
272   - /* NOTREACHED - relocate_code() does not return */
273   -}
274   -
275   -/*
276   - * This is the next part if the initialization sequence: we are now
277   - * running from RAM and have a "normal" C environment, i. e. global
278   - * data can be written, BSS has been cleared, the stack size in not
279   - * that critical any more, etc.
280   - */
281   -void board_init_r(gd_t *id, ulong dest_addr)
282   -{
283   - bd_t *bd;
284   - ulong malloc_start;
285   -
286   - gd = id;
287   - bd = gd->bd;
288   -
289   - gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
290   -
291   - monitor_flash_len = (ulong)&_end - (ulong)&_start;
292   - debug("monitor flash len: %08lX\n", monitor_flash_len);
293   -
294   - board_init(); /* Setup chipselects */
295   -
296   -#if defined(CONFIG_NEEDS_MANUAL_RELOC)
297   - /*
298   - * We have to relocate the command table manually
299   - */
300   - fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
301   - ll_entry_count(cmd_tbl_t, cmd));
302   -#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
303   -
304   - serial_initialize();
305   -
306   - debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
307   -
308   - /* The Malloc area is immediately below the monitor copy in DRAM */
309   - malloc_start = dest_addr - TOTAL_MALLOC_LEN;
310   - mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
311   -
312   -#ifndef CONFIG_SYS_NO_FLASH
313   - /* configure available FLASH banks */
314   - gd->bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
315   - gd->bd->bi_flashsize = flash_init();
316   - gd->bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + gd->bd->bi_flashsize;
317   -
318   - if (gd->bd->bi_flashsize)
319   - display_flash_config(gd->bd->bi_flashsize);
320   -#endif /* CONFIG_SYS_NO_FLASH */
321   -
322   -#if defined(CONFIG_CMD_NAND)
323   - puts("NAND: ");
324   - nand_init(); /* go init the NAND */
325   -#endif
326   -
327   -#if defined(CONFIG_CMD_IDE)
328   - puts("IDE: ");
329   - ide_init();
330   -#endif
331   -
332   -#ifdef CONFIG_GENERIC_MMC
333   - puts("MMC: ");
334   - mmc_initialize(gd->bd);
335   -#endif
336   -
337   -#if defined(CONFIG_SYS_I2C_ADAPTERS)
338   - i2c_reloc_fixup();
339   -#endif
340   -
341   - /* initialize environment */
342   - env_relocate();
343   -
344   -#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
345   - puts("PCI: ");
346   - nds32_pci_init();
347   -#endif
348   -
349   - stdio_init(); /* get the devices list going. */
350   -
351   - jumptable_init();
352   -
353   -#if defined(CONFIG_API)
354   - /* Initialize API */
355   - api_init();
356   -#endif
357   -
358   - console_init_r(); /* fully init console as a device */
359   -
360   -#if defined(CONFIG_ARCH_MISC_INIT)
361   - /* miscellaneous arch dependent initialisations */
362   - arch_misc_init();
363   -#endif
364   -#if defined(CONFIG_MISC_INIT_R)
365   - /* miscellaneous platform dependent initialisations */
366   - misc_init_r();
367   -#endif
368   -
369   -#if defined(CONFIG_USE_IRQ)
370   - /* set up exceptions */
371   - interrupt_init();
372   - /* enable exceptions */
373   - enable_interrupts();
374   -#endif
375   -
376   - /* Initialize from environment */
377   - load_addr = getenv_ulong("loadaddr", 16, load_addr);
378   -
379   -#ifdef CONFIG_BOARD_LATE_INIT
380   - board_late_init();
381   -#endif
382   -
383   -#if defined(CONFIG_CMD_NET)
384   - puts("Net: ");
385   -
386   - eth_initialize();
387   -#if defined(CONFIG_RESET_PHY_R)
388   - debug("Reset Ethernet PHY\n");
389   - reset_phy();
390   -#endif
391   -#endif
392   -
393   - /* main_loop() can return to retry autoboot, if so just run it again. */
394   - for (;;)
395   - main_loop();
396   -
397   - /* NOTREACHED - no way out of command loop except booting */
398   -}
arch/nds32/lib/interrupts.c
... ... @@ -35,6 +35,10 @@
35 35  
36 36 #ifdef CONFIG_USE_INTERRUPT
37 37  
  38 +int interrupt_init(void)
  39 +{
  40 + return 0;
  41 +}
38 42 /* enable interrupts */
39 43 void enable_interrupts(void)
40 44 {
board/AndesTech/adp-ag101p/adp-ag101p.c
... ... @@ -28,7 +28,6 @@
28 28 gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
29 29 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
30 30  
31   - ftsmc020_init(); /* initialize Flash */
32 31 return 0;
33 32 }
34 33  
... ... @@ -272,6 +272,8 @@
272 272 gd->mon_len = (ulong)&_end - (ulong)_init;
273 273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
274 274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  275 +#elif defined(CONFIG_NDS32)
  276 + gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
275 277 #else
276 278 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 279 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
... ... @@ -792,7 +794,8 @@
792 794 /* TODO: can we rename this to timer_init()? */
793 795 init_timebase,
794 796 #endif
795   -#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
  797 +#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
  798 + defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
796 799 timer_init, /* initialize timer */
797 800 #endif
798 801 #ifdef CONFIG_SYS_ALLOC_DPRAM
... ... @@ -858,7 +861,8 @@
858 861 #endif
859 862 announce_dram_init,
860 863 /* TODO: unify all these dram functions? */
861   -#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
  864 +#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
  865 + defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
862 866 dram_init, /* configure available RAM banks */
863 867 #endif
864 868 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
... ... @@ -132,6 +132,8 @@
132 132 {
133 133 #ifdef __ARM__
134 134 monitor_flash_len = _end - __image_copy_start;
  135 +#elif defined(CONFIG_NDS32)
  136 + monitor_flash_len = (ulong)&_end - (ulong)&_start;
135 137 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
136 138 monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
137 139 #endif
... ... @@ -711,7 +713,7 @@
711 713 #ifdef CONFIG_DM
712 714 initr_dm,
713 715 #endif
714   -#ifdef CONFIG_ARM
  716 +#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
715 717 board_init, /* Setup chipselects */
716 718 #endif
717 719 /*
... ... @@ -445,7 +445,7 @@
445 445 ulong addr;
446 446  
447 447 addr = (ulong)(cmdtp->cmd) + gd->reloc_off;
448   -#if DEBUG_COMMANDS
  448 +#ifdef DEBUG_COMMANDS
449 449 printf("Command \"%s\": 0x%08lx => 0x%08lx\n",
450 450 cmdtp->name, (ulong)(cmdtp->cmd), addr);
451 451 #endif
  1 +Andes Technology SoC AG101P
  2 +===========================
  3 +
  4 +AG101P is the mainline SoC produced by Andes Technology using N1213 CPU core
  5 +with FPU and DDR contoller support.
  6 +AG101P has integrated both AHB and APB bus and many periphals for application
  7 +and product development.
  8 +
  9 +ADP-AG101P
  10 +=========
  11 +
  12 +ADP-AG101P is the SoC with AG101 hardcore CPU.
  13 +
  14 +Configurations
  15 +==============
  16 +
  17 +CONFIG_MEM_REMAP:
  18 + Doing memory remap is essential for preparing some non-OS or RTOS
  19 + applications.
  20 +
  21 +CONFIG_SKIP_LOWLEVEL_INIT:
  22 + If you want to boot this system from SPI ROM and bypass e-bios (the
  23 + other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
  24 + in "include/configs/adp-ag101p.h".
  25 +
  26 +Build and boot steps
  27 +====================
  28 +
  29 +build:
  30 +1. Prepare the toolchains and make sure the $PATH to toolchains is correct.
  31 +2. Use `make adp-ag101p_defconfig` in u-boot root to build the image.
  32 +
  33 +Burn u-boot to SPI ROM:
  34 +====================
  35 +
  36 +This section will be added later.
include/configs/adp-ag101p.h
... ... @@ -20,22 +20,29 @@
20 20  
21 21 #define CONFIG_SKIP_LOWLEVEL_INIT
22 22  
  23 +#define CONFIG_SYS_GENERIC_GLOBAL_DATA
  24 +
23 25 /*
24 26 * Definitions related to passing arguments to kernel.
25 27 */
26 28 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
27 29 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
28 30 #define CONFIG_INITRD_TAG /* send initrd params */
  31 +#define CONFIG_NEEDS_MANUAL_RELOC
29 32  
30 33 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
31 34 #define CONFIG_MEM_REMAP
32 35 #endif
33 36  
34 37 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
35   -#define CONFIG_SYS_TEXT_BASE 0x03200000
  38 +#define CONFIG_SYS_TEXT_BASE 0x00500000
36 39 #else
  40 +#ifdef CONFIG_MEM_REMAP
  41 +#define CONFIG_SYS_TEXT_BASE 0x80000000
  42 +#else
37 43 #define CONFIG_SYS_TEXT_BASE 0x00000000
38 44 #endif
  45 +#endif
39 46  
40 47 /*
41 48 * Timer
42 49  
43 50  
44 51  
45 52  
... ... @@ -225,21 +232,34 @@
225 232 /*
226 233 * Physical Memory Map
227 234 */
228   -#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT)
229   -#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
230   -#if defined(CONFIG_MEM_REMAP)
231   -#define PHYS_SDRAM_0_AT_INIT 0x10000000 /* SDRAM Bank #1 before remap*/
  235 +#ifdef CONFIG_SKIP_LOWLEVEL_INIT
  236 +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
  237 +#else
  238 +#ifdef CONFIG_MEM_REMAP
  239 +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
  240 +#else
  241 +#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */
232 242 #endif
233   -#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
234   -#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */
235 243 #endif
  244 +
236 245 #define PHYS_SDRAM_1 \
237 246 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
238 247  
239 248 #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */
240   -#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */
241   -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
242 249  
  250 +#ifdef CONFIG_SKIP_LOWLEVEL_INIT
  251 +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
  252 +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
  253 +#else
  254 +#ifdef CONFIG_MEM_REMAP
  255 +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
  256 +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
  257 +#else
  258 +#define PHYS_SDRAM_0_SIZE 0x08000000 /* 128 MB */
  259 +#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
  260 +#endif
  261 +#endif
  262 +
243 263 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
244 264  
245 265 #ifdef CONFIG_MEM_REMAP
246 266  
247 267  
248 268  
... ... @@ -318,19 +338,20 @@
318 338  
319 339 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
320 340 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  341 +#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
321 342  
322 343 /* support JEDEC */
323 344  
324 345 /* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
325 346 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
326   -#define PHYS_FLASH_1 0x80400000 /* BANK 1 */
327   -#else /* !CONFIG_SKIP_LOWLEVEL_INIT */
  347 +#define PHYS_FLASH_1 0x80000000 /* BANK 0 */
  348 +#else
328 349 #ifdef CONFIG_MEM_REMAP
329 350 #define PHYS_FLASH_1 0x80000000 /* BANK 0 */
330 351 #else
331 352 #define PHYS_FLASH_1 0x00000000 /* BANK 0 */
  353 +#endif
332 354 #endif /* CONFIG_MEM_REMAP */
333   -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
334 355  
335 356 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
336 357 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
337 358  
338 359  
... ... @@ -345,11 +366,12 @@
345 366 * but we have only 1 bank connected to flash on board
346 367 */
347 368 #define CONFIG_SYS_MAX_FLASH_BANKS 1
  369 +#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
348 370  
349 371 /* max number of sectors on one chip */
350   -#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2*2)
  372 +#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
351 373 #define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE
352   -#define CONFIG_SYS_MAX_FLASH_SECT 128
  374 +#define CONFIG_SYS_MAX_FLASH_SECT 512
353 375  
354 376 /* environments */
355 377 #define CONFIG_ENV_IS_IN_FLASH