Eric Lee / smarc-uboot

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Commit 2e91e2025c1bb5ab3769aa21677c423aefb2c0ea

Authored by Kever Yang
1 parent 8e5c8571fe
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

rockchip: rk3328: migrate u-boot node to -u-boot.dtsi 

Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

Showing 5 changed files with 66 additions and 85 deletions Side-by-side Diff

arch/arm/dts/rk3328-evb-u-boot.dtsi
Diff comments   View file @ 2e91e20
1 1 // SPDX-License-Identifier: GPL-2.0+
2 2 /*
3   - * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  3 + * (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
4 4 */
5 5  
  6 +#include "rk3328-u-boot.dtsi"
6 7 #include "rk3328-sdram-ddr3-666.dtsi"
7 8  
8   -/ {
9   - aliases {
10   - mmc0 = &emmc;
11   - mmc1 = &sdmmc;
12   - };
13   -
14   - chosen {
15   - u-boot,spl-boot-order = &emmc, &sdmmc;
16   - };
17   -};
18   -
19   -&cru {
20   - u-boot,dm-pre-reloc;
21   -};
22   -
23   -&uart2 {
24   - u-boot,dm-pre-reloc;
25   -};
26   -
27   -&emmc {
28   - u-boot,dm-pre-reloc;
29   -};
30   -
31   -&sdmmc {
32   - u-boot,dm-pre-reloc;
  9 +&usb_host0_xhci {
  10 + vbus-supply = <&vcc5v0_host_xhci>;
  11 + status = "okay";
33 12 };
arch/arm/dts/rk3328-evb.dts
Diff comments   View file @ 2e91e20
... ... @@ -116,11 +116,6 @@
116 116 status = "okay";
117 117 };
118 118  
119   -&usb_host0_xhci {
120   - vbus-supply = <&vcc5v0_host_xhci>;
121   - status = "okay";
122   -};
123   -
124 119 &i2c1 {
125 120 clock-frequency = <400000>;
126 121 i2c-scl-rising-time-ns = <168>;
arch/arm/dts/rk3328-rock64-u-boot.dtsi
Diff comments   View file @ 2e91e20
  1 +// SPDX-License-Identifier: GPL-2.0+
1 2 /*
2   - * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
  3 + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
5 4 */
6 5  
  6 +#include "rk3328-u-boot.dtsi"
7 7 #include "rk3328-sdram-lpddr3-1600.dtsi"
8   -
9   -/ {
10   - aliases {
11   - mmc0 = &emmc;
12   - mmc1 = &sdmmc;
13   - };
14   -
15   - chosen {
16   - u-boot,spl-boot-order = &emmc, &sdmmc;
17   - };
18   -};
19   -
20   -&cru {
21   - u-boot,dm-pre-reloc;
22   -};
23   -
24   -&uart2 {
25   - u-boot,dm-pre-reloc;
26   -};
27   -
28   -&emmc {
29   - u-boot,dm-pre-reloc;
30   -};
31   -
32   -&sdmmc {
33   - u-boot,dm-pre-reloc;
34   -};
35 8  
36 9 &usb_host0_xhci {
37 10 status = "okay";
arch/arm/dts/rk3328-u-boot.dtsi
Diff comments   View file @ 2e91e20
  1 +// SPDX-License-Identifier: GPL-2.0+
  2 +/*
  3 + * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  4 + */
  5 +
  6 +/ {
  7 + aliases {
  8 + mmc0 = &emmc;
  9 + mmc1 = &sdmmc;
  10 + };
  11 +
  12 + chosen {
  13 + u-boot,spl-boot-order = &emmc, &sdmmc;
  14 + };
  15 +
  16 + dmc: dmc {
  17 + u-boot,dm-pre-reloc;
  18 + compatible = "rockchip,rk3328-dmc";
  19 + reg = <0x0 0xff400000 0x0 0x1000
  20 + 0x0 0xff780000 0x0 0x3000
  21 + 0x0 0xff100000 0x0 0x1000
  22 + 0x0 0xff440000 0x0 0x1000
  23 + 0x0 0xff720000 0x0 0x1000
  24 + 0x0 0xff798000 0x0 0x1000>;
  25 + };
  26 +
  27 + usb_host0_xhci: usb@ff600000 {
  28 + compatible = "rockchip,rk3328-xhci";
  29 + reg = <0x0 0xff600000 0x0 0x100000>;
  30 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
  31 + snps,dis-enblslpm-quirk;
  32 + snps,phyif-utmi-bits = <16>;
  33 + snps,dis-u2-freeclk-exists-quirk;
  34 + snps,dis-u2-susphy-quirk;
  35 + status = "disabled";
  36 + };
  37 +};
  38 +
  39 +&cru {
  40 + u-boot,dm-pre-reloc;
  41 +};
  42 +
  43 +&grf {
  44 + u-boot,dm-pre-reloc;
  45 +};
  46 +
  47 +&uart2 {
  48 + u-boot,dm-pre-reloc;
  49 + clock-frequency = <24000000>;
  50 +};
  51 +
  52 +&emmc {
  53 + u-boot,dm-pre-reloc;
  54 +};
  55 +
  56 +&sdmmc {
  57 + u-boot,dm-pre-reloc;
  58 +};
arch/arm/dts/rk3328.dtsi
Diff comments   View file @ 2e91e20
... ... @@ -186,7 +186,6 @@
186 186 };
187 187  
188 188 grf: syscon@ff100000 {
189   - u-boot,dm-pre-reloc;
190 189 compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
191 190 reg = <0x0 0xff100000 0x0 0x1000>;
192 191  
... ... @@ -232,7 +231,6 @@
232 231 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
233 232 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
234 233 clock-names = "baudclk", "apb_pclk";
235   - clock-frequency = <24000000>;
236 234 reg-shift = <2>;
237 235 reg-io-width = <4>;
238 236 dmas = <&dmac 6>, <&dmac 7>;
... ... @@ -351,17 +349,6 @@
351 349 status = "disabled";
352 350 };
353 351  
354   - dmc: dmc {
355   - u-boot,dm-pre-reloc;
356   - compatible = "rockchip,rk3328-dmc";
357   - reg = <0x0 0xff400000 0x0 0x1000
358   - 0x0 0xff780000 0x0 0x3000
359   - 0x0 0xff100000 0x0 0x1000
360   - 0x0 0xff440000 0x0 0x1000
361   - 0x0 0xff720000 0x0 0x1000
362   - 0x0 0xff798000 0x0 0x1000>;
363   - };
364   -
365 352 cru: clock-controller@ff440000 {
366 353 compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
367 354 reg = <0x0 0xff440000 0x0 0x1000>;
... ... @@ -509,17 +496,6 @@
509 496 clock-names = "biu", "ciu";
510 497 fifo-depth = <0x100>;
511 498 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
512   - status = "disabled";
513   - };
514   -
515   - usb_host0_xhci: usb@ff600000 {
516   - compatible = "rockchip,rk3328-xhci";
517   - reg = <0x0 0xff600000 0x0 0x100000>;
518   - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
519   - snps,dis-enblslpm-quirk;
520   - snps,phyif-utmi-bits = <16>;
521   - snps,dis-u2-freeclk-exists-quirk;
522   - snps,dis-u2-susphy-quirk;
523 499 status = "disabled";
524 500 };
525 501