Eric Lee / smarc-uboot

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Commit 2f439e805e945b410b0043db82f9666eb03914ba

Authored by Ruchika Gupta
Committed by Kumar Gala
1 parent 550a249211
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH 

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>

Showing 2 changed files with 19 additions and 2 deletions Side-by-side Diff

... ... @@ -568,13 +568,19 @@
568 568 MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT
569 569 MPC8572DS_NAND powerpc mpc85xx mpc8572ds freescale - MPC8572DS:NAND
570 570 P1010RDB_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB
  571 +P1010RDB_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SECURE_BOOT
571 572 P1010RDB_36BIT_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT
  573 +P1010RDB_36BIT_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SECURE_BOOT
572 574 P1010RDB_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND
  575 +P1010RDB_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND_SECBOOT,SECURE_BOOT
573 576 P1010RDB_36BIT_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND
  577 +P1010RDB_36BIT_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT
574 578 P1010RDB_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SDCARD
575 579 P1010RDB_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH
  580 +P1010RDB_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH,SECURE_BOOT
576 581 P1010RDB_36BIT_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SDCARD
577 582 P1010RDB_36BIT_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH
  583 +P1010RDB_36BIT_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH,SECURE_BOOT
578 584 P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB
579 585 P1011RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT
580 586 P1011RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT,SDCARD
include/configs/P1010RDB.h
Diff comments   View file @ 2f439e8
... ... @@ -59,6 +59,13 @@
59 59 #endif /* CONFIG_NAND_SPL */
60 60 #endif
61 61  
  62 +
  63 +#ifdef CONFIG_NAND_SECBOOT /* NAND Boot */
  64 +#define CONFIG_RAMBOOT_NAND
  65 +#define CONFIG_SYS_TEXT_BASE 0x11000000
  66 +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
  67 +#endif
  68 +
62 69 #ifndef CONFIG_SYS_TEXT_BASE
63 70 #define CONFIG_SYS_TEXT_BASE 0xeff80000
64 71 #endif
... ... @@ -345,7 +352,7 @@
345 352 #define CONFIG_SYS_NAND_DDR_LAW 11
346 353  
347 354 /* Set up IFC registers for boot location NOR/NAND */
348   -#ifdef CONFIG_NAND_U_BOOT
  355 +#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SECBOOT)
349 356 #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
350 357 #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
351 358 #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
... ... @@ -501,7 +508,7 @@
501 508 * SPI interface will not be available in case of NAND boot SPI CS0 will be
502 509 * used for SLIC
503 510 */
504   -#ifndef CONFIG_NAND_U_BOOT
  511 +#if !defined(CONFIG_NAND_U_BOOT) || !defined(CONFIG_NAND_SECBOOT)
505 512 /* eSPI - Enhanced SPI */
506 513 #define CONFIG_FSL_ESPI
507 514 #define CONFIG_SPI_FLASH
... ... @@ -761,6 +768,10 @@
761 768 "bootm $loadaddr $ramdiskaddr $fdtaddr"
762 769  
763 770 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
  771 +
  772 +#ifdef CONFIG_SECURE_BOOT
  773 +#include <asm/fsl_secure_boot.h>
  774 +#endif
764 775  
765 776 #endif /* __CONFIG_H */