Commit 31193c2cca272d8e661b28b9e8492949c9dd7309
1 parent
ab379df353
Exists in
master
and in
54 other branches
HUB405 board update
Showing 2 changed files with 70 additions and 16 deletions Side-by-side Diff
board/esd/hub405/Makefile
board/esd/hub405/hub405.c
... | ... | @@ -26,9 +26,10 @@ |
26 | 26 | #include <command.h> |
27 | 27 | #include <malloc.h> |
28 | 28 | |
29 | -/* ------------------------------------------------------------------------- */ | |
30 | 29 | |
30 | +extern void lxt971_no_sleep(void); | |
31 | 31 | |
32 | + | |
32 | 33 | int board_early_init_f (void) |
33 | 34 | { |
34 | 35 | /* |
... | ... | @@ -60,8 +61,6 @@ |
60 | 61 | } |
61 | 62 | |
62 | 63 | |
63 | -/* ------------------------------------------------------------------------- */ | |
64 | - | |
65 | 64 | int misc_init_f (void) |
66 | 65 | { |
67 | 66 | return 0; /* dummy implementation */ |
68 | 67 | |
... | ... | @@ -74,16 +73,12 @@ |
74 | 73 | volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); |
75 | 74 | volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); |
76 | 75 | volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); |
76 | + volatile unsigned char *led_reg = (unsigned char *)((ulong)DUART0_BA + 0x20); | |
77 | + unsigned long val; | |
78 | + int delay, flashcnt; | |
79 | + char *str; | |
77 | 80 | |
78 | 81 | /* |
79 | - * Reset external DUARTs | |
80 | - */ | |
81 | - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ | |
82 | - udelay(10); /* wait 10us */ | |
83 | - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ | |
84 | - udelay(1000); /* wait 1ms */ | |
85 | - | |
86 | - /* | |
87 | 82 | * Enable interrupts in exar duart mcr[3] |
88 | 83 | */ |
89 | 84 | *duart0_mcr = 0x08; |
90 | 85 | |
... | ... | @@ -91,12 +86,70 @@ |
91 | 86 | *duart2_mcr = 0x08; |
92 | 87 | *duart3_mcr = 0x08; |
93 | 88 | |
89 | + /* | |
90 | + * Set RS232/RS422 control (RS232 = high on GPIO) | |
91 | + */ | |
92 | + val = in32(GPIO0_OR); | |
93 | + val &= ~(CFG_UART2_RS232 | CFG_UART3_RS232 | CFG_UART4_RS232 | CFG_UART5_RS232); | |
94 | + | |
95 | + str = getenv("phys0"); | |
96 | + if (!str || (str && (str[0] == '0'))) | |
97 | + val |= CFG_UART2_RS232; | |
98 | + | |
99 | + str = getenv("phys1"); | |
100 | + if (!str || (str && (str[0] == '0'))) | |
101 | + val |= CFG_UART3_RS232; | |
102 | + | |
103 | + str = getenv("phys2"); | |
104 | + if (!str || (str && (str[0] == '0'))) | |
105 | + val |= CFG_UART4_RS232; | |
106 | + | |
107 | + str = getenv("phys3"); | |
108 | + if (!str || (str && (str[0] == '0'))) | |
109 | + val |= CFG_UART5_RS232; | |
110 | + | |
111 | + out32(GPIO0_OR, val); | |
112 | + | |
94 | 113 | /* |
95 | 114 | * Set NAND-FLASH GPIO signals to default |
96 | 115 | */ |
97 | 116 | out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); |
98 | 117 | out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE); |
99 | 118 | |
119 | + /* | |
120 | + * check board type and setup AP power | |
121 | + */ | |
122 | + str = getenv("bd_type"); /* this is only set on non prototype hardware */ | |
123 | + if (str != NULL) { | |
124 | + if ((strcmp(str, "swch405") == 0) || (strcmp(str, "hub405") == 0)) { | |
125 | + unsigned char led_reg_default = 0; | |
126 | + str = getenv("ap_pwr"); | |
127 | + if (!str || (str && (str[0] == '1'))) | |
128 | + led_reg_default = 0x04 | 0x02 ; /* U2_LED | AP_PWR */ | |
129 | + | |
130 | + /* | |
131 | + * Flash LEDs on SWCH405 | |
132 | + */ | |
133 | + for (flashcnt = 0; flashcnt < 3; flashcnt++) { | |
134 | + *led_reg = led_reg_default; /* LED_A..D off */ | |
135 | + for (delay = 0; delay < 100; delay++) | |
136 | + udelay(1000); | |
137 | + *led_reg = led_reg_default | 0xf0; /* LED_A..D on */ | |
138 | + for (delay = 0; delay < 50; delay++) | |
139 | + udelay(1000); | |
140 | + } | |
141 | + *led_reg = led_reg_default; | |
142 | + } | |
143 | + } | |
144 | + | |
145 | + /* | |
146 | + * Reset external DUARTs | |
147 | + */ | |
148 | + out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ | |
149 | + udelay(10); /* wait 10us */ | |
150 | + out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ | |
151 | + udelay(1000); /* wait 1ms */ | |
152 | + | |
100 | 153 | return (0); |
101 | 154 | } |
102 | 155 | |
... | ... | @@ -104,7 +157,6 @@ |
104 | 157 | /* |
105 | 158 | * Check Board Identity: |
106 | 159 | */ |
107 | - | |
108 | 160 | int checkboard (void) |
109 | 161 | { |
110 | 162 | unsigned char str[64]; |
111 | 163 | |
... | ... | @@ -120,10 +172,14 @@ |
120 | 172 | |
121 | 173 | putc ('\n'); |
122 | 174 | |
175 | + /* | |
176 | + * Disable sleep mode in LXT971 | |
177 | + */ | |
178 | + lxt971_no_sleep(); | |
179 | + | |
123 | 180 | return 0; |
124 | 181 | } |
125 | 182 | |
126 | -/* ------------------------------------------------------------------------- */ | |
127 | 183 | |
128 | 184 | long int initdram (int board_type) |
129 | 185 | { |
... | ... | @@ -140,7 +196,6 @@ |
140 | 196 | return (4*1024*1024 << ((val & 0x000e0000) >> 17)); |
141 | 197 | } |
142 | 198 | |
143 | -/* ------------------------------------------------------------------------- */ | |
144 | 199 | |
145 | 200 | int testdram (void) |
146 | 201 | { |
... | ... | @@ -150,7 +205,6 @@ |
150 | 205 | return (0); |
151 | 206 | } |
152 | 207 | |
153 | -/* ------------------------------------------------------------------------- */ | |
154 | 208 | |
155 | 209 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
156 | 210 | #include <linux/mtd/nand.h> |