Eric Lee / smarc-uboot

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Commit 36bf57b6fb37089510b6dcfa6487dc5e2445c9f2

Authored by Masahiro Yamada
Committed by Tom Rini
1 parent bb3aef9caa
Exists in v2017.01-smarct4x and in 40 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

arm: remove lubbock board support 

Enough time has passed since this board was moved to Orphan. Remove.

 - Remove board/lubbock/*
 - Remove include/configs/lubbock.h
 - Cleanup defined(CONFIG_LUBBOCK)
 - Move the entry from boards.cfg to doc/README.scrapyard

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Showing 7 changed files with 1 additions and 744 deletions Side-by-side Diff

board/lubbock/Makefile
View file @ 36bf57b
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# SPDX-License-Identifier: GPL-2.0+
6   -#
7   -
8   -obj-y := lubbock.o flash.o
board/lubbock/flash.c
View file @ 36bf57b
1   -/*
2   - * (C) Copyright 2001
3   - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4   - *
5   - * (C) Copyright 2001
6   - * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7   - *
8   - * SPDX-License-Identifier: GPL-2.0+
9   - */
10   -
11   -#include <common.h>
12   -#include <linux/byteorder/swab.h>
13   -
14   -
15   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
16   -
17   -/* Board support for 1 or 2 flash devices */
18   -#define FLASH_PORT_WIDTH32
19   -#undef FLASH_PORT_WIDTH16
20   -
21   -#ifdef FLASH_PORT_WIDTH16
22   -#define FLASH_PORT_WIDTH ushort
23   -#define FLASH_PORT_WIDTHV vu_short
24   -#define SWAP(x) __swab16(x)
25   -#else
26   -#define FLASH_PORT_WIDTH ulong
27   -#define FLASH_PORT_WIDTHV vu_long
28   -#define SWAP(x) __swab32(x)
29   -#endif
30   -
31   -#define FPW FLASH_PORT_WIDTH
32   -#define FPWV FLASH_PORT_WIDTHV
33   -
34   -#define mb() __asm__ __volatile__ ("" : : : "memory")
35   -
36   -/*-----------------------------------------------------------------------
37   - * Functions
38   - */
39   -static ulong flash_get_size (FPW *addr, flash_info_t *info);
40   -static int write_data (flash_info_t *info, ulong dest, FPW data);
41   -static void flash_get_offsets (ulong base, flash_info_t *info);
42   -void inline spin_wheel (void);
43   -
44   -/*-----------------------------------------------------------------------
45   - */
46   -
47   -unsigned long flash_init (void)
48   -{
49   - int i;
50   - ulong size = 0;
51   -
52   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
53   - switch (i) {
54   - case 0:
55   - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
56   - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
57   - break;
58   - case 1:
59   - flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
60   - flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
61   - break;
62   - default:
63   - panic ("configured too many flash banks!\n");
64   - break;
65   - }
66   - size += flash_info[i].size;
67   - }
68   -
69   - /* Protect monitor and environment sectors
70   - */
71   - flash_protect ( FLAG_PROTECT_SET,
72   - CONFIG_SYS_FLASH_BASE,
73   - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
74   - &flash_info[0] );
75   -
76   - flash_protect ( FLAG_PROTECT_SET,
77   - CONFIG_ENV_ADDR,
78   - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
79   -
80   - return size;
81   -}
82   -
83   -/*-----------------------------------------------------------------------
84   - */
85   -static void flash_get_offsets (ulong base, flash_info_t *info)
86   -{
87   - int i;
88   -
89   - if (info->flash_id == FLASH_UNKNOWN) {
90   - return;
91   - }
92   -
93   - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
94   - for (i = 0; i < info->sector_count; i++) {
95   - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
96   - info->protect[i] = 0;
97   - }
98   - }
99   -}
100   -
101   -/*-----------------------------------------------------------------------
102   - */
103   -void flash_print_info (flash_info_t *info)
104   -{
105   - int i;
106   -
107   - if (info->flash_id == FLASH_UNKNOWN) {
108   - printf ("missing or unknown FLASH type\n");
109   - return;
110   - }
111   -
112   - switch (info->flash_id & FLASH_VENDMASK) {
113   - case FLASH_MAN_INTEL:
114   - printf ("INTEL ");
115   - break;
116   - default:
117   - printf ("Unknown Vendor ");
118   - break;
119   - }
120   -
121   - switch (info->flash_id & FLASH_TYPEMASK) {
122   - case FLASH_28F128J3A:
123   - printf ("28F128J3A\n");
124   - break;
125   - default:
126   - printf ("Unknown Chip Type\n");
127   - break;
128   - }
129   -
130   - printf (" Size: %ld MB in %d Sectors\n",
131   - info->size >> 20, info->sector_count);
132   -
133   - printf (" Sector Start Addresses:");
134   - for (i = 0; i < info->sector_count; ++i) {
135   - if ((i % 5) == 0)
136   - printf ("\n ");
137   - printf (" %08lX%s",
138   - info->start[i],
139   - info->protect[i] ? " (RO)" : " ");
140   - }
141   - printf ("\n");
142   - return;
143   -}
144   -
145   -/*
146   - * The following code cannot be run from FLASH!
147   - */
148   -static ulong flash_get_size (FPW *addr, flash_info_t *info)
149   -{
150   - volatile FPW value;
151   -
152   - /* Write auto select command: read Manufacturer ID */
153   - addr[0x5555] = (FPW) 0x00AA00AA;
154   - addr[0x2AAA] = (FPW) 0x00550055;
155   - addr[0x5555] = (FPW) 0x00900090;
156   -
157   - mb ();
158   - value = addr[0];
159   -
160   - switch (value) {
161   -
162   - case (FPW) INTEL_MANUFACT:
163   - info->flash_id = FLASH_MAN_INTEL;
164   - break;
165   -
166   - default:
167   - info->flash_id = FLASH_UNKNOWN;
168   - info->sector_count = 0;
169   - info->size = 0;
170   - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
171   - return (0); /* no or unknown flash */
172   - }
173   -
174   - mb ();
175   - value = addr[1]; /* device ID */
176   -
177   - switch (value) {
178   -
179   - case (FPW) INTEL_ID_28F128J3A:
180   - info->flash_id += FLASH_28F128J3A;
181   - info->sector_count = 128;
182   - info->size = 0x02000000;
183   - break; /* => 16 MB */
184   -
185   - default:
186   - info->flash_id = FLASH_UNKNOWN;
187   - break;
188   - }
189   -
190   - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
191   - printf ("** ERROR: sector count %d > max (%d) **\n",
192   - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
193   - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
194   - }
195   -
196   - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
197   -
198   - return (info->size);
199   -}
200   -
201   -
202   -/*-----------------------------------------------------------------------
203   - */
204   -
205   -int flash_erase (flash_info_t *info, int s_first, int s_last)
206   -{
207   - int prot, sect;
208   - ulong type, start;
209   - int rcode = 0;
210   -
211   - if ((s_first < 0) || (s_first > s_last)) {
212   - if (info->flash_id == FLASH_UNKNOWN) {
213   - printf ("- missing\n");
214   - } else {
215   - printf ("- no sectors to erase\n");
216   - }
217   - return 1;
218   - }
219   -
220   - type = (info->flash_id & FLASH_VENDMASK);
221   - if ((type != FLASH_MAN_INTEL)) {
222   - printf ("Can't erase unknown flash type %08lx - aborted\n",
223   - info->flash_id);
224   - return 1;
225   - }
226   -
227   - prot = 0;
228   - for (sect = s_first; sect <= s_last; ++sect) {
229   - if (info->protect[sect]) {
230   - prot++;
231   - }
232   - }
233   -
234   - if (prot) {
235   - printf ("- Warning: %d protected sectors will not be erased!\n",
236   - prot);
237   - } else {
238   - printf ("\n");
239   - }
240   -
241   - /* Disable interrupts which might cause a timeout here */
242   - disable_interrupts();
243   -
244   - /* Start erase on unprotected sectors */
245   - for (sect = s_first; sect <= s_last; sect++) {
246   - if (info->protect[sect] == 0) { /* not protected */
247   - FPWV *addr = (FPWV *) (info->start[sect]);
248   - FPW status;
249   -
250   - printf ("Erasing sector %2d ... ", sect);
251   -
252   - /* arm simple, non interrupt dependent timer */
253   - start = get_timer(0);
254   -
255   - *addr = (FPW) 0x00500050; /* clear status register */
256   - *addr = (FPW) 0x00200020; /* erase setup */
257   - *addr = (FPW) 0x00D000D0; /* erase confirm */
258   -
259   - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
260   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
261   - printf ("Timeout\n");
262   - *addr = (FPW) 0x00B000B0; /* suspend erase */
263   - *addr = (FPW) 0x00FF00FF; /* reset to read mode */
264   - rcode = 1;
265   - break;
266   - }
267   - }
268   -
269   - *addr = 0x00500050; /* clear status register cmd. */
270   - *addr = 0x00FF00FF; /* resest to read mode */
271   -
272   - printf (" done\n");
273   - }
274   - }
275   - return rcode;
276   -}
277   -
278   -/*-----------------------------------------------------------------------
279   - * Copy memory to flash, returns:
280   - * 0 - OK
281   - * 1 - write timeout
282   - * 2 - Flash not erased
283   - * 4 - Flash not identified
284   - */
285   -
286   -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
287   -{
288   - ulong cp, wp;
289   - FPW data;
290   - int count, i, l, rc, port_width;
291   -
292   - if (info->flash_id == FLASH_UNKNOWN) {
293   - return 4;
294   - }
295   -/* get lower word aligned address */
296   -#ifdef FLASH_PORT_WIDTH16
297   - wp = (addr & ~1);
298   - port_width = 2;
299   -#else
300   - wp = (addr & ~3);
301   - port_width = 4;
302   -#endif
303   -
304   - /*
305   - * handle unaligned start bytes
306   - */
307   - if ((l = addr - wp) != 0) {
308   - data = 0;
309   - for (i = 0, cp = wp; i < l; ++i, ++cp) {
310   - data = (data << 8) | (*(uchar *) cp);
311   - }
312   - for (; i < port_width && cnt > 0; ++i) {
313   - data = (data << 8) | *src++;
314   - --cnt;
315   - ++cp;
316   - }
317   - for (; cnt == 0 && i < port_width; ++i, ++cp) {
318   - data = (data << 8) | (*(uchar *) cp);
319   - }
320   -
321   - if ((rc = write_data (info, wp, SWAP (data))) != 0) {
322   - return (rc);
323   - }
324   - wp += port_width;
325   - }
326   -
327   - /*
328   - * handle word aligned part
329   - */
330   - count = 0;
331   - while (cnt >= port_width) {
332   - data = 0;
333   - for (i = 0; i < port_width; ++i) {
334   - data = (data << 8) | *src++;
335   - }
336   - if ((rc = write_data (info, wp, SWAP (data))) != 0) {
337   - return (rc);
338   - }
339   - wp += port_width;
340   - cnt -= port_width;
341   - if (count++ > 0x800) {
342   - spin_wheel ();
343   - count = 0;
344   - }
345   - }
346   -
347   - if (cnt == 0) {
348   - return (0);
349   - }
350   -
351   - /*
352   - * handle unaligned tail bytes
353   - */
354   - data = 0;
355   - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
356   - data = (data << 8) | *src++;
357   - --cnt;
358   - }
359   - for (; i < port_width; ++i, ++cp) {
360   - data = (data << 8) | (*(uchar *) cp);
361   - }
362   -
363   - return (write_data (info, wp, SWAP (data)));
364   -}
365   -
366   -/*-----------------------------------------------------------------------
367   - * Write a word or halfword to Flash, returns:
368   - * 0 - OK
369   - * 1 - write timeout
370   - * 2 - Flash not erased
371   - */
372   -static int write_data (flash_info_t *info, ulong dest, FPW data)
373   -{
374   - FPWV *addr = (FPWV *) dest;
375   - ulong status;
376   - ulong start;
377   -
378   - /* Check if Flash is (sufficiently) erased */
379   - if ((*addr & data) != data) {
380   - printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
381   - return (2);
382   - }
383   - /* Disable interrupts which might cause a timeout here */
384   - disable_interrupts();
385   -
386   - *addr = (FPW) 0x00400040; /* write setup */
387   - *addr = data;
388   -
389   - /* arm simple, non interrupt dependent timer */
390   - start = get_timer(0);
391   -
392   - /* wait while polling the status register */
393   - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
394   - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
395   - *addr = (FPW) 0x00FF00FF; /* restore read mode */
396   - return (1);
397   - }
398   - }
399   -
400   - *addr = (FPW) 0x00FF00FF; /* restore read mode */
401   -
402   - return (0);
403   -}
404   -
405   -void inline spin_wheel (void)
406   -{
407   - static int p = 0;
408   - static char w[] = "\\/-";
409   -
410   - printf ("\010%c", w[p]);
411   - (++p == 3) ? (p = 0) : 0;
412   -}
board/lubbock/lubbock.c
View file @ 36bf57b
1   -/*
2   - * (C) Copyright 2002
3   - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4   - *
5   - * (C) Copyright 2002
6   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7   - * Marius Groeger <mgroeger@sysgo.de>
8   - *
9   - * SPDX-License-Identifier: GPL-2.0+
10   - */
11   -
12   -#include <common.h>
13   -#include <netdev.h>
14   -#include <asm/arch/pxa.h>
15   -#include <asm/arch/pxa-regs.h>
16   -#include <asm/arch/regs-mmc.h>
17   -#include <asm/io.h>
18   -
19   -DECLARE_GLOBAL_DATA_PTR;
20   -
21   -/*
22   - * Miscelaneous platform dependent initialisations
23   - */
24   -
25   -int board_init (void)
26   -{
27   - /* We have RAM, disable cache */
28   - dcache_disable();
29   - icache_disable();
30   -
31   - /* arch number of Lubbock-Board */
32   - gd->bd->bi_arch_number = MACH_TYPE_LUBBOCK;
33   -
34   - /* adress of boot parameters */
35   - gd->bd->bi_boot_params = 0xa0000100;
36   -
37   - /* Configure GPIO6 and GPIO8 as OUT, AF1. */
38   - setbits_le32(GPDR0, (1 << 6) | (1 << 8));
39   - clrsetbits_le32(GAFR0_L, (3 << 12) | (3 << 16), (1 << 12) | (1 << 16));
40   -
41   - return 0;
42   -}
43   -
44   -#ifdef CONFIG_CMD_MMC
45   -int board_mmc_init(bd_t *bis)
46   -{
47   - pxa_mmc_register(0);
48   - return 0;
49   -}
50   -#endif
51   -
52   -int board_late_init(void)
53   -{
54   - setenv("stdout", "serial");
55   - setenv("stderr", "serial");
56   - return 0;
57   -}
58   -
59   -int dram_init(void)
60   -{
61   - pxa2xx_dram_init();
62   - gd->ram_size = PHYS_SDRAM_1_SIZE;
63   - return 0;
64   -}
65   -
66   -void dram_init_banksize(void)
67   -{
68   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
69   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
70   -}
71   -
72   -#ifdef CONFIG_CMD_NET
73   -int board_eth_init(bd_t *bis)
74   -{
75   - int rc = 0;
76   -#ifdef CONFIG_LAN91C96
77   - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
78   -#endif
79   - return rc;
80   -}
81   -#endif
... ... @@ -1241,5 +1241,4 @@
1241 1241 # The following were move to "Orphan" in September, 2013
1242 1242 Orphan arm arm1136 mx31 - imx31_phycore imx31_phycore_eet imx31_phycore:IMX31_PHYCORE_EET (resigned) Guennadi Liakhovetski <g.liakhovetski@gmx.de>
1243 1243 Orphan arm arm1136 mx31 freescale - mx31ads - (resigned) Guennadi Liakhovetski <g.liakhovetski@gmx.de>
1244   -Orphan arm pxa - - - lubbock - (dead address) Kyle Harris <kharris@nexus-tech.net>
doc/README.scrapyard
Diff comments   View file @ 36bf57b
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU Commit Removed Last known maintainer/contact
13 13 =================================================================================================
  14 +lubbock arm pxa - 2014-04-04 Kyle Harris <kharris@nexus-tech.net>
14 15 MOUSSE powerpc mpc824x - 2014-04-04
15 16 rsdproto powerpc mpc8260 - 2014-04-04
16 17 RPXsuper powerpc mpc8260 - 2014-04-04
drivers/net/lan91c96.h
Diff comments   View file @ 36bf57b
... ... @@ -58,13 +58,7 @@
58 58  
59 59 #ifdef CONFIG_CPU_PXA25X
60 60  
61   -#ifdef CONFIG_LUBBOCK
62   -#define SMC_IO_SHIFT 2
63   -#undef USE_32_BIT
64   -
65   -#else
66 61 #define SMC_IO_SHIFT 0
67   -#endif
68 62  
69 63 #define SMCREG(edev, r) ((edev)->iobase+((r)<<SMC_IO_SHIFT))
70 64  
include/configs/lubbock.h
View file @ 36bf57b
1   -/*
2   - * (C) Copyright 2002
3   - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4   - *
5   - * (C) Copyright 2002
6   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7   - * Marius Groeger <mgroeger@sysgo.de>
8   - *
9   - * Configuation settings for the LUBBOCK board.
10   - *
11   - * SPDX-License-Identifier: GPL-2.0+
12   - */
13   -
14   -#ifndef __CONFIG_H
15   -#define __CONFIG_H
16   -
17   -/*
18   - * High Level Configuration Options
19   - * (easy to change)
20   - */
21   -#define CONFIG_CPU_PXA25X 1 /* This is an PXA250 CPU */
22   -#define CONFIG_LUBBOCK 1 /* on an LUBBOCK Board */
23   -#define CONFIG_LCD 1
24   -#ifdef CONFIG_LCD
25   -#define CONFIG_PXA_LCD
26   -#define CONFIG_SHARP_LM8V31
27   -#endif
28   -#define CONFIG_MMC
29   -#define CONFIG_BOARD_LATE_INIT
30   -#define CONFIG_DOS_PARTITION
31   -#define CONFIG_SYS_TEXT_BASE 0x0
32   -
33   -/* we will never enable dcache, because we have to setup MMU first */
34   -#define CONFIG_SYS_DCACHE_OFF
35   -
36   -/*
37   - * Size of malloc() pool
38   - */
39   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
40   -
41   -/*
42   - * Hardware drivers
43   - */
44   -#define CONFIG_LAN91C96
45   -#define CONFIG_LAN91C96_BASE 0x0C000000
46   -
47   -/*
48   - * select serial console configuration
49   - */
50   -#define CONFIG_PXA_SERIAL
51   -#define CONFIG_FFUART 1 /* we use FFUART on LUBBOCK */
52   -#define CONFIG_CONS_INDEX 3
53   -
54   -/* allow to overwrite serial and ethaddr */
55   -#define CONFIG_ENV_OVERWRITE
56   -
57   -#define CONFIG_BAUDRATE 115200
58   -
59   -
60   -/*
61   - * BOOTP options
62   - */
63   -#define CONFIG_BOOTP_BOOTFILESIZE
64   -#define CONFIG_BOOTP_BOOTPATH
65   -#define CONFIG_BOOTP_GATEWAY
66   -#define CONFIG_BOOTP_HOSTNAME
67   -
68   -
69   -/*
70   - * Command line configuration.
71   - */
72   -#include <config_cmd_default.h>
73   -
74   -#define CONFIG_CMD_FAT
75   -
76   -
77   -#define CONFIG_BOOTDELAY 3
78   -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
79   -#define CONFIG_NETMASK 255.255.0.0
80   -#define CONFIG_IPADDR 192.168.0.21
81   -#define CONFIG_SERVERIP 192.168.0.250
82   -#define CONFIG_BOOTCOMMAND "bootm 80000"
83   -#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
84   -#define CONFIG_CMDLINE_TAG
85   -#define CONFIG_TIMESTAMP
86   -
87   -#if defined(CONFIG_CMD_KGDB)
88   -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
89   -#endif
90   -
91   -/*
92   - * Miscellaneous configurable options
93   - */
94   -#define CONFIG_SYS_HUSH_PARSER 1
95   -
96   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
97   -#ifdef CONFIG_SYS_HUSH_PARSER
98   -#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
99   -#else
100   -#endif
101   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
102   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
103   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
104   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
105   -#define CONFIG_SYS_DEVICE_NULLDEV 1
106   -
107   -#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
108   -#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
109   -
110   -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
111   -
112   -#define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
113   -
114   -#ifdef CONFIG_MMC
115   -#define CONFIG_GENERIC_MMC
116   -#define CONFIG_PXA_MMC_GENERIC
117   -#define CONFIG_CMD_MMC
118   -#define CONFIG_SYS_MMC_BASE 0xF0000000
119   -#endif
120   -
121   -/*
122   - * Physical Memory Map
123   - */
124   -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
125   -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
126   -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
127   -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
128   -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
129   -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
130   -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
131   -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
132   -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
133   -
134   -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
135   -#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
136   -#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
137   -#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */
138   -#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
139   -
140   -#define CONFIG_SYS_DRAM_BASE 0xa0000000
141   -#define CONFIG_SYS_DRAM_SIZE 0x04000000
142   -
143   -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
144   -
145   -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
146   -#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
147   -
148   -#define FPGA_REGS_BASE_PHYSICAL 0x08000000
149   -
150   -/*
151   - * GPIO settings
152   - */
153   -#define CONFIG_SYS_GPSR0_VAL 0x00008000
154   -#define CONFIG_SYS_GPSR1_VAL 0x00FC0382
155   -#define CONFIG_SYS_GPSR2_VAL 0x0001FFFF
156   -#define CONFIG_SYS_GPCR0_VAL 0x00000000
157   -#define CONFIG_SYS_GPCR1_VAL 0x00000000
158   -#define CONFIG_SYS_GPCR2_VAL 0x00000000
159   -#define CONFIG_SYS_GPDR0_VAL 0x0060A800
160   -#define CONFIG_SYS_GPDR1_VAL 0x00FF0382
161   -#define CONFIG_SYS_GPDR2_VAL 0x0001C000
162   -#define CONFIG_SYS_GAFR0_L_VAL 0x98400000
163   -#define CONFIG_SYS_GAFR0_U_VAL 0x00002950
164   -#define CONFIG_SYS_GAFR1_L_VAL 0x000A9558
165   -#define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA
166   -#define CONFIG_SYS_GAFR2_L_VAL 0xA0000000
167   -#define CONFIG_SYS_GAFR2_U_VAL 0x00000002
168   -
169   -#define CONFIG_SYS_PSSR_VAL 0x20
170   -
171   -#define CONFIG_SYS_CCCR CCCR_L27|CCCR_M2|CCCR_N10
172   -#define CONFIG_SYS_CKEN 0x0
173   -
174   -/*
175   - * Memory settings
176   - */
177   -#define CONFIG_SYS_MSC0_VAL 0x23F223F2
178   -#define CONFIG_SYS_MSC1_VAL 0x3FF1A441
179   -#define CONFIG_SYS_MSC2_VAL 0x7FF97FF1
180   -#define CONFIG_SYS_MDCNFG_VAL 0x00001AC9
181   -#define CONFIG_SYS_MDREFR_VAL 0x00018018
182   -#define CONFIG_SYS_MDMRS_VAL 0x00000000
183   -
184   -#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
185   -#define CONFIG_SYS_SXCNFG_VAL 0x00000000
186   -
187   -/*
188   - * PCMCIA and CF Interfaces
189   - */
190   -#define CONFIG_SYS_MECR_VAL 0x00000000
191   -#define CONFIG_SYS_MCMEM0_VAL 0x00010504
192   -#define CONFIG_SYS_MCMEM1_VAL 0x00010504
193   -#define CONFIG_SYS_MCATT0_VAL 0x00010504
194   -#define CONFIG_SYS_MCATT1_VAL 0x00010504
195   -#define CONFIG_SYS_MCIO0_VAL 0x00004715
196   -#define CONFIG_SYS_MCIO1_VAL 0x00004715
197   -
198   -#define _LED 0x08000010
199   -#define LED_BLANK 0x08000040
200   -
201   -/*
202   - * FLASH and environment organization
203   - */
204   -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
205   -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
206   -
207   -/* timeout values are in ticks */
208   -#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
209   -#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */
210   -
211   -/* NOTE: many default partitioning schemes assume the kernel starts at the
212   - * second sector, not an environment. You have been warned!
213   - */
214   -#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE
215   -#define CONFIG_ENV_IS_IN_FLASH 1
216   -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE)
217   -#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
218   -#define CONFIG_ENV_SIZE (PHYS_FLASH_SECT_SIZE / 16)
219   -
220   -
221   -/*
222   - * FPGA Offsets
223   - */
224   -#define WHOAMI_OFFSET 0x00
225   -#define HEXLED_OFFSET 0x10
226   -#define BLANKLED_OFFSET 0x40
227   -#define DISCRETELED_OFFSET 0x40
228   -#define CNFG_SWITCHES_OFFSET 0x50
229   -#define USER_SWITCHES_OFFSET 0x60
230   -#define MISC_WR_OFFSET 0x80
231   -#define MISC_RD_OFFSET 0x90
232   -#define INT_MASK_OFFSET 0xC0
233   -#define INT_CLEAR_OFFSET 0xD0
234   -#define GP_OFFSET 0x100
235   -
236   -#endif /* __CONFIG_H */