riscv: Probe cpus during boot

This calls cpu_probe_all() to probe all available cpus. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>

riscv: Probe cpus during boot
This calls cpu_probe_all() to probe all available cpus. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
Bin Meng · Andes
1 parent 92b64fef05
Showing 2 changed files with 27 additions and 0 deletions Side-by-side Diff
arch/riscv/cpu/cpu.c
arch/riscv/cpu/qemu/Kconfig
@@ -4,6 +4,8 @@
  */
  
 #include <common.h>
+#include <cpu.h>
+#include <log.h>
 #include <asm/csr.h>
  
 /*
@@ -52,5 +54,29 @@
 	printf("CPU:   %s\n", name);
  
 	return 0;
+}
+
+static int riscv_cpu_probe(void)
+{
+#ifdef CONFIG_CPU
+	int ret;
+
+	/* probe cpus so that RISC-V timer can be bound */
+	ret = cpu_probe_all();
+	if (ret)
+		return log_msg_ret("RISC-V cpus probe failed\n", ret);
+#endif
+
+	return 0;
+}
+
+int arch_cpu_init_dm(void)
+{
+	return riscv_cpu_probe();
+}
+
+int arch_early_init_r(void)
+{
+	return riscv_cpu_probe();
 }
@@ -4,6 +4,7 @@
  
 config QEMU_RISCV
 	bool
+	select ARCH_EARLY_INIT_R
 	imply CPU
 	imply CPU_RISCV
 	imply RISCV_TIMER
...	...	@@ -4,6 +4,8 @@
4	4	*/
5	5
6	6	#include <common.h>
	7	+#include <cpu.h>
	8	+#include <log.h>
7	9	#include <asm/csr.h>
8	10
9	11	/*
...	...	@@ -52,5 +54,29 @@
52	54	printf("CPU: %s\n", name);
53	55
54	56	return 0;
	57	+}
	58	+
	59	+static int riscv_cpu_probe(void)
	60	+{
	61	+#ifdef CONFIG_CPU
	62	+ int ret;
	63	+
	64	+ /* probe cpus so that RISC-V timer can be bound */
	65	+ ret = cpu_probe_all();
	66	+ if (ret)
	67	+ return log_msg_ret("RISC-V cpus probe failed\n", ret);
	68	+#endif
	69	+
	70	+ return 0;
	71	+}
	72	+
	73	+int arch_cpu_init_dm(void)
	74	+{
	75	+ return riscv_cpu_probe();
	76	+}
	77	+
	78	+int arch_early_init_r(void)
	79	+{
	80	+ return riscv_cpu_probe();
55	81	}
...	...	@@ -4,6 +4,7 @@
4	4
5	5	config QEMU_RISCV
6	6	bool
	7	+ select ARCH_EARLY_INIT_R
7	8	imply CPU
8	9	imply CPU_RISCV
9	10	imply RISCV_TIMER