Add new Xilinx Spartan FPGA types

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>

Add new Xilinx Spartan FPGA types
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Matthias Fuchs · Wolfgang Denk
1 parent 21d39d598c
Showing 2 changed files with 13 additions and 1 deletions Side-by-side Diff
include/spartan2.h
include/spartan3.h
@@ -70,6 +70,7 @@
 #define XILINX_XC2S50_SIZE  	559232/8
 #define XILINX_XC2S100_SIZE 	781248/8
 #define XILINX_XC2S150_SIZE 	1040128/8
+#define XILINX_XC2S200_SIZE 	1335872/8
  
 /* Spartan-IIE (1.8V) */
 #define XILINX_XC2S50E_SIZE     630048/8
@@ -95,6 +96,9 @@
  
 #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
+
+#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
  
 #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
@@ -81,9 +81,12 @@
 #define	XILINX_XC3S1200E_SIZE	3841184/8
 #define	XILINX_XC3S1600E_SIZE	5969696/8
  
+/* Spartan-IIIE (1.2V) */
+#define XILINX_XC3S1200E_SIZE  	3841184/8
+
 /* Descriptor Macros
  *********************************************************************/
-/* Spartan-II devices */
+/* Spartan-III devices */
 #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
  
@@ -124,6 +127,11 @@
  
 #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
+
+/* Spartan-IIIE devices */
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
  
 #endif /* _SPARTAN3_H_ */
...	...	@@ -70,6 +70,7 @@
70	70	#define XILINX_XC2S50_SIZE 559232/8
71	71	#define XILINX_XC2S100_SIZE 781248/8
72	72	#define XILINX_XC2S150_SIZE 1040128/8
	73	+#define XILINX_XC2S200_SIZE 1335872/8
73	74
74	75	/* Spartan-IIE (1.8V) */
75	76	#define XILINX_XC2S50E_SIZE 630048/8
...	...	@@ -95,6 +96,9 @@
95	96
96	97	#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
97	98	{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
	99	+
	100	+#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
	101	+{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
98	102
99	103	#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
100	104	{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
...	...	@@ -81,9 +81,12 @@
81	81	#define XILINX_XC3S1200E_SIZE 3841184/8
82	82	#define XILINX_XC3S1600E_SIZE 5969696/8
83	83
	84	+/* Spartan-IIIE (1.2V) */
	85	+#define XILINX_XC3S1200E_SIZE 3841184/8
	86	+
84	87	/* Descriptor Macros
85	88	*********************************************************************/
86		-/* Spartan-II devices */
	89	+/* Spartan-III devices */
87	90	#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
88	91	{ Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
89	92
...	...	@@ -124,6 +127,11 @@
124	127
125	128	#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
126	129	{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
	130	+
	131	+
	132	+/* Spartan-IIIE devices */
	133	+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
	134	+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
127	135
128	136	#endif /* _SPARTAN3_H_ */