Eric Lee / smarc-uboot

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Commit 3d420cbd355a5f09e4f113eb10579a264a8ef138

Authored by Albert ARIBAUD
2 parents 790af81543 5a1d0ad3ee
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

Merge branch 'u-boot-socfpga/topic/arm/socfpga-20141010' into 'u-boot-arm/master'

Showing 2 changed files Side-by-side Diff

... ... @@ -65,6 +65,13 @@
65 65 T: git git://git.denx.de/u-boot-arm.git
66 66 F: arch/arm/
67 67  
  68 +ARM ALTERA SOCFPGA
  69 +M: Marek Vasut <marex@denx.de>
  70 +S: Maintainted
  71 +T: git git://git.denx.de/u-boot-socfpga.git
  72 +F: arch/arm/cpu/armv7/socfpga/
  73 +F: board/altera/socfpga/
  74 +
68 75 ARM ATMEL AT91
69 76 M: Andreas Bießmann <andreas.devel@googlemail.com>
70 77 S: Maintained
include/configs/socfpga_cyclone5.h
Diff comments   View file @ 3d420cb
... ... @@ -53,7 +53,7 @@
53 53  
54 54 /* Ethernet on SoC (EMAC) */
55 55 #if defined(CONFIG_CMD_NET)
56   -#define CONFIG_EMAC_BASE SOCFPGA_EMAC0_ADDRESS
  56 +#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
57 57 #define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
58 58 #define CONFIG_EPHY0_PHY_ADDR 0
59 59