Commit 3e01ed00da98a29fe2b71c6d60309d5b09adc0de
Committed by
Tom Rini
1 parent
99907176a0
Exists in
v2017.01-smarct4x
and in
40 other branches
mtd: nand: davinci: add header file for driver definitions
The definitions inside emif_defs.h concern davinci nand driver and should be in it's header. So create header file for davinci nand driver and move definitions from emif_defs.h and nand_defs.h to it. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [trini: Fixup more davinci breakage] Signed-off-by: Tom Rini <trini@ti.com>
Showing 29 changed files with 122 additions and 252 deletions Side-by-side Diff
- arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
- arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
- arch/arm/cpu/armv7/keystone/aemif.c
- arch/arm/include/asm/arch-davinci/emif_defs.h
- arch/arm/include/asm/arch-davinci/hardware.h
- arch/arm/include/asm/arch-davinci/nand_defs.h
- arch/arm/include/asm/arch-keystone/emif_defs.h
- arch/arm/include/asm/arch-keystone/nand_defs.h
- arch/arm/include/asm/arch-tnetv107x/emif_defs.h
- arch/arm/include/asm/arch-tnetv107x/hardware.h
- arch/arm/include/asm/arch-tnetv107x/nand_defs.h
- arch/arm/include/asm/ti-common/davinci_nand.h
- board/Barix/ipam390/ipam390.c
- board/ait/cam_enc_4xx/cam_enc_4xx.c
- board/davinci/da8xxevm/da830evm.c
- board/davinci/da8xxevm/da850evm.c
- board/davinci/dm355evm/dm355evm.c
- board/davinci/dm355leopard/dm355leopard.c
- board/davinci/dm365evm/dm365evm.c
- board/davinci/dm6467evm/dm6467evm.c
- board/davinci/ea20/ea20.c
- board/davinci/sonata/sonata.c
- board/enbw/enbw_cmc/enbw_cmc.c
- board/omicron/calimain/calimain.c
- board/ti/k2hk_evm/board.c
- board/ti/tnetv107xevm/sdb_board.c
- drivers/mtd/nand/davinci_nand.c
- include/configs/davinci_dm6467evm.h
- include/configs/k2hk_evm.h
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
... | ... | @@ -14,7 +14,7 @@ |
14 | 14 | #include <asm/arch/hardware.h> |
15 | 15 | #include <asm/arch/davinci_misc.h> |
16 | 16 | #include <asm/arch/ddr2_defs.h> |
17 | -#include <asm/arch/emif_defs.h> | |
17 | +#include <asm/ti-common/davinci_nand.h> | |
18 | 18 | #include <asm/arch/pll_defs.h> |
19 | 19 | |
20 | 20 | void davinci_enable_uart0(void) |
arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
arch/arm/cpu/armv7/keystone/aemif.c
... | ... | @@ -10,7 +10,7 @@ |
10 | 10 | #include <common.h> |
11 | 11 | #include <asm/io.h> |
12 | 12 | #include <asm/arch/clock.h> |
13 | -#include <asm/arch/emif_defs.h> | |
13 | +#include <asm/ti-common/davinci_nand.h> | |
14 | 14 | |
15 | 15 | #define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0) |
16 | 16 | #define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0) |
arch/arm/include/asm/arch-davinci/emif_defs.h
1 | -/* | |
2 | - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
3 | - * | |
4 | - * SPDX-License-Identifier: GPL-2.0+ | |
5 | - */ | |
6 | -#ifndef _EMIF_DEFS_H_ | |
7 | -#define _EMIF_DEFS_H_ | |
8 | - | |
9 | -#include <asm/arch/hardware.h> | |
10 | - | |
11 | -struct davinci_emif_regs { | |
12 | - u_int32_t ercsr; | |
13 | - u_int32_t awccr; | |
14 | - u_int32_t sdbcr; | |
15 | - u_int32_t sdrcr; | |
16 | - u_int32_t ab1cr; | |
17 | - u_int32_t ab2cr; | |
18 | - u_int32_t ab3cr; | |
19 | - u_int32_t ab4cr; | |
20 | - u_int32_t sdtimr; | |
21 | - u_int32_t ddrsr; | |
22 | - u_int32_t ddrphycr; | |
23 | - u_int32_t ddrphysr; | |
24 | - u_int32_t totar; | |
25 | - u_int32_t totactr; | |
26 | - u_int32_t ddrphyid_rev; | |
27 | - u_int32_t sdsretr; | |
28 | - u_int32_t eirr; | |
29 | - u_int32_t eimr; | |
30 | - u_int32_t eimsr; | |
31 | - u_int32_t eimcr; | |
32 | - u_int32_t ioctrlr; | |
33 | - u_int32_t iostatr; | |
34 | - u_int8_t rsvd0[8]; | |
35 | - u_int32_t nandfcr; | |
36 | - u_int32_t nandfsr; | |
37 | - u_int8_t rsvd1[8]; | |
38 | - u_int32_t nandfecc[4]; | |
39 | - u_int8_t rsvd2[60]; | |
40 | - u_int32_t nand4biteccload; | |
41 | - u_int32_t nand4bitecc[4]; | |
42 | - u_int32_t nanderradd1; | |
43 | - u_int32_t nanderradd2; | |
44 | - u_int32_t nanderrval1; | |
45 | - u_int32_t nanderrval2; | |
46 | -}; | |
47 | - | |
48 | -#define davinci_emif_regs \ | |
49 | - ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE) | |
50 | - | |
51 | -#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2)) | |
52 | -#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) | |
53 | -#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4) | |
54 | -#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2))) | |
55 | -#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) | |
56 | -#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) | |
57 | -#define DAVINCI_NANDFCR_CS2NAND (1 << 0) | |
58 | - | |
59 | -/* Chip Select setup */ | |
60 | -#define DAVINCI_ABCR_STROBE_SELECT (1 << 31) | |
61 | -#define DAVINCI_ABCR_EXT_WAIT (1 << 30) | |
62 | -#define DAVINCI_ABCR_WSETUP(n) (n << 26) | |
63 | -#define DAVINCI_ABCR_WSTROBE(n) (n << 20) | |
64 | -#define DAVINCI_ABCR_WHOLD(n) (n << 17) | |
65 | -#define DAVINCI_ABCR_RSETUP(n) (n << 13) | |
66 | -#define DAVINCI_ABCR_RSTROBE(n) (n << 7) | |
67 | -#define DAVINCI_ABCR_RHOLD(n) (n << 4) | |
68 | -#define DAVINCI_ABCR_TA(n) (n << 2) | |
69 | -#define DAVINCI_ABCR_ASIZE_16BIT 1 | |
70 | -#define DAVINCI_ABCR_ASIZE_8BIT 0 | |
71 | - | |
72 | -#endif |
arch/arm/include/asm/arch-davinci/hardware.h
arch/arm/include/asm/arch-davinci/nand_defs.h
1 | -/* | |
2 | - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
3 | - * | |
4 | - * Parts shamelesly stolen from Linux Kernel source tree. | |
5 | - * | |
6 | - * ------------------------------------------------------------ | |
7 | - * | |
8 | - * SPDX-License-Identifier: GPL-2.0+ | |
9 | - */ | |
10 | -#ifndef _NAND_DEFS_H_ | |
11 | -#define _NAND_DEFS_H_ | |
12 | - | |
13 | -#include <asm/arch/hardware.h> | |
14 | - | |
15 | -#ifdef CONFIG_SOC_DM646X | |
16 | -#define MASK_CLE 0x80000 | |
17 | -#define MASK_ALE 0x40000 | |
18 | -#else | |
19 | -#define MASK_CLE 0x10 | |
20 | -#define MASK_ALE 0x08 | |
21 | -#endif | |
22 | - | |
23 | -#ifdef CONFIG_SYS_NAND_MASK_CLE | |
24 | -#undef MASK_CLE | |
25 | -#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE | |
26 | -#endif | |
27 | -#ifdef CONFIG_SYS_NAND_MASK_ALE | |
28 | -#undef MASK_ALE | |
29 | -#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE | |
30 | -#endif | |
31 | - | |
32 | -#define NAND_READ_START 0x00 | |
33 | -#define NAND_READ_END 0x30 | |
34 | -#define NAND_STATUS 0x70 | |
35 | - | |
36 | -extern void davinci_nand_init(struct nand_chip *nand); | |
37 | - | |
38 | -#endif |
arch/arm/include/asm/arch-keystone/emif_defs.h
1 | -/* | |
2 | - * emif definitions to re-use davinci emif driver on Keystone2 | |
3 | - * | |
4 | - * (C) Copyright 2012-2014 | |
5 | - * Texas Instruments Incorporated, <www.ti.com> | |
6 | - * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net> | |
7 | - * | |
8 | - * SPDX-License-Identifier: GPL-2.0+ | |
9 | - */ | |
10 | -#ifndef _EMIF_DEFS_H_ | |
11 | -#define _EMIF_DEFS_H_ | |
12 | - | |
13 | -#include <asm/arch/hardware.h> | |
14 | - | |
15 | -struct davinci_emif_regs { | |
16 | - uint32_t ercsr; | |
17 | - uint32_t awccr; | |
18 | - uint32_t sdbcr; | |
19 | - uint32_t sdrcr; | |
20 | - uint32_t abncr[4]; | |
21 | - uint32_t sdtimr; | |
22 | - uint32_t ddrsr; | |
23 | - uint32_t ddrphycr; | |
24 | - uint32_t ddrphysr; | |
25 | - uint32_t totar; | |
26 | - uint32_t totactr; | |
27 | - uint32_t ddrphyid_rev; | |
28 | - uint32_t sdsretr; | |
29 | - uint32_t eirr; | |
30 | - uint32_t eimr; | |
31 | - uint32_t eimsr; | |
32 | - uint32_t eimcr; | |
33 | - uint32_t ioctrlr; | |
34 | - uint32_t iostatr; | |
35 | - uint32_t rsvd0; | |
36 | - uint32_t one_nand_cr; | |
37 | - uint32_t nandfcr; | |
38 | - uint32_t nandfsr; | |
39 | - uint32_t rsvd1[2]; | |
40 | - uint32_t nandfecc[4]; | |
41 | - uint32_t rsvd2[15]; | |
42 | - uint32_t nand4biteccload; | |
43 | - uint32_t nand4bitecc[4]; | |
44 | - uint32_t nanderradd1; | |
45 | - uint32_t nanderradd2; | |
46 | - uint32_t nanderrval1; | |
47 | - uint32_t nanderrval2; | |
48 | -}; | |
49 | - | |
50 | -#define davinci_emif_regs \ | |
51 | - ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE) | |
52 | - | |
53 | -#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2)) | |
54 | -#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) | |
55 | -#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4) | |
56 | -#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2))) | |
57 | -#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) | |
58 | -#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) | |
59 | - | |
60 | -/* Chip Select setup */ | |
61 | -#define DAVINCI_ABCR_STROBE_SELECT (1 << 31) | |
62 | -#define DAVINCI_ABCR_EXT_WAIT (1 << 30) | |
63 | -#define DAVINCI_ABCR_WSETUP(n) ((n) << 26) | |
64 | -#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20) | |
65 | -#define DAVINCI_ABCR_WHOLD(n) ((n) << 17) | |
66 | -#define DAVINCI_ABCR_RSETUP(n) ((n) << 13) | |
67 | -#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7) | |
68 | -#define DAVINCI_ABCR_RHOLD(n) ((n) << 4) | |
69 | -#define DAVINCI_ABCR_TA(n) ((n) << 2) | |
70 | -#define DAVINCI_ABCR_ASIZE_16BIT 1 | |
71 | -#define DAVINCI_ABCR_ASIZE_8BIT 0 | |
72 | - | |
73 | -#endif |
arch/arm/include/asm/arch-keystone/nand_defs.h
1 | -/* | |
2 | - * nand driver definitions to re-use davinci nand driver on Keystone2 | |
3 | - * | |
4 | - * (C) Copyright 2012-2014 | |
5 | - * Texas Instruments Incorporated, <www.ti.com> | |
6 | - * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net> | |
7 | - * | |
8 | - * SPDX-License-Identifier: GPL-2.0+ | |
9 | - */ | |
10 | -#ifndef _NAND_DEFS_H_ | |
11 | -#define _NAND_DEFS_H_ | |
12 | - | |
13 | -#include <asm/arch/hardware.h> | |
14 | -#include <linux/mtd/nand.h> | |
15 | - | |
16 | -#define MASK_CLE 0x4000 | |
17 | -#define MASK_ALE 0x2000 | |
18 | - | |
19 | -#define NAND_READ_START 0x00 | |
20 | -#define NAND_READ_END 0x30 | |
21 | -#define NAND_STATUS 0x70 | |
22 | - | |
23 | -#endif |
arch/arm/include/asm/arch-tnetv107x/emif_defs.h
1 | -#include <asm/arch-davinci/emif_defs.h> |
arch/arm/include/asm/arch-tnetv107x/hardware.h
arch/arm/include/asm/arch-tnetv107x/nand_defs.h
1 | -/* | |
2 | - * TNETV107X: NAND definitions | |
3 | - * | |
4 | - * SPDX-License-Identifier: GPL-2.0+ | |
5 | - */ | |
6 | -#ifndef _NAND_DEFS_H_ | |
7 | -#define _NAND_DEFS_H_ | |
8 | - | |
9 | -#include <asm/arch/hardware.h> | |
10 | -#include <asm/arch/emif_defs.h> | |
11 | - | |
12 | -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE | |
13 | - | |
14 | -#define MASK_CLE 0x4000 | |
15 | -#define MASK_ALE 0x2000 | |
16 | - | |
17 | -#define NAND_READ_START 0x00 | |
18 | -#define NAND_READ_END 0x30 | |
19 | -#define NAND_STATUS 0x70 | |
20 | - | |
21 | -extern void davinci_nand_init(struct nand_chip *nand); | |
22 | - | |
23 | -#endif |
arch/arm/include/asm/ti-common/davinci_nand.h
1 | +/* | |
2 | + * NAND Flash Driver | |
3 | + * | |
4 | + * Copyright (C) 2006-2014 Texas Instruments. | |
5 | + * | |
6 | + * Based on Linux DaVinci NAND driver by TI. | |
7 | + */ | |
8 | + | |
9 | +#ifndef _DAVINCI_NAND_H_ | |
10 | +#define _DAVINCI_NAND_H_ | |
11 | + | |
12 | +#include <linux/mtd/nand.h> | |
13 | +#include <asm/arch/hardware.h> | |
14 | + | |
15 | +#define NAND_READ_START 0x00 | |
16 | +#define NAND_READ_END 0x30 | |
17 | +#define NAND_STATUS 0x70 | |
18 | + | |
19 | +#define MASK_CLE 0x10 | |
20 | +#define MASK_ALE 0x08 | |
21 | + | |
22 | +#ifdef CONFIG_SYS_NAND_MASK_CLE | |
23 | +#undef MASK_CLE | |
24 | +#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE | |
25 | +#endif | |
26 | +#ifdef CONFIG_SYS_NAND_MASK_ALE | |
27 | +#undef MASK_ALE | |
28 | +#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE | |
29 | +#endif | |
30 | + | |
31 | +struct davinci_emif_regs { | |
32 | + uint32_t ercsr; | |
33 | + uint32_t awccr; | |
34 | + uint32_t sdbcr; | |
35 | + uint32_t sdrcr; | |
36 | + union { | |
37 | + uint32_t abncr[4]; | |
38 | + uint32_t ab1cr; | |
39 | + uint32_t ab2cr; | |
40 | + uint32_t ab3cr; | |
41 | + uint32_t ab4cr; | |
42 | + }; | |
43 | + uint32_t sdtimr; | |
44 | + uint32_t ddrsr; | |
45 | + uint32_t ddrphycr; | |
46 | + uint32_t ddrphysr; | |
47 | + uint32_t totar; | |
48 | + uint32_t totactr; | |
49 | + uint32_t ddrphyid_rev; | |
50 | + uint32_t sdsretr; | |
51 | + uint32_t eirr; | |
52 | + uint32_t eimr; | |
53 | + uint32_t eimsr; | |
54 | + uint32_t eimcr; | |
55 | + uint32_t ioctrlr; | |
56 | + uint32_t iostatr; | |
57 | + uint32_t rsvd0; | |
58 | + uint32_t one_nand_cr; | |
59 | + uint32_t nandfcr; | |
60 | + uint32_t nandfsr; | |
61 | + uint32_t rsvd1[2]; | |
62 | + uint32_t nandfecc[4]; | |
63 | + uint32_t rsvd2[15]; | |
64 | + uint32_t nand4biteccload; | |
65 | + uint32_t nand4bitecc[4]; | |
66 | + uint32_t nanderradd1; | |
67 | + uint32_t nanderradd2; | |
68 | + uint32_t nanderrval1; | |
69 | + uint32_t nanderrval2; | |
70 | +}; | |
71 | + | |
72 | +#define davinci_emif_regs \ | |
73 | + ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE) | |
74 | + | |
75 | +#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << ((n) - 2)) | |
76 | +#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4) | |
77 | +#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) (((n) - 2) << 4) | |
78 | +#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2))) | |
79 | +#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12) | |
80 | +#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13) | |
81 | +#define DAVINCI_NANDFCR_CS2NAND (1 << 0) | |
82 | + | |
83 | +/* Chip Select setup */ | |
84 | +#define DAVINCI_ABCR_STROBE_SELECT (1 << 31) | |
85 | +#define DAVINCI_ABCR_EXT_WAIT (1 << 30) | |
86 | +#define DAVINCI_ABCR_WSETUP(n) (n << 26) | |
87 | +#define DAVINCI_ABCR_WSTROBE(n) (n << 20) | |
88 | +#define DAVINCI_ABCR_WHOLD(n) (n << 17) | |
89 | +#define DAVINCI_ABCR_RSETUP(n) (n << 13) | |
90 | +#define DAVINCI_ABCR_RSTROBE(n) (n << 7) | |
91 | +#define DAVINCI_ABCR_RHOLD(n) (n << 4) | |
92 | +#define DAVINCI_ABCR_TA(n) (n << 2) | |
93 | +#define DAVINCI_ABCR_ASIZE_16BIT 1 | |
94 | +#define DAVINCI_ABCR_ASIZE_8BIT 0 | |
95 | + | |
96 | +void davinci_nand_init(struct nand_chip *nand); | |
97 | + | |
98 | +#endif |
board/Barix/ipam390/ipam390.c
board/ait/cam_enc_4xx/cam_enc_4xx.c
board/davinci/da8xxevm/da830evm.c
... | ... | @@ -25,12 +25,11 @@ |
25 | 25 | #include <net.h> |
26 | 26 | #include <netdev.h> |
27 | 27 | #include <asm/arch/hardware.h> |
28 | -#include <asm/arch/emif_defs.h> | |
29 | 28 | #include <asm/arch/emac_defs.h> |
30 | 29 | #include <asm/arch/pinmux_defs.h> |
31 | 30 | #include <asm/io.h> |
32 | 31 | #include <nand.h> |
33 | -#include <asm/arch/nand_defs.h> | |
32 | +#include <asm/ti-common/davinci_nand.h> | |
34 | 33 | #include <asm/arch/davinci_misc.h> |
35 | 34 | |
36 | 35 | #ifdef CONFIG_DAVINCI_MMC |
board/davinci/da8xxevm/da850evm.c
board/davinci/dm355evm/dm355evm.c
... | ... | @@ -8,8 +8,7 @@ |
8 | 8 | #include <nand.h> |
9 | 9 | #include <asm/io.h> |
10 | 10 | #include <asm/arch/hardware.h> |
11 | -#include <asm/arch/emif_defs.h> | |
12 | -#include <asm/arch/nand_defs.h> | |
11 | +#include <asm/ti-common/davinci_nand.h> | |
13 | 12 | #include <asm/arch/davinci_misc.h> |
14 | 13 | #include <net.h> |
15 | 14 | #include <netdev.h> |
board/davinci/dm355leopard/dm355leopard.c
board/davinci/dm365evm/dm365evm.c
... | ... | @@ -8,8 +8,7 @@ |
8 | 8 | #include <nand.h> |
9 | 9 | #include <asm/io.h> |
10 | 10 | #include <asm/arch/hardware.h> |
11 | -#include <asm/arch/emif_defs.h> | |
12 | -#include <asm/arch/nand_defs.h> | |
11 | +#include <asm/ti-common/davinci_nand.h> | |
13 | 12 | #include <asm/arch/gpio.h> |
14 | 13 | #include <netdev.h> |
15 | 14 | #include <asm/arch/davinci_misc.h> |
board/davinci/dm6467evm/dm6467evm.c
board/davinci/ea20/ea20.c
board/davinci/sonata/sonata.c
board/enbw/enbw_cmc/enbw_cmc.c
... | ... | @@ -29,7 +29,7 @@ |
29 | 29 | #include <asm/io.h> |
30 | 30 | #include <asm/arch/da850_lowlevel.h> |
31 | 31 | #include <asm/arch/davinci_misc.h> |
32 | -#include <asm/arch/emif_defs.h> | |
32 | +#include <asm/ti-common/davinci_nand.h> | |
33 | 33 | #include <asm/arch/emac_defs.h> |
34 | 34 | #include <asm/arch/gpio.h> |
35 | 35 | #include <asm/arch/pinmux_defs.h> |
board/omicron/calimain/calimain.c
... | ... | @@ -18,7 +18,7 @@ |
18 | 18 | #include <asm/io.h> |
19 | 19 | #include <asm/arch/hardware.h> |
20 | 20 | #include <asm/arch/gpio.h> |
21 | -#include <asm/arch/emif_defs.h> | |
21 | +#include <asm/ti-common/davinci_nand.h> | |
22 | 22 | #include <asm/arch/emac_defs.h> |
23 | 23 | #include <asm/arch/pinmux_defs.h> |
24 | 24 | #include <asm/arch/davinci_misc.h> |
board/ti/k2hk_evm/board.c
board/ti/tnetv107xevm/sdb_board.c
drivers/mtd/nand/davinci_nand.c
... | ... | @@ -32,8 +32,7 @@ |
32 | 32 | #include <common.h> |
33 | 33 | #include <asm/io.h> |
34 | 34 | #include <nand.h> |
35 | -#include <asm/arch/nand_defs.h> | |
36 | -#include <asm/arch/emif_defs.h> | |
35 | +#include <asm/ti-common/davinci_nand.h> | |
37 | 36 | |
38 | 37 | /* Definitions for 4-bit hardware ECC */ |
39 | 38 | #define NAND_TIMEOUT 10240 |
include/configs/davinci_dm6467evm.h
... | ... | @@ -78,6 +78,8 @@ |
78 | 78 | #define CONFIG_SYS_NO_FLASH |
79 | 79 | #ifdef CONFIG_SYS_USE_NAND |
80 | 80 | #define CONFIG_NAND_DAVINCI |
81 | +#define CONFIG_SYS_NAND_MASK_CLE 0x80000 | |
82 | +#define CONFIG_SYS_NAND_MASK_ALE 0x40000 | |
81 | 83 | #define CONFIG_SYS_NAND_CS 2 |
82 | 84 | #undef CONFIG_ENV_IS_IN_FLASH |
83 | 85 | #define CONFIG_ENV_IS_IN_NAND |
include/configs/k2hk_evm.h
... | ... | @@ -136,6 +136,8 @@ |
136 | 136 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
137 | 137 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST |
138 | 138 | #define CONFIG_SYS_NAND_PAGE_2K |
139 | +#define CONFIG_SYS_NAND_MASK_CLE 0x4000 | |
140 | +#define CONFIG_SYS_NAND_MASK_ALE 0x2000 | |
139 | 141 | |
140 | 142 | #define CONFIG_SYS_NAND_LARGEPAGE |
141 | 143 | #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } |