Commit 3e057e48b5046a2a3478fdc697bbe959b51bc156

Authored by Chen-Yu Tsai
Committed by Hans de Goede
1 parent 58b628ed87

sunxi: Enable SPL support for A80 Optimus board

The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
 instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Showing 2 changed files with 15 additions and 5 deletions Side-by-side Diff

board/sunxi/MAINTAINERS
... ... @@ -94,6 +94,11 @@
94 94 S: Maintained
95 95 F: configs/A33-OLinuXino_defconfig
96 96  
  97 +A80 OPTIMUS BOARD
  98 +M: Chen-Yu Tsai <wens@csie.org>
  99 +S: Maintained
  100 +F: configs/Merrii_A80_Optimus_defconfig
  101 +
97 102 AINOL AW1 BOARD
98 103 M: Paul Kocialkowski <contact@paulk.fr>
99 104 S: Maintained
configs/Merrii_A80_Optimus_defconfig
1 1 CONFIG_ARM=y
2 2 CONFIG_ARCH_SUNXI=y
3 3 CONFIG_MACH_SUN9I=y
4   -CONFIG_DRAM_CLK=360
5   -CONFIG_DRAM_ZQ=123
6   -CONFIG_SYS_CLK_FREQ=1008000000
  4 +CONFIG_DRAM_CLK=672
7 5 CONFIG_MMC0_CD_PIN="PH18"
  6 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2
  7 +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
  8 +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
  9 +CONFIG_USB0_ID_DET="PH3"
  10 +CONFIG_USB1_VBUS_PIN="PH4"
  11 +CONFIG_USB3_VBUS_PIN="PH5"
  12 +CONFIG_AXP_GPIO=y
8 13 CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus"
9   -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
10   -CONFIG_CONSOLE_MUX=y
  14 +CONFIG_SPL=y
11 15 # CONFIG_CMD_IMLS is not set
12 16 # CONFIG_CMD_FLASH is not set
13 17 # CONFIG_CMD_FPGA is not set
  18 +CONFIG_AXP809_POWER=y