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Commit 3e3eec39de8fe0ae62e6e4d4e3fa4442ee9ed6b1

Authored by Nobuhiro Iwamatsu
Committed by Nobuhiro Iwamatsu
1 parent 3c92217732
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

sh: use write{8,16,32} in ms7720se lowlevel_init 

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Showing 1 changed file with 42 additions and 114 deletions Side-by-side Diff

board/ms7720se/lowlevel_init.S
Diff comments   View file @ 3e3eec3
... ... @@ -18,6 +18,8 @@
18 18 * MA 02111-1307 USA
19 19 */
20 20  
  21 +#include <asm/macro.h>
  22 +
21 23 .global lowlevel_init
22 24  
23 25 .text
24 26  
25 27  
26 28  
27 29  
28 30  
29 31  
30 32  
31 33  
32 34  
33 35  
34 36  
35 37  
36 38  
37 39  
38 40  
39 41  
40 42  
41 43  
42 44  
43 45  
44 46  
45 47  
46 48  
47 49  
48 50  
49 51  
50 52  
51 53  
52 54  
53 55  
54 56  
55 57  
56 58  
57 59  
58 60  
59 61  
60 62  
... ... @@ -25,157 +27,83 @@
25 27  
26 28 lowlevel_init:
27 29  
28   - mov.l WTCSR_A,r1
29   - mov.l WTCSR_D,r0
30   - mov.w r0,@r1
  30 + write16 WTCSR_A, WTCSR_D
31 31  
32   - mov.l WTCNT_A,r1
33   - mov.l WTCNT_D,r0
34   - mov.w r0,@r1
  32 + write16 WTCNT_A, WTCNT_D
35 33  
36   - mov.l FRQCR_A,r1
37   - mov.l FRQCR_D,r0
38   - mov.w r0,@r1
  34 + write16 FRQCR_A, FRQCR_D
39 35  
40   - mov.l UCLKCR_A,r1
41   - mov.l UCLKCR_D,r0
42   - mov.w r0,@r1
  36 + write16 UCLKCR_A, UCLKCR_D
43 37  
44   - mov.l CMNCR_A, r1
45   - mov.l CMNCR_D, r0
46   - mov.l r0, @r1
  38 + write32 CMNCR_A, CMNCR_D
47 39  
48   - mov.l CS0BCR_A, r1
49   - mov.l CS0BCR_D, r0
50   - mov.l r0, @r1
  40 + write32 CMNCR_A, CMNCR_D
51 41  
52   - mov.l CS2BCR_A, r1
53   - mov.l CS2BCR_D, r0
54   - mov.l r0, @r1
  42 + write32 CS0BCR_A, CS0BCR_D
55 43  
56   - mov.l CS3BCR_A, r1
57   - mov.l CS3BCR_D, r0
58   - mov.l r0, @r1
  44 + write32 CS2BCR_A, CS2BCR_D
59 45  
60   - mov.l CS4BCR_A, r1
61   - mov.l CS4BCR_D, r0
62   - mov.l r0, @r1
  46 + write32 CS3BCR_A, CS3BCR_D
63 47  
64   - mov.l CS5ABCR_A, r1
65   - mov.l CS5ABCR_D, r0
66   - mov.l r0, @r1
  48 + write32 CS4BCR_A, CS4BCR_D
67 49  
68   - mov.l CS5BBCR_A, r1
69   - mov.l CS5BBCR_D, r0
70   - mov.l r0, @r1
  50 + write32 CS5ABCR_A, CS5ABCR_D
71 51  
72   - mov.l CS6ABCR_A, r1
73   - mov.l CS6ABCR_D, r0
74   - mov.l r0, @r1
  52 + write32 CS5BBCR_A, CS5BBCR_D
75 53  
76   - mov.l CS6BBCR_A, r1
77   - mov.l CS6BBCR_D, r0
78   - mov.l r0, @r1
  54 + write32 CS6ABCR_A, CS6ABCR_D
79 55  
80   - mov.l CS0WCR_A, r1
81   - mov.l CS0WCR_D, r0
82   - mov.l r0, @r1
  56 + write32 CS6BBCR_A, CS6BBCR_D
83 57  
84   - mov.l CS2WCR_A, r1
85   - mov.l CS2WCR_D, r0
86   - mov.l r0, @r1
  58 + write32 CS0WCR_A, CS0WCR_D
87 59  
88   - mov.l CS3WCR_A, r1
89   - mov.l CS3WCR_D, r0
90   - mov.l r0, @r1
  60 + write32 CS2WCR_A, CS2WCR_D
91 61  
92   - mov.l CS4WCR_A, r1
93   - mov.l CS4WCR_D, r0
94   - mov.l r0, @r1
  62 + write32 CS3WCR_A, CS3WCR_D
95 63  
96   - mov.l CS5AWCR_A, r1
97   - mov.l CS5AWCR_D, r0
98   - mov.l r0, @r1
  64 + write32 CS4WCR_A, CS4WCR_D
99 65  
100   - mov.l CS5BWCR_A, r1
101   - mov.l CS5BWCR_D, r0
102   - mov.l r0, @r1
  66 + write32 CS5AWCR_A, CS5AWCR_D
103 67  
104   - mov.l CS6AWCR_A, r1
105   - mov.l CS6AWCR_D, r0
106   - mov.l r0, @r1
  68 + write32 CS5BWCR_A, CS5BWCR_D
107 69  
108   - mov.l CS6BWCR_A, r1
109   - mov.l CS6BWCR_D, r0
110   - mov.l r0, @r1
  70 + write32 CS6AWCR_A, CS6AWCR_D
111 71  
112   - mov.l SDCR_A, r1
113   - mov.l SDCR_D1, r0
114   - mov.l r0, @r1
  72 + write32 CS6BWCR_A, CS6BWCR_D
115 73  
116   - mov.l RTCSR_A, r1
117   - mov.l RTCSR_D, r0
118   - mov.l r0, @r1
  74 + write32 SDCR_A, SDCR_D1
119 75  
120   - mov.l RTCNT_A, r1
121   - mov.l RTCNT_D, r0
122   - mov.l r0, @r1
  76 + write32 RTCSR_A, RTCSR_D
123 77  
124   - mov.l RTCOR_A, r1
125   - mov.l RTCOR_D, r0
126   - mov.l r0, @r1
  78 + write32 RTCNT_A RTCNT_D
127 79  
128   - mov.l SDCR_A, r1
129   - mov.l SDCR_D2, r0
130   - mov.l r0, @r1
  80 + write32 RTCOR_A, RTCOR_D
131 81  
132   - mov.l SDMR3_A, r1
133   - mov.l SDMR3_D, r0
134   - mov.w r0, @r1
  82 + write32 SDCR_A, SDCR_D2
135 83  
136   - mov.l PCCR_A, r1
137   - mov.l PCCR_D, r0
138   - mov.w r0, @r1
  84 + write16 SDMR3_A, SDMR3_D
139 85  
140   - mov.l PDCR_A, r1
141   - mov.l PDCR_D, r0
142   - mov.w r0, @r1
  86 + write16 PCCR_A, PCCR_D
143 87  
144   - mov.l PECR_A, r1
145   - mov.l PECR_D, r0
146   - mov.w r0, @r1
  88 + write16 PDCR_A, PDCR_D
147 89  
148   - mov.l PGCR_A, r1
149   - mov.l PGCR_D, r0
150   - mov.w r0, @r1
  90 + write16 PECR_A, PECR_D
151 91  
152   - mov.l PHCR_A, r1
153   - mov.l PHCR_D, r0
154   - mov.w r0, @r1
  92 + write16 PGCR_A, PGCR_D
155 93  
156   - mov.l PPCR_A, r1
157   - mov.l PPCR_D, r0
158   - mov.w r0, @r1
  94 + write16 PHCR_A, PHCR_D
159 95  
160   - mov.l PTCR_A, r1
161   - mov.l PTCR_D, r0
162   - mov.w r0, @r1
  96 + write16 PPCR_A, PPCR_D
163 97  
164   - mov.l PVCR_A, r1
165   - mov.l PVCR_D, r0
166   - mov.w r0, @r1
  98 + write16 PTCR_A, PTCR_D
167 99  
168   - mov.l PSELA_A, r1
169   - mov.l PSELA_D, r0
170   - mov.w r0, @r1
  100 + write16 PVCR_A, PVCR_D
171 101  
172   - mov.l CCR_A, r1
173   - mov.l CCR_D, r0
174   - mov.l r0, @r1
  102 + write16 PSELA_A, PSELA_D
175 103  
176   - mov.l LED_A, r1
177   - mov.l LED_D, r0
178   - mov.b r0, @r1
  104 + write32 CCR_A, CCR_D
  105 +
  106 + write8 LED_A, LED_D
179 107  
180 108 rts
181 109 nop