ARMV7: Add support for TI OMAP4430 SDP

OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU This patch adds basic support for booting the board. It includes i2c and mmc support. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. U-boot currently relies on x-load for clock, mux, and SDRAM initialization Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

ARMV7: Add support for TI OMAP4430 SDP
OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU This patch adds basic support for booting the board. It includes i2c and mmc support. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. U-boot currently relies on x-load for clock, mux, and SDRAM initialization Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Steve Sakoman · Sandeep Paulraj
1 parent 938717cee1
Showing 7 changed files with 367 additions and 0 deletions Side-by-side Diff
MAINTAINERS
MAKEALL
board/ti/sdp4430/Makefile
board/ti/sdp4430/config.mk
board/ti/sdp4430/sdp.c
boards.cfg
include/configs/omap4_sdp4430.h
@@ -751,6 +751,7 @@
 Steve Sakoman <sakoman@gmail.com>
  
 	omap3_overo	ARM ARMV7 (OMAP3xx SoC)
+	omap4_sdp4430	ARM ARMV7 (OMAP4xx SoC)
  
 Jens Scharsig <esw@bus-elektronik.de>
  
@@ -657,6 +657,7 @@
 	omap3_sdp3430		\
 	omap3_zoom1		\
 	omap3_zoom2		\
+	omap4_sdp4430		\
 	s5p_goni		\
 	smdkc100		\
 "
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= sdp.o
+
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+	rm -f $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+#
+# (C) Copyright 2006-2009
+# Texas Instruments Incorporated, <www.ti.com>
+#
+# OMAP 4430 SDP
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# SDRAM Address Space:
+# 8000'0000 - 9fff'ffff (512 MB)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# Let's place u-boot 1MB before the end of SDRAM.
+TEXT_BASE = 0x9ff00000
+/*
+ * (C) Copyright 2010
+ * Texas Instruments Incorporated, <www.ti.com>
+ * Aneesh V       <aneesh@ti.com>
+ * Steve Sakoman  <steve@sakoman.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct omap_sysinfo sysinfo = {
+	"Board: OMAP4430 SDP\n"
+};
+
+/**
+ * @brief board_init
+ *
+ * @return 0
+ */
+int board_init(void)
+{
+	gd->bd->bi_arch_number = MACH_TYPE_OMAP_4430SDP;
+	gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
+
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	return 0;
+}
+
+/**
+ * @brief misc_init_r - Configure SDP board specific configurations
+ * such as power configurations, ethernet initialization as phase2 of
+ * boot sequence
+ *
+ * @return 0
+ */
+int misc_init_r(void)
+{
+	return 0;
+}
@@ -262,6 +262,7 @@
 omap3_beagle	arm	armv7		beagle		ti		omap3
 omap3_evm	arm	armv7		evm		ti		omap3
 omap3_sdp3430	arm	armv7		sdp3430		ti		omap3
+omap4_sdp4430	arm	armv7		sdp4430		ti		omap4
 am3517_evm	arm	armv7		am3517evm	logicpd		omap3
 devkit8000	arm	armv7		devkit8000	timll		omap3
 s5p_goni	arm	armv7		goni		samsung		s5pc1xx
+/*
+ * (C) Copyright 2010
+ * Texas Instruments Incorporated.
+ * Aneesh V       <aneesh@ti.com>
+ * Steve Sakoman  <steve@sakoman.com>
+ *
+ * Configuration settings for the TI SDP4430 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
+#define CONFIG_OMAP		1	/* in a TI OMAP core */
+#define CONFIG_OMAP44XX		1	/* which is a 44XX */
+#define CONFIG_OMAP4430		1	/* which is in a 4430 */
+#define CONFIG_4430SDP		1	/* working with SDP */
+
+/* Get CPU defs */
+#include <asm/arch/cpu.h>
+#include <asm/arch/omap4.h>
+
+/* Display CPU and Board Info */
+#define CONFIG_DISPLAY_CPUINFO		1
+#define CONFIG_DISPLAY_BOARDINFO	1
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_L2_OFF			1
+
+/* Clock Defines */
+#define V_OSCK			38400000	/* Clock output from T2 */
+#define V_SCLK                   V_OSCK
+
+#undef CONFIG_USE_IRQ				/* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+#define CONFIG_REVISION_TAG		1
+
+/*
+ * Size of malloc() pool
+ * Total Size Environment - 256k
+ * Malloc - add 256k
+ */
+#define CONFIG_ENV_SIZE			(256 << 10)
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
+#define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
+						/* initial data */
+/* Vector Base */
+#define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * serial port - NS16550 compatible
+ */
+#define V_NS16550_CLK			48000000
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
+#define CONFIG_CONS_INDEX		3
+#define CONFIG_SYS_NS16550_COM3		UART3_BASE
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
+					115200}
+
+/* I2C  */
+#define CONFIG_HARD_I2C			1
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		1
+#define CONFIG_SYS_I2C_BUS		0
+#define CONFIG_SYS_I2C_BUS_SELECT	1
+#define CONFIG_DRIVER_OMAP34XX_I2C	1
+#define CONFIG_I2C_MULTI_BUS		1
+
+/* MMC */
+#define CONFIG_MMC			1
+#define CONFIG_OMAP3_MMC		1
+#define CONFIG_SYS_MMC_SET_DEV		1
+#define CONFIG_DOS_PARTITION		1
+
+/* Flash */
+#define CONFIG_SYS_NO_FLASH	1
+
+/* commands to include */
+#include <config_cmd_default.h>
+
+/* Enabled commands */
+#define CONFIG_CMD_EXT2		/* EXT2 Support                 */
+#define CONFIG_CMD_FAT		/* FAT support                  */
+#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
+#define CONFIG_CMD_MMC		/* MMC support                  */
+
+/* Disabled commands */
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
+#undef CONFIG_CMD_IMLS		/* List all found images        */
+
+/*
+ * Enabling relocation of u-boot by default
+ * Relocation can be skipped if u-boot is copied to the TEXT_BASE
+ */
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+
+/*
+ * Environment setup
+ */
+
+/* allow overwriting serial config and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"loadaddr=0x82000000\0" \
+	"console=ttyS2,115200n8\0" \
+	"mmcdev=1\0" \
+	"mmcroot=/dev/mmcblk0p2 rw\0" \
+	"mmcrootfstype=ext3 rootwait\0" \
+	"mmcargs=setenv bootargs console=${console} " \
+		"root=${mmcroot} " \
+		"rootfstype=${mmcrootfstype}\0" \
+	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
+		"source ${loadaddr}\0" \
+	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
+		"run mmcargs; " \
+		"bootm ${loadaddr}\0" \
+
+#define CONFIG_BOOTCOMMAND \
+	"if mmc init ${mmcdev}; then " \
+		"if run loadbootscript; then " \
+			"run bootscript; " \
+		"else " \
+			"if run loaduimage; then " \
+				"run mmcboot; " \
+			"else run nandboot; " \
+			"fi; " \
+		"fi; " \
+	"fi"
+
+#define CONFIG_AUTO_COMPLETE		1
+
+/*
+ * Miscellaneous configurable options
+ */
+
+#define CONFIG_SYS_LONGHELP	/* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_PROMPT		"OMAP4430 SDP # "
+#define CONFIG_SYS_CBSIZE		256
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
+
+/*
+ * memtest setup
+ */
+#define CONFIG_SYS_MEMTEST_START	0x80000000
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
+
+/* Default load address */
+#define CONFIG_SYS_LOAD_ADDR		0x80000000
+
+/* Use General purpose timer 1 */
+#define CONFIG_SYS_TIMERBASE		GPT1_BASE
+#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ			1000
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
+#endif
+
+/*
+ * SDRAM Memory Map
+ * Even though we use two CS all the memory
+ * is mapped to one contiguous block
+ */
+#define CONFIG_NR_DRAM_BANKS	1
+
+#endif /* __CONFIG_H */
...	...	@@ -751,6 +751,7 @@
751	751	Steve Sakoman <sakoman@gmail.com>
752	752
753	753	omap3_overo ARM ARMV7 (OMAP3xx SoC)
	754	+ omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC)
754	755
755	756	Jens Scharsig <esw@bus-elektronik.de>
756	757
...	...	@@ -657,6 +657,7 @@
657	657	omap3_sdp3430 \
658	658	omap3_zoom1 \
659	659	omap3_zoom2 \
	660	+ omap4_sdp4430 \
660	661	s5p_goni \
661	662	smdkc100 \
662	663	"
	1	+#
	2	+# (C) Copyright 2000, 2001, 2002
	3	+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	+#
	5	+# See file CREDITS for list of people who contributed to this
	6	+# project.
	7	+#
	8	+# This program is free software; you can redistribute it and/or
	9	+# modify it under the terms of the GNU General Public License as
	10	+# published by the Free Software Foundation; either version 2 of
	11	+# the License, or (at your option) any later version.
	12	+#
	13	+# This program is distributed in the hope that it will be useful,
	14	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+# GNU General Public License for more details.
	17	+#
	18	+# You should have received a copy of the GNU General Public License
	19	+# along with this program; if not, write to the Free Software
	20	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+# MA 02111-1307 USA
	22	+#
	23	+
	24	+include $(TOPDIR)/config.mk
	25	+
	26	+LIB = $(obj)lib$(BOARD).a
	27	+
	28	+COBJS := sdp.o
	29	+
	30	+SRCS := $(COBJS:.o=.c)
	31	+OBJS := $(addprefix $(obj),$(COBJS))
	32	+
	33	+$(LIB): $(obj).depend $(OBJS)
	34	+ $(AR) $(ARFLAGS) $@ $(OBJS)
	35	+
	36	+clean:
	37	+ rm -f $(OBJS)
	38	+
	39	+distclean: clean
	40	+ rm -f $(LIB) core *.bak $(obj).depend
	41	+
	42	+#########################################################################
	43	+
	44	+# defines $(obj).depend target
	45	+include $(SRCTREE)/rules.mk
	46	+
	47	+sinclude $(obj).depend
	48	+
	49	+#########################################################################
	1	+#
	2	+# (C) Copyright 2006-2009
	3	+# Texas Instruments Incorporated, <www.ti.com>
	4	+#
	5	+# OMAP 4430 SDP
	6	+# see http://www.ti.com/ for more information on Texas Instruments
	7	+#
	8	+# See file CREDITS for list of people who contributed to this
	9	+# project.
	10	+#
	11	+# This program is free software; you can redistribute it and/or
	12	+# modify it under the terms of the GNU General Public License as
	13	+# published by the Free Software Foundation; either version 2 of
	14	+# the License, or (at your option) any later version.
	15	+#
	16	+# This program is distributed in the hope that it will be useful,
	17	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+# GNU General Public License for more details.
	20	+#
	21	+# You should have received a copy of the GNU General Public License
	22	+# along with this program; if not, write to the Free Software
	23	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	+# MA 02111-1307 USA
	25	+#
	26	+# SDRAM Address Space:
	27	+# 8000'0000 - 9fff'ffff (512 MB)
	28	+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
	29	+# (mem base + reserved)
	30	+
	31	+# Let's place u-boot 1MB before the end of SDRAM.
	32	+TEXT_BASE = 0x9ff00000
	1	+/*
	2	+ * (C) Copyright 2010
	3	+ * Texas Instruments Incorporated, <www.ti.com>
	4	+ * Aneesh V <aneesh@ti.com>
	5	+ * Steve Sakoman <steve@sakoman.com>
	6	+ *
	7	+ * See file CREDITS for list of people who contributed to this
	8	+ * project.
	9	+ *
	10	+ * This program is free software; you can redistribute it and/or
	11	+ * modify it under the terms of the GNU General Public License as
	12	+ * published by the Free Software Foundation; either version 2 of
	13	+ * the License, or (at your option) any later version.
	14	+ *
	15	+ * This program is distributed in the hope that it will be useful,
	16	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	+ * GNU General Public License for more details.
	19	+ *
	20	+ * You should have received a copy of the GNU General Public License
	21	+ * along with this program; if not, write to the Free Software
	22	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	+ * MA 02111-1307 USA
	24	+ */
	25	+#include <common.h>
	26	+#include <asm/arch/sys_proto.h>
	27	+
	28	+DECLARE_GLOBAL_DATA_PTR;
	29	+
	30	+const struct omap_sysinfo sysinfo = {
	31	+ "Board: OMAP4430 SDP\n"
	32	+};
	33	+
	34	+/**
	35	+ * @brief board_init
	36	+ *
	37	+ * @return 0
	38	+ */
	39	+int board_init(void)
	40	+{
	41	+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_4430SDP;
	42	+ gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
	43	+
	44	+ return 0;
	45	+}
	46	+
	47	+int board_eth_init(bd_t *bis)
	48	+{
	49	+ return 0;
	50	+}
	51	+
	52	+/**
	53	+ * @brief misc_init_r - Configure SDP board specific configurations
	54	+ * such as power configurations, ethernet initialization as phase2 of
	55	+ * boot sequence
	56	+ *
	57	+ * @return 0
	58	+ */
	59	+int misc_init_r(void)
	60	+{
	61	+ return 0;
	62	+}
...	...	@@ -262,6 +262,7 @@
262	262	omap3_beagle arm armv7 beagle ti omap3
263	263	omap3_evm arm armv7 evm ti omap3
264	264	omap3_sdp3430 arm armv7 sdp3430 ti omap3
	265	+omap4_sdp4430 arm armv7 sdp4430 ti omap4
265	266	am3517_evm arm armv7 am3517evm logicpd omap3
266	267	devkit8000 arm armv7 devkit8000 timll omap3
267	268	s5p_goni arm armv7 goni samsung s5pc1xx
	1	+/*
	2	+ * (C) Copyright 2010
	3	+ * Texas Instruments Incorporated.
	4	+ * Aneesh V <aneesh@ti.com>
	5	+ * Steve Sakoman <steve@sakoman.com>
	6	+ *
	7	+ * Configuration settings for the TI SDP4430 board.
	8	+ *
	9	+ * See file CREDITS for list of people who contributed to this
	10	+ * project.
	11	+ *
	12	+ * This program is free software; you can redistribute it and/or
	13	+ * modify it under the terms of the GNU General Public License as
	14	+ * published by the Free Software Foundation; either version 2 of
	15	+ * the License, or (at your option) any later version.
	16	+ *
	17	+ * This program is distributed in the hope that it will be useful,
	18	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	+ * GNU General Public License for more details.
	21	+ *
	22	+ * You should have received a copy of the GNU General Public License
	23	+ * along with this program; if not, write to the Free Software
	24	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	+ * MA 02111-1307 USA
	26	+ */
	27	+
	28	+#ifndef __CONFIG_H
	29	+#define __CONFIG_H
	30	+
	31	+/*
	32	+ * High Level Configuration Options
	33	+ */
	34	+#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
	35	+#define CONFIG_OMAP 1 /* in a TI OMAP core */
	36	+#define CONFIG_OMAP44XX 1 /* which is a 44XX */
	37	+#define CONFIG_OMAP4430 1 /* which is in a 4430 */
	38	+#define CONFIG_4430SDP 1 /* working with SDP */
	39	+
	40	+/* Get CPU defs */
	41	+#include <asm/arch/cpu.h>
	42	+#include <asm/arch/omap4.h>
	43	+
	44	+/* Display CPU and Board Info */
	45	+#define CONFIG_DISPLAY_CPUINFO 1
	46	+#define CONFIG_DISPLAY_BOARDINFO 1
	47	+
	48	+/* Keep L2 Cache Disabled */
	49	+#define CONFIG_L2_OFF 1
	50	+
	51	+/* Clock Defines */
	52	+#define V_OSCK 38400000 /* Clock output from T2 */
	53	+#define V_SCLK V_OSCK
	54	+
	55	+#undef CONFIG_USE_IRQ /* no support for IRQs */
	56	+#define CONFIG_MISC_INIT_R
	57	+
	58	+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	59	+#define CONFIG_SETUP_MEMORY_TAGS 1
	60	+#define CONFIG_INITRD_TAG 1
	61	+#define CONFIG_REVISION_TAG 1
	62	+
	63	+/*
	64	+ * Size of malloc() pool
	65	+ * Total Size Environment - 256k
	66	+ * Malloc - add 256k
	67	+ */
	68	+#define CONFIG_ENV_SIZE (256 << 10)
	69	+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
	70	+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
	71	+ /* initial data */
	72	+/* Vector Base */
	73	+#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
	74	+
	75	+/*
	76	+ * Hardware drivers
	77	+ */
	78	+
	79	+/*
	80	+ * serial port - NS16550 compatible
	81	+ */
	82	+#define V_NS16550_CLK 48000000
	83	+
	84	+#define CONFIG_SYS_NS16550
	85	+#define CONFIG_SYS_NS16550_SERIAL
	86	+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	87	+#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	88	+#define CONFIG_CONS_INDEX 3
	89	+#define CONFIG_SYS_NS16550_COM3 UART3_BASE
	90	+
	91	+#define CONFIG_ENV_IS_NOWHERE
	92	+#define CONFIG_ENV_OVERWRITE
	93	+#define CONFIG_BAUDRATE 115200
	94	+#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
	95	+ 115200}
	96	+
	97	+/* I2C */
	98	+#define CONFIG_HARD_I2C 1
	99	+#define CONFIG_SYS_I2C_SPEED 100000
	100	+#define CONFIG_SYS_I2C_SLAVE 1
	101	+#define CONFIG_SYS_I2C_BUS 0
	102	+#define CONFIG_SYS_I2C_BUS_SELECT 1
	103	+#define CONFIG_DRIVER_OMAP34XX_I2C 1
	104	+#define CONFIG_I2C_MULTI_BUS 1
	105	+
	106	+/* MMC */
	107	+#define CONFIG_MMC 1
	108	+#define CONFIG_OMAP3_MMC 1
	109	+#define CONFIG_SYS_MMC_SET_DEV 1
	110	+#define CONFIG_DOS_PARTITION 1
	111	+
	112	+/* Flash */
	113	+#define CONFIG_SYS_NO_FLASH 1
	114	+
	115	+/* commands to include */
	116	+#include <config_cmd_default.h>
	117	+
	118	+/* Enabled commands */
	119	+#define CONFIG_CMD_EXT2 /* EXT2 Support */
	120	+#define CONFIG_CMD_FAT /* FAT support */
	121	+#define CONFIG_CMD_I2C /* I2C serial bus support */
	122	+#define CONFIG_CMD_MMC /* MMC support */
	123	+
	124	+/* Disabled commands */
	125	+#undef CONFIG_CMD_NET
	126	+#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
	127	+#undef CONFIG_CMD_IMLS /* List all found images */
	128	+
	129	+/*
	130	+ * Enabling relocation of u-boot by default
	131	+ * Relocation can be skipped if u-boot is copied to the TEXT_BASE
	132	+ */
	133	+#undef CONFIG_SKIP_RELOCATE_UBOOT
	134	+
	135	+/*
	136	+ * Environment setup
	137	+ */
	138	+
	139	+/* allow overwriting serial config and ethaddr */
	140	+#define CONFIG_ENV_OVERWRITE
	141	+
	142	+#define CONFIG_EXTRA_ENV_SETTINGS \
	143	+ "loadaddr=0x82000000\0" \
	144	+ "console=ttyS2,115200n8\0" \
	145	+ "mmcdev=1\0" \
	146	+ "mmcroot=/dev/mmcblk0p2 rw\0" \
	147	+ "mmcrootfstype=ext3 rootwait\0" \
	148	+ "mmcargs=setenv bootargs console=${console} " \
	149	+ "root=${mmcroot} " \
	150	+ "rootfstype=${mmcrootfstype}\0" \
	151	+ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	152	+ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	153	+ "source ${loadaddr}\0" \
	154	+ "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	155	+ "mmcboot=echo Booting from mmc${mmcdev} ...; " \
	156	+ "run mmcargs; " \
	157	+ "bootm ${loadaddr}\0" \
	158	+
	159	+#define CONFIG_BOOTCOMMAND \
	160	+ "if mmc init ${mmcdev}; then " \
	161	+ "if run loadbootscript; then " \
	162	+ "run bootscript; " \
	163	+ "else " \
	164	+ "if run loaduimage; then " \
	165	+ "run mmcboot; " \
	166	+ "else run nandboot; " \
	167	+ "fi; " \
	168	+ "fi; " \
	169	+ "fi"
	170	+
	171	+#define CONFIG_AUTO_COMPLETE 1
	172	+
	173	+/*
	174	+ * Miscellaneous configurable options
	175	+ */
	176	+
	177	+#define CONFIG_SYS_LONGHELP /* undef to save memory */
	178	+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
	179	+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	180	+#define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
	181	+#define CONFIG_SYS_CBSIZE 256
	182	+/* Print Buffer Size */
	183	+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	184	+ sizeof(CONFIG_SYS_PROMPT) + 16)
	185	+#define CONFIG_SYS_MAXARGS 16
	186	+/* Boot Argument Buffer Size */
	187	+#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	188	+
	189	+/*
	190	+ * memtest setup
	191	+ */
	192	+#define CONFIG_SYS_MEMTEST_START 0x80000000
	193	+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
	194	+
	195	+/* Default load address */
	196	+#define CONFIG_SYS_LOAD_ADDR 0x80000000
	197	+
	198	+/* Use General purpose timer 1 */
	199	+#define CONFIG_SYS_TIMERBASE GPT1_BASE
	200	+#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
	201	+#define CONFIG_SYS_HZ 1000
	202	+
	203	+/*
	204	+ * Stack sizes
	205	+ *
	206	+ * The stack sizes are set up in start.S using the settings below
	207	+ */
	208	+#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
	209	+#ifdef CONFIG_USE_IRQ
	210	+#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
	211	+#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
	212	+#endif
	213	+
	214	+/*
	215	+ * SDRAM Memory Map
	216	+ * Even though we use two CS all the memory
	217	+ * is mapped to one contiguous block
	218	+ */
	219	+#define CONFIG_NR_DRAM_BANKS 1
	220	+
	221	+#endif /* __CONFIG_H */