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Commit 3f3110d78be1f9f13bfc8e5c64e279f50f2c7c43

Authored by Wolfgang Denk
1 parent 6bef783310
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

MIPS: remove broken "tb0229" board 

The "tb0229" board has long been unmaintained, and is broken.
Remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Showing 9 changed files with 4 additions and 1726 deletions Side-by-side Diff

board/tb0229/Makefile
View file @ 3f3110d
1   -#
2   -# (C) Masami Komiya <mkomiya@sonare.it> 2004
3   -#
4   -# (C) Copyright 2003-2006
5   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6   -#
7   -# See file CREDITS for list of people who contributed to this
8   -# project.
9   -#
10   -# This program is free software; you can redistribute it and/or
11   -# modify it under the terms of the GNU General Public License as
12   -# published by the Free Software Foundation; either version 2 of
13   -# the License, or (at your option) any later version.
14   -#
15   -# This program is distributed in the hope that it will be useful,
16   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
17   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   -# GNU General Public License for more details.
19   -#
20   -# You should have received a copy of the GNU General Public License
21   -# along with this program; if not, write to the Free Software
22   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   -# MA 02111-1307 USA
24   -#
25   -
26   -include $(TOPDIR)/config.mk
27   -
28   -LIB = $(obj)lib$(BOARD).o
29   -
30   -COBJS = $(BOARD).o flash.o vr4131-pci.o
31   -SOBJS = lowlevel_init.o
32   -
33   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
34   -OBJS := $(addprefix $(obj),$(COBJS))
35   -SOBJS := $(addprefix $(obj),$(SOBJS))
36   -
37   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
38   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
39   -
40   -#########################################################################
41   -
42   -# defines $(obj).depend target
43   -include $(SRCTREE)/rules.mk
44   -
45   -sinclude $(obj).depend
46   -
47   -#########################################################################
board/tb0229/config.mk
View file @ 3f3110d
1   -#
2   -# (C) Masami Komiya <mkomiya@sonare.it> 2004
3   -#
4   -# (C) Copyright 2003
5   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6   -#
7   -# See file CREDITS for list of people who contributed to this
8   -# project.
9   -#
10   -# This program is free software; you can redistribute it and/or
11   -# modify it under the terms of the GNU General Public License as
12   -# published by the Free Software Foundation; either version 2 of
13   -# the License, or (at your option) any later version.
14   -#
15   -# This program is distributed in the hope that it will be useful,
16   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
17   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   -# GNU General Public License for more details.
19   -#
20   -# You should have received a copy of the GNU General Public License
21   -# along with this program; if not, write to the Free Software
22   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   -# MA 02111-1307 USA
24   -#
25   -
26   -# ROM version
27   -CONFIG_SYS_TEXT_BASE = 0xBFC00000
28   -
29   -# RAM version
30   -#CONFIG_SYS_TEXT_BASE = 0x80400000
board/tb0229/flash.c
View file @ 3f3110d
Changes suppressed. Click to show
1   -/*
2   - * (C) Masami Komiya <mkomiya@sonare.it> 2004
3   - *
4   - * (C) Copyright 2001-2004
5   - * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -#include <common.h>
27   -#include <asm/processor.h>
28   -
29   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
30   -
31   -
32   -#ifdef CONFIG_SYS_FLASH_16BIT
33   -#define FLASH_WORD_SIZE unsigned short
34   -#define FLASH_ID_MASK 0xFFFF
35   -#else
36   -#define FLASH_WORD_SIZE unsigned long
37   -#define FLASH_ID_MASK 0xFFFFFFFF
38   -#endif
39   -
40   -/*-----------------------------------------------------------------------
41   - * Functions
42   - */
43   -/* stolen from esteem192e/flash.c */
44   -ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info);
45   -
46   -#ifndef CONFIG_SYS_FLASH_16BIT
47   -static int write_word (flash_info_t * info, ulong dest, ulong data);
48   -#else
49   -static int write_short (flash_info_t * info, ulong dest, ushort data);
50   -#endif
51   -static void flash_get_offsets (ulong base, flash_info_t * info);
52   -
53   -
54   -/*-----------------------------------------------------------------------
55   - */
56   -
57   -unsigned long flash_init (void)
58   -{
59   - unsigned long size_b0, size_b1;
60   - int i;
61   - uint pbcr;
62   - unsigned long base_b0, base_b1;
63   -
64   - /* Init: no FLASHes known */
65   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
66   - flash_info[i].flash_id = FLASH_UNKNOWN;
67   - }
68   -
69   - /* Static FLASH Bank configuration here - FIXME XXX */
70   -
71   - size_b0 =
72   - flash_get_size ((volatile FLASH_WORD_SIZE *) CONFIG_SYS_FLASH_BASE,
73   - &flash_info[0]);
74   -
75   - if (flash_info[0].flash_id == FLASH_UNKNOWN) {
76   - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 << 20);
77   - }
78   -
79   - /* Only one bank */
80   - if (CONFIG_SYS_MAX_FLASH_BANKS == 1) {
81   - /* Setup offsets */
82   - flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
83   -
84   - /* Monitor protection ON by default */
85   -#if 0 /* sand: */
86   - (void) flash_protect (FLAG_PROTECT_SET,
87   - FLASH_BASE0_PRELIM - monitor_flash_len +
88   - size_b0,
89   - FLASH_BASE0_PRELIM - 1 + size_b0,
90   - &flash_info[0]);
91   -#else
92   - (void) flash_protect (FLAG_PROTECT_SET,
93   - CONFIG_SYS_MONITOR_BASE,
94   - CONFIG_SYS_MONITOR_BASE + monitor_flash_len -
95   - 1, &flash_info[0]);
96   -#endif
97   - size_b1 = 0;
98   - flash_info[0].size = size_b0;
99   - }
100   -#ifdef CONFIG_SYS_FLASH_BASE_2
101   - /* 2 banks */
102   - else {
103   - size_b1 =
104   - flash_get_size ((volatile FLASH_WORD_SIZE *)
105   - CONFIG_SYS_FLASH_BASE_2, &flash_info[1]);
106   -
107   - /* Re-do sizing to get full correct info */
108   -
109   - if (size_b1) {
110   - mtdcr (EBC0_CFGADDR, PB0CR);
111   - pbcr = mfdcr (EBC0_CFGDATA);
112   - mtdcr (EBC0_CFGADDR, PB0CR);
113   - base_b1 = -size_b1;
114   - pbcr = (pbcr & 0x0001ffff) | base_b1 |
115   - (((size_b1 / 1024 / 1024) - 1) << 17);
116   - mtdcr (EBC0_CFGDATA, pbcr);
117   - /* printf("PB1CR = %x\n", pbcr); */
118   - }
119   -
120   - if (size_b0) {
121   - mtdcr (EBC0_CFGADDR, PB1CR);
122   - pbcr = mfdcr (EBC0_CFGDATA);
123   - mtdcr (EBC0_CFGADDR, PB1CR);
124   - base_b0 = base_b1 - size_b0;
125   - pbcr = (pbcr & 0x0001ffff) | base_b0 |
126   - (((size_b0 / 1024 / 1024) - 1) << 17);
127   - mtdcr (EBC0_CFGDATA, pbcr);
128   - /* printf("PB0CR = %x\n", pbcr); */
129   - }
130   -
131   - size_b0 =
132   - flash_get_size ((volatile FLASH_WORD_SIZE *) base_b0,
133   - &flash_info[0]);
134   -
135   - flash_get_offsets (base_b0, &flash_info[0]);
136   -
137   - /* monitor protection ON by default */
138   -#if 0 /* sand: */
139   - (void) flash_protect (FLAG_PROTECT_SET,
140   - FLASH_BASE0_PRELIM - monitor_flash_len +
141   - size_b0,
142   - FLASH_BASE0_PRELIM - 1 + size_b0,
143   - &flash_info[0]);
144   -#else
145   - (void) flash_protect (FLAG_PROTECT_SET,
146   - CONFIG_SYS_MONITOR_BASE,
147   - CONFIG_SYS_MONITOR_BASE + monitor_flash_len -
148   - 1, &flash_info[0]);
149   -#endif
150   -
151   - if (size_b1) {
152   - /* Re-do sizing to get full correct info */
153   - size_b1 =
154   - flash_get_size ((volatile FLASH_WORD_SIZE *)
155   - base_b1, &flash_info[1]);
156   -
157   - flash_get_offsets (base_b1, &flash_info[1]);
158   -
159   - /* monitor protection ON by default */
160   - (void) flash_protect (FLAG_PROTECT_SET,
161   - base_b1 + size_b1 -
162   - monitor_flash_len,
163   - base_b1 + size_b1 - 1,
164   - &flash_info[1]);
165   - /* monitor protection OFF by default (one is enough) */
166   - (void) flash_protect (FLAG_PROTECT_CLEAR,
167   - base_b0 + size_b0 -
168   - monitor_flash_len,
169   - base_b0 + size_b0 - 1,
170   - &flash_info[0]);
171   - } else {
172   - flash_info[1].flash_id = FLASH_UNKNOWN;
173   - flash_info[1].sector_count = -1;
174   - }
175   -
176   - flash_info[0].size = size_b0;
177   - flash_info[1].size = size_b1;
178   - } /* else 2 banks */
179   -#endif
180   - return (size_b0 + size_b1);
181   -}
182   -
183   -
184   -/*-----------------------------------------------------------------------
185   - */
186   -
187   -static void flash_get_offsets (ulong base, flash_info_t * info)
188   -{
189   - int i;
190   -
191   - /* set up sector start adress table */
192   - if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F320J3A ||
193   - (info->flash_id & FLASH_TYPEMASK) == FLASH_28F640J3A ||
194   - (info->flash_id & FLASH_TYPEMASK) == FLASH_28F128J3A) {
195   - for (i = 0; i < info->sector_count; i++) {
196   - info->start[i] =
197   - base + (i * info->size / info->sector_count);
198   - }
199   - } else if (info->flash_id & FLASH_BTYPE) {
200   - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
201   -
202   -#ifndef CONFIG_SYS_FLASH_16BIT
203   - /* set sector offsets for bottom boot block type */
204   - info->start[0] = base + 0x00000000;
205   - info->start[1] = base + 0x00004000;
206   - info->start[2] = base + 0x00008000;
207   - info->start[3] = base + 0x0000C000;
208   - info->start[4] = base + 0x00010000;
209   - info->start[5] = base + 0x00014000;
210   - info->start[6] = base + 0x00018000;
211   - info->start[7] = base + 0x0001C000;
212   - for (i = 8; i < info->sector_count; i++) {
213   - info->start[i] =
214   - base + (i * 0x00020000) - 0x000E0000;
215   - }
216   - } else {
217   - /* set sector offsets for bottom boot block type */
218   - info->start[0] = base + 0x00000000;
219   - info->start[1] = base + 0x00008000;
220   - info->start[2] = base + 0x0000C000;
221   - info->start[3] = base + 0x00010000;
222   - for (i = 4; i < info->sector_count; i++) {
223   - info->start[i] =
224   - base + (i * 0x00020000) - 0x00060000;
225   - }
226   - }
227   -#else
228   - /* set sector offsets for bottom boot block type */
229   - info->start[0] = base + 0x00000000;
230   - info->start[1] = base + 0x00002000;
231   - info->start[2] = base + 0x00004000;
232   - info->start[3] = base + 0x00006000;
233   - info->start[4] = base + 0x00008000;
234   - info->start[5] = base + 0x0000A000;
235   - info->start[6] = base + 0x0000C000;
236   - info->start[7] = base + 0x0000E000;
237   - for (i = 8; i < info->sector_count; i++) {
238   - info->start[i] =
239   - base + (i * 0x00010000) - 0x00070000;
240   - }
241   - } else {
242   - /* set sector offsets for bottom boot block type */
243   - info->start[0] = base + 0x00000000;
244   - info->start[1] = base + 0x00004000;
245   - info->start[2] = base + 0x00006000;
246   - info->start[3] = base + 0x00008000;
247   - for (i = 4; i < info->sector_count; i++) {
248   - info->start[i] =
249   - base + (i * 0x00010000) - 0x00030000;
250   - }
251   - }
252   -#endif
253   - } else {
254   - /* set sector offsets for top boot block type */
255   - i = info->sector_count - 1;
256   - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
257   -
258   -#ifndef CONFIG_SYS_FLASH_16BIT
259   - info->start[i--] = base + info->size - 0x00004000;
260   - info->start[i--] = base + info->size - 0x00008000;
261   - info->start[i--] = base + info->size - 0x0000C000;
262   - info->start[i--] = base + info->size - 0x00010000;
263   - info->start[i--] = base + info->size - 0x00014000;
264   - info->start[i--] = base + info->size - 0x00018000;
265   - info->start[i--] = base + info->size - 0x0001C000;
266   - for (; i >= 0; i--) {
267   - info->start[i] = base + i * 0x00020000;
268   - }
269   -
270   - } else {
271   -
272   - info->start[i--] = base + info->size - 0x00008000;
273   - info->start[i--] = base + info->size - 0x0000C000;
274   - info->start[i--] = base + info->size - 0x00010000;
275   - for (; i >= 0; i--) {
276   - info->start[i] = base + i * 0x00020000;
277   - }
278   - }
279   -#else
280   - info->start[i--] = base + info->size - 0x00002000;
281   - info->start[i--] = base + info->size - 0x00004000;
282   - info->start[i--] = base + info->size - 0x00006000;
283   - info->start[i--] = base + info->size - 0x00008000;
284   - info->start[i--] = base + info->size - 0x0000A000;
285   - info->start[i--] = base + info->size - 0x0000C000;
286   - info->start[i--] = base + info->size - 0x0000E000;
287   - for (; i >= 0; i--) {
288   - info->start[i] = base + i * 0x00010000;
289   - }
290   -
291   - } else {
292   -
293   - info->start[i--] = base + info->size - 0x00004000;
294   - info->start[i--] = base + info->size - 0x00006000;
295   - info->start[i--] = base + info->size - 0x00008000;
296   - for (; i >= 0; i--) {
297   - info->start[i] = base + i * 0x00010000;
298   - }
299   - }
300   -#endif
301   - }
302   -
303   -
304   -}
305   -
306   -/*-----------------------------------------------------------------------
307   - */
308   -
309   -void flash_print_info (flash_info_t * info)
310   -{
311   - int i;
312   - uchar *boottype;
313   - uchar botboot[] = ", bottom boot sect)\n";
314   - uchar topboot[] = ", top boot sector)\n";
315   -
316   - if (info->flash_id == FLASH_UNKNOWN) {
317   - printf ("missing or unknown FLASH type\n");
318   - return;
319   - }
320   -
321   - switch (info->flash_id & FLASH_VENDMASK) {
322   - case FLASH_MAN_AMD:
323   - printf ("AMD ");
324   - break;
325   - case FLASH_MAN_FUJ:
326   - printf ("FUJITSU ");
327   - break;
328   - case FLASH_MAN_SST:
329   - printf ("SST ");
330   - break;
331   - case FLASH_MAN_STM:
332   - printf ("STM ");
333   - break;
334   - case FLASH_MAN_INTEL:
335   - printf ("INTEL ");
336   - break;
337   - default:
338   - printf ("Unknown Vendor ");
339   - break;
340   - }
341   -
342   - if (info->flash_id & 0x0001) {
343   - boottype = botboot;
344   - } else {
345   - boottype = topboot;
346   - }
347   -
348   - switch (info->flash_id & FLASH_TYPEMASK) {
349   - case FLASH_AM400B:
350   - printf ("AM29LV400B (4 Mbit%s", boottype);
351   - break;
352   - case FLASH_AM400T:
353   - printf ("AM29LV400T (4 Mbit%s", boottype);
354   - break;
355   - case FLASH_AM800B:
356   - printf ("AM29LV800B (8 Mbit%s", boottype);
357   - break;
358   - case FLASH_AM800T:
359   - printf ("AM29LV800T (8 Mbit%s", boottype);
360   - break;
361   - case FLASH_AM160B:
362   - printf ("AM29LV160B (16 Mbit%s", boottype);
363   - break;
364   - case FLASH_AM160T:
365   - printf ("AM29LV160T (16 Mbit%s", boottype);
366   - break;
367   - case FLASH_AM320B:
368   - printf ("AM29LV320B (32 Mbit%s", boottype);
369   - break;
370   - case FLASH_AM320T:
371   - printf ("AM29LV320T (32 Mbit%s", boottype);
372   - break;
373   - case FLASH_INTEL800B:
374   - printf ("INTEL28F800B (8 Mbit%s", boottype);
375   - break;
376   - case FLASH_INTEL800T:
377   - printf ("INTEL28F800T (8 Mbit%s", boottype);
378   - break;
379   - case FLASH_INTEL160B:
380   - printf ("INTEL28F160B (16 Mbit%s", boottype);
381   - break;
382   - case FLASH_INTEL160T:
383   - printf ("INTEL28F160T (16 Mbit%s", boottype);
384   - break;
385   - case FLASH_INTEL320B:
386   - printf ("INTEL28F320B (32 Mbit%s", boottype);
387   - break;
388   - case FLASH_INTEL320T:
389   - printf ("INTEL28F320T (32 Mbit%s", boottype);
390   - break;
391   -
392   -#if 0 /* enable when devices are available */
393   -
394   - case FLASH_INTEL640B:
395   - printf ("INTEL28F640B (64 Mbit%s", boottype);
396   - break;
397   - case FLASH_INTEL640T:
398   - printf ("INTEL28F640T (64 Mbit%s", boottype);
399   - break;
400   -#endif
401   - case FLASH_28F320J3A:
402   - printf ("INTEL28F320J3A (32 Mbit%s", boottype);
403   - break;
404   - case FLASH_28F640J3A:
405   - printf ("INTEL28F640J3A (64 Mbit%s", boottype);
406   - break;
407   - case FLASH_28F128J3A:
408   - printf ("INTEL28F128J3A (128 Mbit%s", boottype);
409   - break;
410   -
411   - default:
412   - printf ("Unknown Chip Type\n");
413   - break;
414   - }
415   -
416   - printf (" Size: %ld MB in %d Sectors\n",
417   - info->size >> 20, info->sector_count);
418   -
419   - printf (" Sector Start Addresses:");
420   - for (i = 0; i < info->sector_count; ++i) {
421   - if ((i % 5) == 0)
422   - printf ("\n ");
423   - printf (" %08lX%s",
424   - info->start[i], info->protect[i] ? " (RO)" : " ");
425   - }
426   - printf ("\n");
427   - return;
428   -}
429   -
430   -
431   -/*-----------------------------------------------------------------------
432   - */
433   -
434   -
435   -/*-----------------------------------------------------------------------
436   - */
437   -
438   -/*
439   - * The following code cannot be run from FLASH!
440   - */
441   -ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info)
442   -{
443   - short i;
444   - ulong base = (ulong) addr;
445   - FLASH_WORD_SIZE value;
446   -
447   - /* Write auto select command: read Manufacturer ID */
448   -
449   -
450   -#ifndef CONFIG_SYS_FLASH_16BIT
451   -
452   - /*
453   - * Note: if it is an AMD flash and the word at addr[0000]
454   - * is 0x00890089 this routine will think it is an Intel
455   - * flash device and may(most likely) cause trouble.
456   - */
457   -
458   - addr[0x0000] = 0x00900090;
459   - if (addr[0x0000] != 0x00890089) {
460   - addr[0x0555] = 0x00AA00AA;
461   - addr[0x02AA] = 0x00550055;
462   - addr[0x0555] = 0x00900090;
463   -#else
464   -
465   - /*
466   - * Note: if it is an AMD flash and the word at addr[0000]
467   - * is 0x0089 this routine will think it is an Intel
468   - * flash device and may(most likely) cause trouble.
469   - */
470   -
471   - addr[0x0000] = 0x0090;
472   -
473   - if (addr[0x0000] != 0x0089) {
474   - addr[0x0555] = 0x00AA;
475   - addr[0x02AA] = 0x0055;
476   - addr[0x0555] = 0x0090;
477   -#endif
478   - }
479   - value = addr[0];
480   -
481   - switch (value) {
482   - case (AMD_MANUFACT & FLASH_ID_MASK):
483   - info->flash_id = FLASH_MAN_AMD;
484   - break;
485   - case (FUJ_MANUFACT & FLASH_ID_MASK):
486   - info->flash_id = FLASH_MAN_FUJ;
487   - break;
488   - case (STM_MANUFACT & FLASH_ID_MASK):
489   - info->flash_id = FLASH_MAN_STM;
490   - break;
491   - case (SST_MANUFACT & FLASH_ID_MASK):
492   - info->flash_id = FLASH_MAN_SST;
493   - break;
494   - case (INTEL_MANUFACT & FLASH_ID_MASK):
495   - info->flash_id = FLASH_MAN_INTEL;
496   - break;
497   - default:
498   - info->flash_id = FLASH_UNKNOWN;
499   - info->sector_count = 0;
500   - info->size = 0;
501   - return (0); /* no or unknown flash */
502   -
503   - }
504   -
505   - value = addr[1]; /* device ID */
506   -
507   - switch (value) {
508   -
509   - case (AMD_ID_LV400T & FLASH_ID_MASK):
510   - info->flash_id += FLASH_AM400T;
511   - info->sector_count = 11;
512   - info->size = 0x00100000;
513   - break; /* => 1 MB */
514   -
515   - case (AMD_ID_LV400B & FLASH_ID_MASK):
516   - info->flash_id += FLASH_AM400B;
517   - info->sector_count = 11;
518   - info->size = 0x00100000;
519   - break; /* => 1 MB */
520   -
521   - case (AMD_ID_LV800T & FLASH_ID_MASK):
522   - info->flash_id += FLASH_AM800T;
523   - info->sector_count = 19;
524   - info->size = 0x00200000;
525   - break; /* => 2 MB */
526   -
527   - case (AMD_ID_LV800B & FLASH_ID_MASK):
528   - info->flash_id += FLASH_AM800B;
529   - info->sector_count = 19;
530   - info->size = 0x00200000;
531   - break; /* => 2 MB */
532   -
533   - case (AMD_ID_LV160T & FLASH_ID_MASK):
534   - info->flash_id += FLASH_AM160T;
535   - info->sector_count = 35;
536   - info->size = 0x00400000;
537   - break; /* => 4 MB */
538   -
539   - case (AMD_ID_LV160B & FLASH_ID_MASK):
540   - info->flash_id += FLASH_AM160B;
541   - info->sector_count = 35;
542   - info->size = 0x00400000;
543   - break; /* => 4 MB */
544   -#if 0 /* enable when device IDs are available */
545   - case (AMD_ID_LV320T & FLASH_ID_MASK):
546   - info->flash_id += FLASH_AM320T;
547   - info->sector_count = 67;
548   - info->size = 0x00800000;
549   - break; /* => 8 MB */
550   -
551   - case (AMD_ID_LV320B & FLASH_ID_MASK):
552   - info->flash_id += FLASH_AM320B;
553   - info->sector_count = 67;
554   - info->size = 0x00800000;
555   - break; /* => 8 MB */
556   -#endif
557   -
558   - case (INTEL_ID_28F800B3T & FLASH_ID_MASK):
559   - info->flash_id += FLASH_INTEL800T;
560   - info->sector_count = 23;
561   - info->size = 0x00200000;
562   - break; /* => 2 MB */
563   -
564   - case (INTEL_ID_28F800B3B & FLASH_ID_MASK):
565   - info->flash_id += FLASH_INTEL800B;
566   - info->sector_count = 23;
567   - info->size = 0x00200000;
568   - break; /* => 2 MB */
569   -
570   - case (INTEL_ID_28F160B3T & FLASH_ID_MASK):
571   - info->flash_id += FLASH_INTEL160T;
572   - info->sector_count = 39;
573   - info->size = 0x00400000;
574   - break; /* => 4 MB */
575   -
576   - case (INTEL_ID_28F160B3B & FLASH_ID_MASK):
577   - info->flash_id += FLASH_INTEL160B;
578   - info->sector_count = 39;
579   - info->size = 0x00400000;
580   - break; /* => 4 MB */
581   -
582   - case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
583   - info->flash_id += FLASH_INTEL320T;
584   - info->sector_count = 71;
585   - info->size = 0x00800000;
586   - break; /* => 8 MB */
587   -
588   - case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
589   - info->flash_id += FLASH_AM320B;
590   - info->sector_count = 71;
591   - info->size = 0x00800000;
592   - break; /* => 8 MB */
593   -
594   -#if 0 /* enable when devices are available */
595   - case (INTEL_ID_28F320B3T & FLASH_ID_MASK):
596   - info->flash_id += FLASH_INTEL320T;
597   - info->sector_count = 135;
598   - info->size = 0x01000000;
599   - break; /* => 16 MB */
600   -
601   - case (INTEL_ID_28F320B3B & FLASH_ID_MASK):
602   - info->flash_id += FLASH_AM320B;
603   - info->sector_count = 135;
604   - info->size = 0x01000000;
605   - break; /* => 16 MB */
606   -#endif
607   - case (INTEL_ID_28F320J3A & FLASH_ID_MASK):
608   - info->flash_id += FLASH_28F320J3A;
609   - info->sector_count = 32;
610   - info->size = 0x00400000;
611   - break; /* => 32 MBit */
612   - case (INTEL_ID_28F640J3A & FLASH_ID_MASK):
613   - info->flash_id += FLASH_28F640J3A;
614   - info->sector_count = 64;
615   - info->size = 0x00800000;
616   - break; /* => 64 MBit */
617   - case (INTEL_ID_28F128J3A & FLASH_ID_MASK):
618   - info->flash_id += FLASH_28F128J3A;
619   - info->sector_count = 128;
620   - info->size = 0x01000000;
621   - break; /* => 128 MBit */
622   -
623   - default:
624   - /* FIXME */
625   - info->flash_id = FLASH_UNKNOWN;
626   - return (0); /* => no or unknown flash */
627   - }
628   -
629   - flash_get_offsets (base, info);
630   -
631   - /* check for protected sectors */
632   - for (i = 0; i < info->sector_count; i++) {
633   - /* read sector protection at sector address, (A7 .. A0) = 0x02 */
634   - /* D0 = 1 if protected */
635   - addr = (volatile FLASH_WORD_SIZE *) (info->start[i]);
636   - info->protect[i] = addr[2] & 1;
637   - }
638   -
639   - /*
640   - * Prevent writes to uninitialized FLASH.
641   - */
642   - if (info->flash_id != FLASH_UNKNOWN) {
643   - addr = (volatile FLASH_WORD_SIZE *) info->start[0];
644   - if ((info->flash_id & 0xFF00) == FLASH_MAN_INTEL) {
645   - *addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
646   - } else {
647   - *addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
648   - }
649   - }
650   -
651   - return (info->size);
652   -}
653   -
654   -
655   -/*-----------------------------------------------------------------------
656   - */
657   -
658   -int flash_erase (flash_info_t * info, int s_first, int s_last)
659   -{
660   -
661   - volatile FLASH_WORD_SIZE *addr =
662   - (volatile FLASH_WORD_SIZE *) (info->start[0]);
663   - int flag, prot, sect, l_sect, barf;
664   - ulong start, now, last;
665   - int rcode = 0;
666   -
667   - if ((s_first < 0) || (s_first > s_last)) {
668   - if (info->flash_id == FLASH_UNKNOWN) {
669   - printf ("- missing\n");
670   - } else {
671   - printf ("- no sectors to erase\n");
672   - }
673   - return 1;
674   - }
675   -
676   - if ((info->flash_id == FLASH_UNKNOWN) ||
677   - ((info->flash_id > FLASH_AMD_COMP) &&
678   - ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL))) {
679   - printf ("Can't erase unknown flash type - aborted\n");
680   - return 1;
681   - }
682   -
683   - prot = 0;
684   - for (sect = s_first; sect <= s_last; ++sect) {
685   - if (info->protect[sect]) {
686   - prot++;
687   - }
688   - }
689   -
690   - if (prot) {
691   - printf ("- Warning: %d protected sectors will not be erased!\n", prot);
692   - } else {
693   - printf ("\n");
694   - }
695   -
696   - l_sect = -1;
697   -
698   - /* Disable interrupts which might cause a timeout here */
699   - flag = disable_interrupts ();
700   - if (info->flash_id < FLASH_AMD_COMP) {
701   -#ifndef CONFIG_SYS_FLASH_16BIT
702   - addr[0x0555] = 0x00AA00AA;
703   - addr[0x02AA] = 0x00550055;
704   - addr[0x0555] = 0x00800080;
705   - addr[0x0555] = 0x00AA00AA;
706   - addr[0x02AA] = 0x00550055;
707   -#else
708   - addr[0x0555] = 0x00AA;
709   - addr[0x02AA] = 0x0055;
710   - addr[0x0555] = 0x0080;
711   - addr[0x0555] = 0x00AA;
712   - addr[0x02AA] = 0x0055;
713   -#endif
714   - /* Start erase on unprotected sectors */
715   - for (sect = s_first; sect <= s_last; sect++) {
716   - if (info->protect[sect] == 0) { /* not protected */
717   - addr = (volatile FLASH_WORD_SIZE *) (info->
718   - start
719   - [sect]);
720   - addr[0] = (0x00300030 & FLASH_ID_MASK);
721   - l_sect = sect;
722   - }
723   - }
724   -
725   - /* re-enable interrupts if necessary */
726   - if (flag)
727   - enable_interrupts ();
728   -
729   - /* wait at least 80us - let's wait 1 ms */
730   - udelay (1000);
731   -
732   - /*
733   - * We wait for the last triggered sector
734   - */
735   - if (l_sect < 0)
736   - goto DONE;
737   -
738   - start = get_timer (0);
739   - last = start;
740   - addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
741   - while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
742   - (0x00800080 & FLASH_ID_MASK)) {
743   - if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
744   - printf ("Timeout\n");
745   - return 1;
746   - }
747   - /* show that we're waiting */
748   - if ((now - last) > 1000000) { /* every second */
749   - serial_putc ('.');
750   - last = now;
751   - }
752   - }
753   -
754   - DONE:
755   - /* reset to read mode */
756   - addr = (volatile FLASH_WORD_SIZE *) info->start[0];
757   - addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
758   - } else {
759   -
760   -
761   - for (sect = s_first; sect <= s_last; sect++) {
762   - if (info->protect[sect] == 0) { /* not protected */
763   - barf = 0;
764   -#ifndef CONFIG_SYS_FLASH_16BIT
765   - addr = (vu_long *) (info->start[sect]);
766   - addr[0] = 0x00500050;
767   - addr[0] = 0x00200020;
768   - addr[0] = 0x00D000D0;
769   - while (!(addr[0] & 0x00800080)); /* wait for error or finish */
770   - if (addr[0] & 0x003A003A) { /* check for error */
771   - barf = addr[0] & 0x003A0000;
772   - if (barf) {
773   - barf >>= 16;
774   - } else {
775   - barf = addr[0] & 0x0000003A;
776   - }
777   - }
778   -#else
779   - addr = (vu_short *) (info->start[sect]);
780   - addr[0] = 0x0050; /* clear status register */
781   - addr[0] = 0x0020;
782   - addr[0] = 0x00D0;
783   - while (!(addr[0] & 0x0080)); /* wait for error or finish */
784   - if (addr[0] & 0x003A) /* check for error */
785   - barf = addr[0] & 0x003A;
786   -#endif
787   - if (barf) {
788   - printf ("\nFlash error in sector at %lx\n", (unsigned long) addr);
789   - if (barf & 0x0002)
790   - printf ("Block locked, not erased.\n");
791   - if ((barf & 0x0030) == 0x0030)
792   - printf ("Command Sequence error.\n");
793   - if ((barf & 0x0030) == 0x0020)
794   - printf ("Block Erase error.\n");
795   - if (barf & 0x0008)
796   - printf ("Vpp Low error.\n");
797   - rcode = 1;
798   - } else
799   - printf (".");
800   - l_sect = sect;
801   - }
802   - addr = (volatile FLASH_WORD_SIZE *) info->start[0];
803   -#ifndef CONFIG_SYS_FLASH_16BIT
804   - addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
805   -#else
806   - addr[0] = (0x00FF & FLASH_ID_MASK); /* reset bank */
807   -#endif
808   - }
809   -
810   - }
811   - printf (" done\n");
812   - return rcode;
813   -}
814   -
815   -/*-----------------------------------------------------------------------
816   - */
817   -
818   -/*flash_info_t *addr2info (ulong addr)
819   -{
820   - flash_info_t *info;
821   - int i;
822   -
823   - for (i=0, info=&flash_info[0]; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
824   - if ((addr >= info->start[0]) &&
825   - (addr < (info->start[0] + info->size)) ) {
826   - return (info);
827   - }
828   - }
829   -
830   - return (NULL);
831   -}
832   -*/
833   -/*-----------------------------------------------------------------------
834   - * Copy memory to flash.
835   - * Make sure all target addresses are within Flash bounds,
836   - * and no protected sectors are hit.
837   - * Returns:
838   - * 0 - OK
839   - * 1 - write timeout
840   - * 2 - Flash not erased
841   - * 4 - target range includes protected sectors
842   - * 8 - target address not in Flash memory
843   - */
844   -
845   -/*int flash_write (uchar *src, ulong addr, ulong cnt)
846   -{
847   - int i;
848   - ulong end = addr + cnt - 1;
849   - flash_info_t *info_first = addr2info (addr);
850   - flash_info_t *info_last = addr2info (end );
851   - flash_info_t *info;
852   -
853   - if (cnt == 0) {
854   - return (0);
855   - }
856   -
857   - if (!info_first || !info_last) {
858   - return (8);
859   - }
860   -
861   - for (info = info_first; info <= info_last; ++info) {
862   - ulong b_end = info->start[0] + info->size;*/ /* bank end addr */
863   -/* short s_end = info->sector_count - 1;
864   - for (i=0; i<info->sector_count; ++i) {
865   - ulong e_addr = (i == s_end) ? b_end : info->start[i + 1];
866   -
867   - if ((end >= info->start[i]) && (addr < e_addr) &&
868   - (info->protect[i] != 0) ) {
869   - return (4);
870   - }
871   - }
872   - }
873   -
874   -*/ /* finally write data to flash */
875   -/* for (info = info_first; info <= info_last && cnt>0; ++info) {
876   - ulong len;
877   -
878   - len = info->start[0] + info->size - addr;
879   - if (len > cnt)
880   - len = cnt;
881   - if ((i = write_buff(info, src, addr, len)) != 0) {
882   - return (i);
883   - }
884   - cnt -= len;
885   - addr += len;
886   - src += len;
887   - }
888   - return (0);
889   -}
890   -*/
891   -/*-----------------------------------------------------------------------
892   - * Copy memory to flash, returns:
893   - * 0 - OK
894   - * 1 - write timeout
895   - * 2 - Flash not erased
896   - */
897   -
898   -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
899   -{
900   -#ifndef CONFIG_SYS_FLASH_16BIT
901   - ulong cp, wp, data;
902   - int l;
903   -#else
904   - ulong cp, wp;
905   - ushort data;
906   -#endif
907   - int i, rc;
908   -
909   -#ifndef CONFIG_SYS_FLASH_16BIT
910   -
911   -
912   - wp = (addr & ~3); /* get lower word aligned address */
913   -
914   - /*
915   - * handle unaligned start bytes
916   - */
917   - if ((l = addr - wp) != 0) {
918   - data = 0;
919   - for (i = 0, cp = wp; i < l; ++i, ++cp) {
920   - data = (data << 8) | (*(uchar *) cp);
921   - }
922   - for (; i < 4 && cnt > 0; ++i) {
923   - data = (data << 8) | *src++;
924   - --cnt;
925   - ++cp;
926   - }
927   - for (; cnt == 0 && i < 4; ++i, ++cp) {
928   - data = (data << 8) | (*(uchar *) cp);
929   - }
930   -
931   - if ((rc = write_word (info, wp, data)) != 0) {
932   - return (rc);
933   - }
934   - wp += 4;
935   - }
936   -
937   - /*
938   - * handle word aligned part
939   - */
940   - while (cnt >= 4) {
941   - data = 0;
942   - for (i = 0; i < 4; ++i) {
943   - data = (data << 8) | *src++;
944   - }
945   - if ((rc = write_word (info, wp, data)) != 0) {
946   - return (rc);
947   - }
948   - wp += 4;
949   - cnt -= 4;
950   - }
951   -
952   - if (cnt == 0) {
953   - return (0);
954   - }
955   -
956   - /*
957   - * handle unaligned tail bytes
958   - */
959   - data = 0;
960   - for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
961   - data = (data << 8) | *src++;
962   - --cnt;
963   - }
964   - for (; i < 4; ++i, ++cp) {
965   - data = (data << 8) | (*(uchar *) cp);
966   - }
967   -
968   - return (write_word (info, wp, data));
969   -
970   -#else
971   - wp = (addr & ~1); /* get lower word aligned address */
972   -
973   - /*
974   - * handle unaligned start byte
975   - */
976   - if (addr - wp) {
977   - data = 0;
978   - data = (data << 8) | *src++;
979   - --cnt;
980   - if ((rc = write_short (info, wp, data)) != 0) {
981   - return (rc);
982   - }
983   - wp += 2;
984   - }
985   -
986   - /*
987   - * handle word aligned part
988   - */
989   -/* l = 0; used for debuging */
990   - while (cnt >= 2) {
991   - data = 0;
992   - for (i = 0; i < 2; ++i) {
993   - data = (data << 8) | *src++;
994   - }
995   -
996   -/* if(!l){
997   - printf("%x",data);
998   - l = 1;
999   - } used for debuging */
1000   -
1001   - if ((rc = write_short (info, wp, data)) != 0) {
1002   - return (rc);
1003   - }
1004   - wp += 2;
1005   - cnt -= 2;
1006   - }
1007   -
1008   - if (cnt == 0) {
1009   - return (0);
1010   - }
1011   -
1012   - /*
1013   - * handle unaligned tail bytes
1014   - */
1015   - data = 0;
1016   - for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
1017   - data = (data << 8) | *src++;
1018   - --cnt;
1019   - }
1020   - for (; i < 2; ++i, ++cp) {
1021   - data = (data << 8) | (*(uchar *) cp);
1022   - }
1023   -
1024   - return (write_short (info, wp, data));
1025   -
1026   -
1027   -#endif
1028   -}
1029   -
1030   -/*-----------------------------------------------------------------------
1031   - * Write a word to Flash, returns:
1032   - * 0 - OK
1033   - * 1 - write timeout
1034   - * 2 - Flash not erased
1035   - */
1036   -#ifndef CONFIG_SYS_FLASH_16BIT
1037   -static int write_word (flash_info_t * info, ulong dest, ulong data)
1038   -{
1039   - vu_long *addr = (vu_long *) (info->start[0]);
1040   - ulong start, barf;
1041   - int flag;
1042   -
1043   -#if defined (__MIPSEL__)
1044   - data = cpu_to_be32 (data);
1045   -#endif
1046   -
1047   - /* Check if Flash is (sufficiently) erased */
1048   - if ((*((vu_long *) dest) & data) != data) {
1049   - return (2);
1050   - }
1051   -
1052   - /* Disable interrupts which might cause a timeout here */
1053   - flag = disable_interrupts ();
1054   -
1055   - if (info->flash_id < FLASH_AMD_COMP) {
1056   - /* AMD stuff */
1057   - addr[0x0555] = 0x00AA00AA;
1058   - addr[0x02AA] = 0x00550055;
1059   - addr[0x0555] = 0x00A000A0;
1060   - } else {
1061   - /* intel stuff */
1062   - *addr = 0x00400040;
1063   - }
1064   -
1065   - *((vu_long *) dest) = data;
1066   -
1067   - /* re-enable interrupts if necessary */
1068   - if (flag)
1069   - enable_interrupts ();
1070   -
1071   - /* data polling for D7 */
1072   - start = get_timer (0);
1073   -
1074   - if (info->flash_id < FLASH_AMD_COMP) {
1075   -
1076   - while ((*((vu_long *) dest) & 0x00800080) !=
1077   - (data & 0x00800080)) {
1078   - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
1079   - printf ("timeout\n");
1080   - return (1);
1081   - }
1082   - }
1083   -
1084   - } else {
1085   -
1086   - while (!(addr[0] & 0x00800080)) { /* wait for error or finish */
1087   - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
1088   - printf ("timeout\n");
1089   - return (1);
1090   - }
1091   - }
1092   -
1093   - if (addr[0] & 0x003A003A) { /* check for error */
1094   - barf = addr[0] & 0x003A0000;
1095   - if (barf) {
1096   - barf >>= 16;
1097   - } else {
1098   - barf = addr[0] & 0x0000003A;
1099   - }
1100   - printf ("\nFlash write error at address %lx\n",
1101   - (unsigned long) dest);
1102   - if (barf & 0x0002)
1103   - printf ("Block locked, not erased.\n");
1104   - if (barf & 0x0010)
1105   - printf ("Programming error.\n");
1106   - if (barf & 0x0008)
1107   - printf ("Vpp Low error.\n");
1108   - return (2);
1109   - }
1110   -
1111   -
1112   - }
1113   -
1114   - return (0);
1115   -}
1116   -
1117   -#else
1118   -
1119   -static int write_short (flash_info_t * info, ulong dest, ushort data)
1120   -{
1121   - vu_short *addr = (vu_short *) (info->start[0]);
1122   - ulong start, barf;
1123   - int flag;
1124   -
1125   -#if defined (__MIPSEL__)
1126   - data = cpu_to_be16 (data);
1127   -#endif
1128   -
1129   - /* Check if Flash is (sufficiently) erased */
1130   - if ((*((vu_short *) dest) & data) != data) {
1131   - return (2);
1132   - }
1133   -
1134   - /* Disable interrupts which might cause a timeout here */
1135   - flag = disable_interrupts ();
1136   -
1137   - if (info->flash_id < FLASH_AMD_COMP) {
1138   - /* AMD stuff */
1139   - addr[0x0555] = 0x00AA;
1140   - addr[0x02AA] = 0x0055;
1141   - addr[0x0555] = 0x00A0;
1142   - } else {
1143   - /* intel stuff */
1144   - *addr = 0x00D0;
1145   - *addr = 0x0040;
1146   - }
1147   - *((vu_short *) dest) = data;
1148   -
1149   - /* re-enable interrupts if necessary */
1150   - if (flag)
1151   - enable_interrupts ();
1152   -
1153   - /* data polling for D7 */
1154   - start = get_timer (0);
1155   -
1156   - if (info->flash_id < FLASH_AMD_COMP) {
1157   - /* AMD stuff */
1158   - while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
1159   - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
1160   - return (1);
1161   - }
1162   - }
1163   -
1164   - } else {
1165   - /* intel stuff */
1166   - while (!(addr[0] & 0x0080)) { /* wait for error or finish */
1167   - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
1168   - return (1);
1169   - }
1170   -
1171   - if (addr[0] & 0x003A) { /* check for error */
1172   - barf = addr[0] & 0x003A;
1173   - printf ("\nFlash write error at address %lx\n",
1174   - (unsigned long) dest);
1175   - if (barf & 0x0002)
1176   - printf ("Block locked, not erased.\n");
1177   - if (barf & 0x0010)
1178   - printf ("Programming error.\n");
1179   - if (barf & 0x0008)
1180   - printf ("Vpp Low error.\n");
1181   - return (2);
1182   - }
1183   - *addr = 0x00B0;
1184   - *addr = 0x0070;
1185   - while (!(addr[0] & 0x0080)) { /* wait for error or finish */
1186   - if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT)
1187   - return (1);
1188   - }
1189   -
1190   - *addr = 0x00FF;
1191   -
1192   - }
1193   -
1194   - return (0);
1195   -
1196   -}
1197   -#endif
board/tb0229/lowlevel_init.S
View file @ 3f3110d
1   -/*
2   - * Memory sub-system initialization code for TANBAC Evaluation board TB0229.
3   - *
4   - * Copyright (c) 2003 Masami Komiya <mkomiya@sonare.it>
5   - *
6   - * This program is free software; you can redistribute it and/or
7   - * modify it under the terms of the GNU General Public License as
8   - * published by the Free Software Foundation; either version 2, or (at
9   - * your option) any later version.
10   - */
11   -
12   -#include <config.h>
13   -#include <asm/regdef.h>
14   -
15   -
16   - .globl lowlevel_init
17   -lowlevel_init:
18   -
19   - /* BCUCNTREG1 = 0x0040 */
20   - la t0, 0xaf000000
21   - li t1, 0x0040
22   - sh t1, 0(t0)
23   -
24   - /* ROMSIZEREG = 0x3333 */
25   - la t0, 0xaf000004
26   - li t1, 0x3333
27   - sh t1, 0(t0)
28   -
29   - /* ROMSPEEDREG = 0x3003 */
30   - la t0, 0xaf000006
31   - li t1, 0x3003
32   - sh t1, 0(t0)
33   -
34   - /* BCUCNTREG3 = 0 */
35   - la t0, 0xaf000016
36   - li t1, 0x0000
37   - sh t1, 0(t0)
38   -
39   - /* CMUCLKMSK */
40   - la t0, 0xaf000060
41   - li t1, 0x39a2
42   - sh t1, 0(t0)
43   -
44   - /* PMUCNTREG */
45   - la t0, 0xaf0000c2
46   - li t1, 0x0006
47   - sh t1, 0(t0)
48   -
49   - /* SDRAMMODEREG = 0x8029 */
50   - la t0, 0xaf000400
51   - li t1, 0x8029
52   - sh t1, 0(t0)
53   -
54   - /* SDRAMCNTREG = 0x2322 */
55   - la t0, 0xaf000402
56   - li t1, 0x2322
57   - sh t1, 0(t0)
58   -
59   - /* BCURFCNTREG = 0x0106 */
60   - la t0, 0xaf000404
61   - li t1, 0x0106
62   - sh t1, 0(t0)
63   -
64   - /* RAMSZEREG = 0x5555 (64MB Bank) */
65   - la t0, 0xaf000408
66   - li t1, 0x5555
67   - sh t1, 0(t0)
68   -
69   - j ra
70   - nop
board/tb0229/tb0229.c
View file @ 3f3110d
1   -/*
2   - * Board initialize code for TANBAC Evaluation board TB0229.
3   - *
4   - * (C) Masami Komiya <mkomiya@sonare.it> 2004
5   - *
6   - * This program is free software; you can redistribute it and/or
7   - * modify it under the terms of the GNU General Public License as
8   - * published by the Free Software Foundation; either version 2, or (at
9   - * your option) any later version.
10   - */
11   -
12   -#include <common.h>
13   -#include <command.h>
14   -#include <netdev.h>
15   -#include <asm/addrspace.h>
16   -#include <asm/io.h>
17   -#include <asm/reboot.h>
18   -#include <pci.h>
19   -
20   -void _machine_restart(void)
21   -{
22   - void (*f)(void) = (void *) 0xbfc00000;
23   -
24   - f();
25   -}
26   -
27   -#if defined(CONFIG_PCI)
28   -static struct pci_controller hose;
29   -
30   -void pci_init_board (void)
31   -{
32   - init_vr4131_pci(&hose);
33   -}
34   -#endif
35   -
36   -phys_size_t initdram(int board_type)
37   -{
38   - return get_ram_size (CONFIG_SYS_SDRAM_BASE, 0x8000000);
39   -}
40   -
41   -int checkboard (void)
42   -{
43   - printf("Board: TANBAC TB0229 ");
44   - printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000);
45   -
46   - set_io_port_base(0);
47   -
48   - return 0;
49   -}
50   -
51   -int board_eth_init(bd_t *bis)
52   -{
53   - return pci_eth_init(bis);
54   -}
board/tb0229/u-boot.lds
View file @ 3f3110d
1   -/*
2   - * (C) Masami Komiya <mkomiya@sonare.it> 2004
3   - *
4   - * (C) Copyright 2003
5   - * Wolfgang Denk Engineering, <wd@denx.de>
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
27   -
28   -OUTPUT_ARCH(mips)
29   -ENTRY(_start)
30   -SECTIONS
31   -{
32   - . = 0x00000000;
33   -
34   - . = ALIGN(4);
35   - .text :
36   - {
37   - *(.text*)
38   - }
39   -
40   - . = ALIGN(4);
41   - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
42   -
43   - . = ALIGN(4);
44   - .data : { *(.data*) }
45   -
46   - . = .;
47   - _gp = ALIGN(16) + 0x7ff0;
48   -
49   - .got : {
50   - __got_start = .;
51   - *(.got)
52   - __got_end = .;
53   - }
54   -
55   - .sdata : { *(.sdata*) }
56   -
57   - .u_boot_cmd : {
58   - __u_boot_cmd_start = .;
59   - *(.u_boot_cmd)
60   - __u_boot_cmd_end = .;
61   - }
62   -
63   - uboot_end_data = .;
64   - num_got_entries = (__got_end - __got_start) >> 2;
65   -
66   - . = ALIGN(4);
67   - .sbss (NOLOAD) : { *(.sbss*) }
68   - .bss (NOLOAD) : { *(.bss*) . = ALIGN(4); }
69   - uboot_end = .;
70   -}
board/tb0229/vr4131-pci.c
View file @ 3f3110d
1   -/*
2   - * VR4131 PCIU support code for TANBAC Evaluation board TB0229.
3   - *
4   - * (C) Masami Komiya <mkomiya@sonare.it> 2004
5   - *
6   - * This program is free software; you can redistribute it and/or
7   - * modify it under the terms of the GNU General Public License as
8   - * published by the Free Software Foundation; either version 2, or (at
9   - * your option) any later version.
10   - */
11   -
12   -#include <common.h>
13   -#include <pci.h>
14   -#include <asm/addrspace.h>
15   -
16   -#define VR4131_PCIMMAW1REG (volatile unsigned int *)(CKSEG1 + 0x0f000c00)
17   -#define VR4131_PCIMMAW2REG (volatile unsigned int *)(CKSEG1 + 0x0f000c04)
18   -#define VR4131_PCITAW1REG (volatile unsigned int *)(CKSEG1 + 0x0f000c08)
19   -#define VR4131_PCITAW2REG (volatile unsigned int *)(CKSEG1 + 0x0f000c0c)
20   -#define VR4131_PCIMIOAWREG (volatile unsigned int *)(CKSEG1 + 0x0f000c10)
21   -#define VR4131_PCICONFDREG (volatile unsigned int *)(CKSEG1 + 0x0f000c14)
22   -#define VR4131_PCICONFAREG (volatile unsigned int *)(CKSEG1 + 0x0f000c18)
23   -#define VR4131_PCIMAILREG (volatile unsigned int *)(CKSEG1 + 0x0f000c1c)
24   -#define VR4131_BUSERRADREG (volatile unsigned int *)(CKSEG1 + 0x0f000c24)
25   -#define VR4131_INTCNTSTAREG (volatile unsigned int *)(CKSEG1 + 0x0f000c28)
26   -#define VR4131_PCIEXACCREG (volatile unsigned int *)(CKSEG1 + 0x0f000c2c)
27   -#define VR4131_PCIRECONTREG (volatile unsigned int *)(CKSEG1 + 0x0f000c30)
28   -#define VR4131_PCIENREG (volatile unsigned int *)(CKSEG1 + 0x0f000c34)
29   -#define VR4131_PCICLKSELREG (volatile unsigned int *)(CKSEG1 + 0x0f000c38)
30   -#define VR4131_PCITRDYREG (volatile unsigned int *)(CKSEG1 + 0x0f000c3c)
31   -#define VR4131_PCICLKRUNREG (volatile unsigned int *)(CKSEG1 + 0x0f000c60)
32   -#define VR4131_PCIHOSTCONFIG (volatile unsigned int *)(CKSEG1 + 0x0f000d00)
33   -#define VR4131_VENDORIDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d00)
34   -#define VR4131_DEVICEIDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d00)
35   -#define VR4131_COMMANDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d04)
36   -#define VR4131_STATUSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d04)
37   -#define VR4131_REVREG (volatile unsigned int *)(CKSEG1 + 0x0f000d08)
38   -#define VR4131_CLASSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d08)
39   -#define VR4131_CACHELSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d0c)
40   -#define VR4131_LATTIMERRG (volatile unsigned int *)(CKSEG1 + 0x0f000d0c)
41   -#define VR4131_MAILBAREG (volatile unsigned int *)(CKSEG1 + 0x0f000d10)
42   -#define VR4131_PCIMBA1REG (volatile unsigned int *)(CKSEG1 + 0x0f000d14)
43   -#define VR4131_PCIMBA2REG (volatile unsigned int *)(CKSEG1 + 0x0f000d18)
44   -
45   -/*#define VR41XX_PCIIRQ_OFFSET (VR41XX_IRQ_MAX + 1) */
46   -/*#define VR41XX_PCIIRQ_MAX (VR41XX_IRQ_MAX + 12) */
47   -/*#define VR4122_PCI_HOST_BASE 0xa0000000 */
48   -
49   -volatile unsigned int *pciconfigaddr;
50   -volatile unsigned int *pciconfigdata;
51   -
52   -#define PCI_ACCESS_READ 0
53   -#define PCI_ACCESS_WRITE 1
54   -
55   -/*
56   - * Access PCI Configuration Register for VR4131
57   - */
58   -
59   -static int vr4131_pci_config_access (u8 access_type, u32 dev, u32 reg,
60   - u32 * data)
61   -{
62   - u32 bus;
63   - u32 device;
64   -
65   - bus = ((dev & 0xff0000) >> 16);
66   - device = ((dev & 0xf800) >> 11);
67   -
68   - if (bus == 0) {
69   - /* Type 0 Configuration */
70   - *VR4131_PCICONFAREG = (u32) (1UL << device | (reg & 0xfc));
71   - } else {
72   - /* Type 1 Configuration */
73   - *VR4131_PCICONFAREG = (u32) (dev | ((reg / 4) << 2) | 1);
74   - }
75   -
76   - if (access_type == PCI_ACCESS_WRITE) {
77   - *VR4131_PCICONFDREG = *data;
78   - } else {
79   - *data = *VR4131_PCICONFDREG;
80   - }
81   -
82   - return (0);
83   -}
84   -
85   -static int vr4131_pci_read_config_byte (u32 hose, u32 dev, u32 reg, u8 * val)
86   -{
87   - u32 data;
88   -
89   - if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
90   - return -1;
91   -
92   - *val = (data >> ((reg & 3) << 3)) & 0xff;
93   -
94   - return 0;
95   -}
96   -
97   -
98   -static int vr4131_pci_read_config_word (u32 hose, u32 dev, u32 reg, u16 * val)
99   -{
100   - u32 data;
101   -
102   - if (reg & 1)
103   - return -1;
104   -
105   - if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
106   - return -1;
107   -
108   - *val = (data >> ((reg & 3) << 3)) & 0xffff;
109   -
110   - return 0;
111   -}
112   -
113   -
114   -static int vr4131_pci_read_config_dword (u32 hose, u32 dev, u32 reg,
115   - u32 * val)
116   -{
117   - u32 data = 0;
118   -
119   - if (reg & 3)
120   - return -1;
121   -
122   - if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
123   - return -1;
124   -
125   - *val = data;
126   -
127   - return (0);
128   -}
129   -
130   -static int vr4131_pci_write_config_byte (u32 hose, u32 dev, u32 reg, u8 val)
131   -{
132   - u32 data = 0;
133   -
134   - if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
135   - return -1;
136   -
137   - data = (data & ~(0xff << ((reg & 3) << 3))) | (val <<
138   - ((reg & 3) << 3));
139   -
140   - if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
141   - return -1;
142   -
143   - return 0;
144   -}
145   -
146   -
147   -static int vr4131_pci_write_config_word (u32 hose, u32 dev, u32 reg, u16 val)
148   -{
149   - u32 data = 0;
150   -
151   - if (reg & 1)
152   - return -1;
153   -
154   - if (vr4131_pci_config_access (PCI_ACCESS_READ, dev, reg, &data))
155   - return -1;
156   -
157   - data = (data & ~(0xffff << ((reg & 3) << 3))) | (val <<
158   - ((reg & 3) << 3));
159   -
160   - if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
161   - return -1;
162   -
163   - return 0;
164   -}
165   -
166   -static int vr4131_pci_write_config_dword (u32 hose, u32 dev, u32 reg, u32 val)
167   -{
168   - u32 data;
169   -
170   - if (reg & 3) {
171   - return -1;
172   - }
173   -
174   - data = val;
175   -
176   - if (vr4131_pci_config_access (PCI_ACCESS_WRITE, dev, reg, &data))
177   - return -1;
178   -
179   - return (0);
180   -}
181   -
182   -
183   -/*
184   - * Initialize VR4131 PCIU
185   - */
186   -
187   -static void vr4131_pciu_init(void)
188   -{
189   - /* PCI clock */
190   - *VR4131_PCICLKSELREG = 0x00000002;
191   -
192   - /* PCI memory and I/O space */
193   - *VR4131_PCIMMAW1REG = 0x100F9010;
194   - *VR4131_PCIMMAW2REG = 0x140FD014;
195   - *VR4131_PCIMIOAWREG = 0x160FD000;
196   -
197   - /* Target memory window */
198   - *VR4131_PCITAW1REG = 0x00081000; /* 64MB */
199   - *VR4131_PCITAW2REG = 0x00000000;
200   -
201   - *VR4131_MAILBAREG = 0UL;
202   - *VR4131_PCIMBA1REG = 0UL;
203   -
204   - *VR4131_PCITRDYREG = 0x00008004;
205   -
206   - *VR4131_PCIENREG = 0x00000004; /* PCI enable */
207   - *VR4131_COMMANDREG = 0x02000007;
208   -}
209   -
210   -/*
211   - * Initialize Module
212   - */
213   -
214   -void init_vr4131_pci (struct pci_controller *hose)
215   -{
216   - hose->first_busno = 0;
217   - hose->last_busno = 0xff;
218   -
219   - vr4131_pciu_init (); /* Initialize VR4131 PCIU */
220   -
221   - /* PCI memory space #1 */
222   - pci_set_region (hose->regions + 0,
223   - 0x10000000, 0xb0000000, 0x04000000, PCI_REGION_MEM);
224   -
225   - /* PCI memory space #2 */
226   - pci_set_region (hose->regions + 1,
227   - 0x14000000, 0xb4000000, 0x02000000, PCI_REGION_MEM);
228   -
229   -
230   - /* PCI I/O space */
231   - pci_set_region (hose->regions + 2,
232   - 0x16000000, 0xb6000000, 0x02000000, PCI_REGION_IO);
233   -
234   - /* System memory space */
235   - pci_set_region (hose->regions + 3,
236   - 0x00000000,
237   - 0x80000000,
238   - 0x04000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
239   -
240   - hose->region_count = 4;
241   -
242   - hose->read_byte = vr4131_pci_read_config_byte;
243   - hose->read_word = vr4131_pci_read_config_word;
244   - hose->read_dword = vr4131_pci_read_config_dword;
245   - hose->write_byte = vr4131_pci_write_config_byte;
246   - hose->write_word = vr4131_pci_write_config_word;
247   - hose->write_dword = vr4131_pci_write_config_dword;
248   -
249   - pci_register_hose (hose);
250   -
251   - hose->last_busno = pci_hose_scan (hose);
252   -
253   - return;
254   -}
... ... @@ -331,7 +331,6 @@
331 331 M5485HFE m68k mcf547x_8x m548xevb freescale - M5485EVB:SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO
332 332 microblaze-generic microblaze microblaze microblaze-generic xilinx
333 333 qemu_mips mips mips32 qemu-mips - - qemu-mips
334   -tb0229 mips mips32
335 334 vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM
336 335 vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC
337 336 vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND
doc/README.scrapyard
Diff comments   View file @ 3f3110d
... ... @@ -11,9 +11,10 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
14   -rmu powerpc MPC850 - 2011-12-07 Wolfgang Denk <wd@denx.de>
15   -OXC powerpc MPC8240 - 2011-12-07
16   -BAB7xx powerpc MPC740/MPC750 - 2011-12-07 Frank Gottschling <fgottschling@eltec.de>
  14 +tb0229 mips mips32 - 2011-12-12
  15 +rmu powerpc MPC850 fb82fd7 2011-12-07 Wolfgang Denk <wd@denx.de>
  16 +OXC powerpc MPC8240 309a292 2011-12-07
  17 +BAB7xx powerpc MPC740/MPC750 c53043b 2011-12-07 Frank Gottschling <fgottschling@eltec.de>
17 18 xm250 arm pxa c746cdd 2011-25-11
18 19 pleb2 arm pxa b185a1c 2011-25-11
19 20 cradle arm pxa 4e24f8a 2011-25-11 Kyle Harris <kharris@nexus-tech.net>