OMAP3: am3517_evm: Add NAND MTD partitions with UBI/UBIFS support

- Add required UBI/UBIFS config definitions - Add reasonable MTD partition layout - Remove JFFS2 config definitions - Drop some CFI verbage and definitions - Make comment 'one-liners' truly one line - Improve readability and content arrangement Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>

OMAP3: am3517_evm: Add NAND MTD partitions with UBI/UBIFS support
- Add required UBI/UBIFS config definitions - Add reasonable MTD partition layout - Remove JFFS2 config definitions - Drop some CFI verbage and definitions - Make comment 'one-liners' truly one line - Improve readability and content arrangement Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Derald D. Woods · Tom Rini
1 parent 138daa7b36
Showing 2 changed files with 153 additions and 158 deletions Side-by-side Diff
configs/am3517_evm_defconfig
include/configs/am3517_evm.h
@@ -4,10 +4,12 @@
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_PROMPT="AM3517_EVM # "
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_GPIO=y
 CONFIG_SYS_NS16550=y
@@ -13,14 +13,17 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
  
-#define CONFIG_SYS_CACHELINE_SIZE	64
+/* High Level Configuration Options */
  
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP		1	/* in a TI OMAP core */
-#define CONFIG_OMAP3_AM3517EVM	1	/* working with AM3517EVM */
+#define CONFIG_OMAP
 #define CONFIG_OMAP_COMMON
+
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
+
 /* Common ARM Erratas */
 #define CONFIG_ARM_ERRATA_454179
 #define CONFIG_ARM_ERRATA_430973
  
  
  
  
  
  
  
@@ -28,59 +31,48 @@
  
 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
  
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap.h>
  
-/*
- * Display CPU and Board information
- */
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
+/* Display CPU and Board information */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_OF_LIBFDT
+#define CONFIG_MISC_INIT_R
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
  
 /* Clock Defines */
 #define V_OSCK			26000000	/* Clock output from T2 */
 #define V_SCLK			(V_OSCK >> 1)
  
-#define CONFIG_MISC_INIT_R
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(16 << 20)
  
-#define CONFIG_OF_LIBFDT
+/* Hardware drivers */
  
-#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-#define CONFIG_REVISION_TAG		1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB sector */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
-/*
- * DDR related
- */
-#define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-
-/*
- * OMAP GPIO configuration
- */
+/* OMAP GPIO configuration */
 #define CONFIG_OMAP_GPIO
  
-/*
- * NS16550 Configuration
- */
+/* NS16550 Configuration */
 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
-
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
  
-/*
- * select serial console configuration
- */
+/* select serial console configuration */
 #define CONFIG_CONS_INDEX		3
 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
 #define CONFIG_SERIAL3			3	/* UART3 on AM3517 EVM */
  
@@ -90,11 +82,13 @@
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
 					115200}
-#define CONFIG_MMC			1
-#define CONFIG_GENERIC_MMC		1
-#define CONFIG_OMAP_HSMMC		1
-#define CONFIG_DOS_PARTITION		1
  
+/* SD/MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
+
 /*
  * USB configuration
  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
@@ -111,7 +105,6 @@
  
 #define CONFIG_USB_STORAGE
 #define CONGIG_CMD_STORAGE
-#define CONFIG_CMD_FAT
  
 #ifdef CONFIG_USB_KEYBOARD
 #define CONFIG_SYS_USB_EVENT_POLL
  
  
  
  
  
@@ -129,30 +122,29 @@
 #endif /* CONFIG_USB_MUSB_AM35X */
  
 /* commands to include */
-#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
-#define CONFIG_CMD_FAT		/* FAT support			*/
-#define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
 #define CONFIG_CMD_EXT4
 #define CONFIG_CMD_EXT4_WRITE
-
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_PART
+#define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_BOOTZ
-
-#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
-#define CONFIG_CMD_MMC		/* MMC support			*/
-#define CONFIG_CMD_NAND		/* NAND support			*/
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
 #define CONFIG_CMD_DHCP
-#undef CONFIG_CMD_PING
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MTDPARTS
  
-
-#define CONFIG_SYS_NO_FLASH
+/* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
 #define CONFIG_SYS_I2C_OMAP34XX
  
-/*
- * Ethernet
- */
+/* Ethernet */
 #define CONFIG_DRIVER_TI_EMAC
 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 #define CONFIG_MII
  
  
  
@@ -162,24 +154,67 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT		10
  
-/*
- * Board NAND Info.
- */
+/* Board NAND Info. */
+#ifdef CONFIG_NAND
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_GPMC_PREFETCH
+#define CONFIG_BCH
+#define CONFIG_CMD_UBI			/* UBI-formated MTD partition support */
+#define CONFIG_CMD_UBIFS		/* Read-only UBI volume operations */
+#define CONFIG_RBTREE			/* required by CONFIG_CMD_UBI */
+#define CONFIG_LZO			/* required by CONFIG_CMD_UBIFS */
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
 							/* to access */
 							/* nand at CS0 */
-
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
 							/* NAND devices */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV		"nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET	0x680000
-#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* sz of jffs2 part */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
+					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
+					 21, 22, 23, 24, 25, 26, 27, 28, 30, \
+					 31, 32, 33, 34, 35, 36, 37, 38, 39, \
+					 40, 41, 42, 44, 45, 46, 47, 48, 49, \
+					 50, 51, 52, 53, 54, 55, 56 }
  
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	13
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_MAX_OOBFREE	2
+#define CONFIG_SYS_NAND_MAX_ECCPOS	56
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
+#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
+/* NAND block size is 128 KiB.  Synchronize these values with
+ * corresponding Device Tree entries in Linux:
+ *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
+ *  U-Boot              15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
+ *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x260000
+ *  Kernel              64 * NAND_BLOCK_SIZE = 8 MiB    @ 0x2A0000
+ *  DTB                  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA0000
+ *  RootFS              Remaining Flash Space           @ 0xB20000
+ */
+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
+	"512k(MLO),"					\
+	"1920k(u-boot),"				\
+	"256k(u-boot-env),"				\
+	"8m(kernel),"					\
+	"512k(dtb),"					\
+	"-(rootfs)"
+#else
+#define MTDIDS_DEFAULT
+#define MTDPARTS_DEFAULT
+#endif /* CONFIG_NAND */
+
 /* Environment information */
 #define CONFIG_BOOTDELAY	10
  
  
  
@@ -194,18 +229,24 @@
 	"bootenv=uEnv.txt\0" \
 	"cmdline=\0" \
 	"optargs=\0" \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
 	"mmcdev=0\0" \
 	"mmcpart=1\0" \
 	"mmcroot=/dev/mmcblk0p2 rw\0" \
 	"mmcrootfstype=ext4 rootwait fixrtc\0" \
 	"mmcargs=setenv bootargs console=${console} " \
+		"${mtdparts} " \
 		"${optargs} " \
 		"root=${mmcroot} " \
 		"rootfstype=${mmcrootfstype} " \
 		"${cmdline}\0" \
 	"nandargs=setenv bootargs console=${console} " \
-		"root=/dev/mtdblock4 rw " \
-		"rootfstype=jffs2\0" \
+		"${mtdparts} " \
+		"${optargs} " \
+		"root=ubi0:rootfs rw ubi.mtd=rootfs " \
+		"rootfstype=ubifs rootwait " \
+		"${cmdline}\0" \
 	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
 	"importbootenv=echo Importing environment from mmc ...; " \
 		"env import -t ${loadaddr} ${filesize}\0" \
@@ -218,8 +259,9 @@
 		"bootz ${loadaddr} - ${fdtaddr}\0" \
 	"nandboot=echo Booting from nand ...; " \
 		"run nandargs; " \
-		"nand read ${loadaddr} 280000 400000; " \
-		"bootm ${loadaddr}\0" \
+		"nand read ${loadaddr} 2a0000 800000; " \
+		"nand read ${fdtaddr} aa0000 80000; " \
+		"bootm ${loadaddr} - ${fdtaddr}\0" \
  
 #define CONFIG_BOOTCOMMAND \
 	"mmc dev ${mmcdev}; if mmc rescan; then " \
  
  
@@ -240,20 +282,25 @@
 		"fi; " \
 	"else run nandboot; fi"
  
-#define CONFIG_AUTO_COMPLETE	1
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
+/* Miscellaneous configurable options */
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_PARTITION_UUIDS
+
+/* We set the max number of command args high to avoid HUSH bugs. */
+#define CONFIG_SYS_MAXARGS		64
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		512
 /* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		32	/* max number of command */
-						/* args */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
+					+ sizeof(CONFIG_SYS_PROMPT) + 16)
 /* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
  
@@ -270,16 +317,18 @@
 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
  
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
-#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
+/* Physical Memory Map */
+#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
+#define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE	0x800
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
  
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
+/* FLASH and environment organization */
  
 /* **** PISMO SUPPORT *** */
 #define CONFIG_SYS_MAX_FLASH_SECT	520	/* max number of sectors */
  
  
  
  
@@ -287,43 +336,20 @@
 #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of flash banks */
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
  
-#if defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_NAND)
 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
 #endif
  
 /* Monitor at start of flash */
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
  
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_IS_IN_NAND		1
-#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
-
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
+#define CONFIG_ENV_SIZE			CONFIG_SYS_ENV_SECT_SIZE
+#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
+#define CONFIG_ENV_IS_IN_NAND
  
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
-					CONFIG_SYS_MAX_NAND_DEVICE)
-#define CONFIG_SYS_JFFS2_MEM_NAND
-/* use flash_info[2] */
-#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE	0x800
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - \
-					 GENERATED_GBL_DATA_SIZE)
-
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
@@ -337,7 +363,7 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
  
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBDISK_SUPPORT
  
@@ -350,42 +376,9 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_MTD_SUPPORT
 #define CONFIG_SPL_POWER_SUPPORT
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
-
-/* NAND boot config */
-#define CONFIG_BCH
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT	64
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048
-#define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
-					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
-					 21, 22, 23, 24, 25, 26, 27, 28, 30, \
-					 31, 32, 33, 34, 35, 36, 37, 38, 39, \
-					 40, 41, 42, 44, 45, 46, 47, 48, 49, \
-					 50, 51, 52, 53, 54, 55, 56 }
-
-#define CONFIG_SYS_NAND_ECCSIZE		512
-#define CONFIG_SYS_NAND_ECCBYTES	13
-#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-#define CONFIG_SYS_NAND_MAX_OOBFREE	2
-#define CONFIG_SYS_NAND_MAX_ECCPOS	56
-#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE		0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
  
 #endif /* __CONFIG_H */
...	...	@@ -4,10 +4,12 @@
4	4	CONFIG_SPL=y
5	5	CONFIG_FIT=y
6	6	CONFIG_SYS_PROMPT="AM3517_EVM # "
	7	+CONFIG_SYS_EXTRA_OPTIONS="NAND"
7	8	# CONFIG_CMD_IMI is not set
8	9	# CONFIG_CMD_IMLS is not set
9	10	# CONFIG_CMD_FLASH is not set
10	11	# CONFIG_CMD_FPGA is not set
11	12	# CONFIG_CMD_SETEXPR is not set
	13	+CONFIG_CMD_GPIO=y
12	14	CONFIG_SYS_NS16550=y
...	...	@@ -13,14 +13,17 @@
13	13	#ifndef __CONFIG_H
14	14	#define __CONFIG_H
15	15
16		-#define CONFIG_SYS_CACHELINE_SIZE 64
	16	+/* High Level Configuration Options */
17	17
18		-/*
19		- * High Level Configuration Options
20		- */
21		-#define CONFIG_OMAP 1 /* in a TI OMAP core */
22		-#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
	18	+#define CONFIG_OMAP
23	19	#define CONFIG_OMAP_COMMON
	20	+
	21	+#define CONFIG_SYS_CACHELINE_SIZE 64
	22	+
	23	+#define CONFIG_SYS_NO_FLASH
	24	+
	25	+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
	26	+
24	27	/* Common ARM Erratas */
25	28	#define CONFIG_ARM_ERRATA_454179
26	29	#define CONFIG_ARM_ERRATA_430973
27	30
28	31
29	32
30	33
31	34
32	35
33	36
...	...	@@ -28,59 +31,48 @@
28	31
29	32	#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
30	33
	34	+/*
	35	+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	36	+ * 64 bytes before this address should be set aside for u-boot.img's
	37	+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
	38	+ * other needs.
	39	+ */
	40	+#define CONFIG_SYS_TEXT_BASE 0x80100000
	41	+#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	42	+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
	43	+
31	44	#include <asm/arch/cpu.h> /* get chip and board defs */
32	45	#include <asm/arch/omap.h>
33	46
34		-/*
35		- * Display CPU and Board information
36		- */
37		-#define CONFIG_DISPLAY_CPUINFO 1
38		-#define CONFIG_DISPLAY_BOARDINFO 1
	47	+/* Display CPU and Board information */
	48	+#define CONFIG_DISPLAY_CPUINFO
	49	+#define CONFIG_DISPLAY_BOARDINFO
	50	+#define CONFIG_OF_LIBFDT
	51	+#define CONFIG_MISC_INIT_R
	52	+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	53	+#define CONFIG_SETUP_MEMORY_TAGS
	54	+#define CONFIG_INITRD_TAG
	55	+#define CONFIG_REVISION_TAG
39	56
40	57	/* Clock Defines */
41	58	#define V_OSCK 26000000 /* Clock output from T2 */
42	59	#define V_SCLK (V_OSCK >> 1)
43	60
44		-#define CONFIG_MISC_INIT_R
	61	+/* Size of malloc() pool */
	62	+#define CONFIG_SYS_MALLOC_LEN (16 << 20)
45	63
46		-#define CONFIG_OF_LIBFDT
	64	+/* Hardware drivers */
47	65
48		-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49		-#define CONFIG_SETUP_MEMORY_TAGS 1
50		-#define CONFIG_INITRD_TAG 1
51		-#define CONFIG_REVISION_TAG 1
52		-
53		-/*
54		- * Size of malloc() pool
55		- */
56		-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
57		-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
58		-/*
59		- * DDR related
60		- */
61		-#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
62		-
63		-/*
64		- * Hardware drivers
65		- */
66		-
67		-/*
68		- * OMAP GPIO configuration
69		- */
	66	+/* OMAP GPIO configuration */
70	67	#define CONFIG_OMAP_GPIO
71	68
72		-/*
73		- * NS16550 Configuration
74		- */
	69	+/* NS16550 Configuration */
75	70	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
76		-
77	71	#define CONFIG_SYS_NS16550_SERIAL
78	72	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
79	73	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
80	74
81		-/*
82		- * select serial console configuration
83		- */
	75	+/* select serial console configuration */
84	76	#define CONFIG_CONS_INDEX 3
85	77	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
86	78	#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
87	79
...	...	@@ -90,11 +82,13 @@
90	82	#define CONFIG_BAUDRATE 115200
91	83	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
92	84	115200}
93		-#define CONFIG_MMC 1
94		-#define CONFIG_GENERIC_MMC 1
95		-#define CONFIG_OMAP_HSMMC 1
96		-#define CONFIG_DOS_PARTITION 1
97	85
	86	+/* SD/MMC */
	87	+#define CONFIG_MMC
	88	+#define CONFIG_GENERIC_MMC
	89	+#define CONFIG_OMAP_HSMMC
	90	+#define CONFIG_DOS_PARTITION
	91	+
98	92	/*
99	93	* USB configuration
100	94	* Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
...	...	@@ -111,7 +105,6 @@
111	105
112	106	#define CONFIG_USB_STORAGE
113	107	#define CONGIG_CMD_STORAGE
114		-#define CONFIG_CMD_FAT
115	108
116	109	#ifdef CONFIG_USB_KEYBOARD
117	110	#define CONFIG_SYS_USB_EVENT_POLL
118	111
119	112
120	113
121	114
122	115
...	...	@@ -129,30 +122,29 @@
129	122	#endif /* CONFIG_USB_MUSB_AM35X */
130	123
131	124	/* commands to include */
132		-#define CONFIG_CMD_EXT2 /* EXT2 Support */
133		-#define CONFIG_CMD_FAT /* FAT support */
134		-#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
	125	+#define CONFIG_CMD_NAND
	126	+#define CONFIG_CMD_CACHE
	127	+#define CONFIG_CMD_FAT
	128	+#define CONFIG_CMD_EXT2
135	129	#define CONFIG_CMD_EXT4
136	130	#define CONFIG_CMD_EXT4_WRITE
137		-
	131	+#define CONFIG_CMD_FS_GENERIC
	132	+#define CONFIG_CMD_PART
	133	+#define CONFIG_CMD_ASKENV
138	134	#define CONFIG_CMD_BOOTZ
139		-
140		-#define CONFIG_CMD_I2C /* I2C serial bus support */
141		-#define CONFIG_CMD_MMC /* MMC support */
142		-#define CONFIG_CMD_NAND /* NAND support */
	135	+#define CONFIG_CMD_I2C
	136	+#define CONFIG_CMD_MMC
143	137	#define CONFIG_CMD_DHCP
144		-#undef CONFIG_CMD_PING
	138	+#define CONFIG_CMD_PING
	139	+#define CONFIG_CMD_MTDPARTS
145	140
146		-
147		-#define CONFIG_SYS_NO_FLASH
	141	+/* I2C */
148	142	#define CONFIG_SYS_I2C
149	143	#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
150	144	#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
151	145	#define CONFIG_SYS_I2C_OMAP34XX
152	146
153		-/*
154		- * Ethernet
155		- */
	147	+/* Ethernet */
156	148	#define CONFIG_DRIVER_TI_EMAC
157	149	#define CONFIG_DRIVER_TI_EMAC_USE_RMII
158	150	#define CONFIG_MII
159	151
160	152
161	153
...	...	@@ -162,24 +154,67 @@
162	154	#define CONFIG_BOOTP_SEND_HOSTNAME
163	155	#define CONFIG_NET_RETRY_COUNT 10
164	156
165		-/*
166		- * Board NAND Info.
167		- */
	157	+/* Board NAND Info. */
	158	+#ifdef CONFIG_NAND
	159	+#define CONFIG_NAND_OMAP_GPMC
	160	+#define CONFIG_NAND_OMAP_GPMC_PREFETCH
	161	+#define CONFIG_BCH
	162	+#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
	163	+#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	164	+#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	165	+#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
168	166	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
169	167	/* to access nand */
170	168	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
171	169	/* to access */
172	170	/* nand at CS0 */
173		-
174	171	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
175	172	/* NAND devices */
176		-#define CONFIG_JFFS2_NAND
177		-/* nand device jffs2 lives on */
178		-#define CONFIG_JFFS2_DEV "nand0"
179		-/* start of jffs2 partition */
180		-#define CONFIG_JFFS2_PART_OFFSET 0x680000
181		-#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
	173	+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
	174	+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	175	+#define CONFIG_SYS_NAND_PAGE_COUNT 64
	176	+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	177	+#define CONFIG_SYS_NAND_OOBSIZE 64
	178	+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	179	+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	180	+#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
	181	+ 11, 12, 13, 14, 16, 17, 18, 19, 20, \
	182	+ 21, 22, 23, 24, 25, 26, 27, 28, 30, \
	183	+ 31, 32, 33, 34, 35, 36, 37, 38, 39, \
	184	+ 40, 41, 42, 44, 45, 46, 47, 48, 49, \
	185	+ 50, 51, 52, 53, 54, 55, 56 }
182	186
	187	+#define CONFIG_SYS_NAND_ECCSIZE 512
	188	+#define CONFIG_SYS_NAND_ECCBYTES 13
	189	+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
	190	+#define CONFIG_SYS_NAND_MAX_OOBFREE 2
	191	+#define CONFIG_SYS_NAND_MAX_ECCPOS 56
	192	+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	193	+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	194	+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	195	+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	196	+/* NAND block size is 128 KiB. Synchronize these values with
	197	+ * corresponding Device Tree entries in Linux:
	198	+ * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
	199	+ * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
	200	+ * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
	201	+ * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
	202	+ * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
	203	+ * RootFS Remaining Flash Space @ 0xB20000
	204	+ */
	205	+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	206	+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
	207	+ "512k(MLO)," \
	208	+ "1920k(u-boot)," \
	209	+ "256k(u-boot-env)," \
	210	+ "8m(kernel)," \
	211	+ "512k(dtb)," \
	212	+ "-(rootfs)"
	213	+#else
	214	+#define MTDIDS_DEFAULT
	215	+#define MTDPARTS_DEFAULT
	216	+#endif /* CONFIG_NAND */
	217	+
183	218	/* Environment information */
184	219	#define CONFIG_BOOTDELAY 10
185	220
186	221
187	222
...	...	@@ -194,18 +229,24 @@
194	229	"bootenv=uEnv.txt\0" \
195	230	"cmdline=\0" \
196	231	"optargs=\0" \
	232	+ "mtdids=" MTDIDS_DEFAULT "\0" \
	233	+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
197	234	"mmcdev=0\0" \
198	235	"mmcpart=1\0" \
199	236	"mmcroot=/dev/mmcblk0p2 rw\0" \
200	237	"mmcrootfstype=ext4 rootwait fixrtc\0" \
201	238	"mmcargs=setenv bootargs console=${console} " \
	239	+ "${mtdparts} " \
202	240	"${optargs} " \
203	241	"root=${mmcroot} " \
204	242	"rootfstype=${mmcrootfstype} " \
205	243	"${cmdline}\0" \
206	244	"nandargs=setenv bootargs console=${console} " \
207		- "root=/dev/mtdblock4 rw " \
208		- "rootfstype=jffs2\0" \
	245	+ "${mtdparts} " \
	246	+ "${optargs} " \
	247	+ "root=ubi0:rootfs rw ubi.mtd=rootfs " \
	248	+ "rootfstype=ubifs rootwait " \
	249	+ "${cmdline}\0" \
209	250	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
210	251	"importbootenv=echo Importing environment from mmc ...; " \
211	252	"env import -t ${loadaddr} ${filesize}\0" \
...	...	@@ -218,8 +259,9 @@
218	259	"bootz ${loadaddr} - ${fdtaddr}\0" \
219	260	"nandboot=echo Booting from nand ...; " \
220	261	"run nandargs; " \
221		- "nand read ${loadaddr} 280000 400000; " \
222		- "bootm ${loadaddr}\0" \
	262	+ "nand read ${loadaddr} 2a0000 800000; " \
	263	+ "nand read ${fdtaddr} aa0000 80000; " \
	264	+ "bootm ${loadaddr} - ${fdtaddr}\0" \
223	265
224	266	#define CONFIG_BOOTCOMMAND \
225	267	"mmc dev ${mmcdev}; if mmc rescan; then " \
226	268
227	269
...	...	@@ -240,20 +282,25 @@
240	282	"fi; " \
241	283	"else run nandboot; fi"
242	284
243		-#define CONFIG_AUTO_COMPLETE 1
244		-/*
245		- * Miscellaneous configurable options
246		- */
247		-#define CONFIG_SYS_LONGHELP /* undef to save memory */
248		-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
249		-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
	285	+/* Miscellaneous configurable options */
	286	+#define CONFIG_AUTO_COMPLETE
	287	+#define CONFIG_CMDLINE_EDITING
	288	+#define CONFIG_VERSION_VARIABLE
	289	+#define CONFIG_SYS_LONGHELP
	290	+#define CONFIG_SYS_HUSH_PARSER
	291	+#define CONFIG_PARTITION_UUIDS
	292	+
	293	+/* We set the max number of command args high to avoid HUSH bugs. */
	294	+#define CONFIG_SYS_MAXARGS 64
	295	+
	296	+/* Console I/O Buffer Size */
	297	+#define CONFIG_SYS_CBSIZE 512
250	298	/* Print Buffer Size */
251		-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
252		- sizeof(CONFIG_SYS_PROMPT) + 16)
253		-#define CONFIG_SYS_MAXARGS 32 /* max number of command */
254		- /* args */
	299	+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
	300	+ + sizeof(CONFIG_SYS_PROMPT) + 16)
255	301	/* Boot Argument Buffer Size */
256		-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	302	+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	303	+
257	304	/* memtest works on */
258	305	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
259	306	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
260	307
...	...	@@ -270,16 +317,18 @@
270	317	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
271	318	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
272	319
273		-/*-----------------------------------------------------------------------
274		- * Physical Memory Map
275		- */
276		-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
277		-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
278		-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
	320	+/* Physical Memory Map */
	321	+#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	322	+#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
	323	+#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
	324	+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	325	+#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	326	+#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	327	+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	328	+ CONFIG_SYS_INIT_RAM_SIZE - \
	329	+ GENERATED_GBL_DATA_SIZE)
279	330
280		-/*-----------------------------------------------------------------------
281		- * FLASH and environment organization
282		- */
	331	+/* FLASH and environment organization */
283	332
284	333	/* ** PISMO SUPPORT * */
285	334	#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
286	335
287	336
288	337
289	338
...	...	@@ -287,43 +336,20 @@
287	336	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
288	337	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
289	338
290		-#if defined(CONFIG_CMD_NAND)
	339	+#if defined(CONFIG_NAND)
291	340	#define CONFIG_SYS_FLASH_BASE NAND_BASE
292	341	#endif
293	342
294	343	/* Monitor at start of flash */
295	344	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
296	345
297		-#define CONFIG_NAND_OMAP_GPMC
298		-#define CONFIG_ENV_IS_IN_NAND 1
299		-#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
300		-
301	346	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
	347	+#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
	348	+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
302	349	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
303	350	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
	351	+#define CONFIG_ENV_IS_IN_NAND
304	352
305		-/*-----------------------------------------------------------------------
306		- * CFI FLASH driver setup
307		- */
308		-/* timeout values are in ticks */
309		-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
310		-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
311		-
312		-/* Flash banks JFFS2 should use */
313		-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
314		- CONFIG_SYS_MAX_NAND_DEVICE)
315		-#define CONFIG_SYS_JFFS2_MEM_NAND
316		-/* use flash_info[2] */
317		-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
318		-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
319		-
320		-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
321		-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
322		-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
323		-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
324		- CONFIG_SYS_INIT_RAM_SIZE - \
325		- GENERATED_GBL_DATA_SIZE)
326		-
327	353	/* Defines for SPL */
328	354	#define CONFIG_SPL_FRAMEWORK
329	355	#define CONFIG_SPL_BOARD_INIT
...	...	@@ -337,7 +363,7 @@
337	363	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
338	364	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
339	365	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
340		-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
	366	+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
341	367
342	368	#define CONFIG_SPL_LIBCOMMON_SUPPORT
343	369	#define CONFIG_SPL_LIBDISK_SUPPORT
344	370
...	...	@@ -350,42 +376,9 @@
350	376	#define CONFIG_SPL_NAND_BASE
351	377	#define CONFIG_SPL_NAND_DRIVERS
352	378	#define CONFIG_SPL_NAND_ECC
	379	+#define CONFIG_SPL_MTD_SUPPORT
353	380	#define CONFIG_SPL_POWER_SUPPORT
354	381	#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
355		-
356		-/* NAND boot config */
357		-#define CONFIG_BCH
358		-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
359		-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
360		-#define CONFIG_SYS_NAND_PAGE_COUNT 64
361		-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
362		-#define CONFIG_SYS_NAND_OOBSIZE 64
363		-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
364		-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
365		-#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
366		- 11, 12, 13, 14, 16, 17, 18, 19, 20, \
367		- 21, 22, 23, 24, 25, 26, 27, 28, 30, \
368		- 31, 32, 33, 34, 35, 36, 37, 38, 39, \
369		- 40, 41, 42, 44, 45, 46, 47, 48, 49, \
370		- 50, 51, 52, 53, 54, 55, 56 }
371		-
372		-#define CONFIG_SYS_NAND_ECCSIZE 512
373		-#define CONFIG_SYS_NAND_ECCBYTES 13
374		-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
375		-#define CONFIG_SYS_NAND_MAX_OOBFREE 2
376		-#define CONFIG_SYS_NAND_MAX_ECCPOS 56
377		-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
378		-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
379		-
380		-/*
381		- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
382		- * 64 bytes before this address should be set aside for u-boot.img's
383		- * header. That is 0x800FFFC0--0x80100000 should not be used for any
384		- * other needs.
385		- */
386		-#define CONFIG_SYS_TEXT_BASE 0x80100000
387		-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
388		-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
389	382
390	383	#endif /* __CONFIG_H */