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Commit 43581c833876314b3cf556805465a3ab8d86d244

Authored by Akshay Saraswat
Committed by Minkyu Kang
1 parent 061091098a
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

Config: Exynos5420: Refactor SDRAM Bank and Size 

Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Showing 4 changed files with 12 additions and 4 deletions Inline Diff

include/configs/exynos5420-common.h
Diff comments   View file @ 43581c8
1 /* 1 /*
2 * Copyright (C) 2013 Samsung Electronics 2 * Copyright (C) 2013 Samsung Electronics
3 * 3 *
4 * Configuration settings for the SAMSUNG EXYNOS5420 SoC 4 * Configuration settings for the SAMSUNG EXYNOS5420 SoC
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_EXYNOS5420_H 9 #ifndef __CONFIG_EXYNOS5420_H
10 #define __CONFIG_EXYNOS5420_H 10 #define __CONFIG_EXYNOS5420_H
11 11
12 #define CONFIG_EXYNOS5420 12 #define CONFIG_EXYNOS5420
13 /* A variant of Exynos5420 (Exynos5 Family) */ 13 /* A variant of Exynos5420 (Exynos5 Family) */
14 #define CONFIG_EXYNOS5800 14 #define CONFIG_EXYNOS5800
15 15
16 #define CONFIG_ENV_IS_IN_SPI_FLASH 16 #define CONFIG_ENV_IS_IN_SPI_FLASH
17 #define CONFIG_SPI_FLASH 17 #define CONFIG_SPI_FLASH
18 #define CONFIG_ENV_SPI_BASE 0x12D30000 18 #define CONFIG_ENV_SPI_BASE 0x12D30000
19 #define FLASH_SIZE (0x4 << 20) 19 #define FLASH_SIZE (0x4 << 20)
20 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) 20 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
21 #define CONFIG_SPI_BOOTING 21 #define CONFIG_SPI_BOOTING
22 22
23 #include <configs/exynos5-common.h> 23 #include <configs/exynos5-common.h>
24 24
25 #define CONFIG_ARCH_EARLY_INIT_R 25 #define CONFIG_ARCH_EARLY_INIT_R
26 26
27 #define MACH_TYPE_SMDK5420 8002 27 #define MACH_TYPE_SMDK5420 8002
28 #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420 28 #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
29 29
30 #define CONFIG_VAR_SIZE_SPL 30 #define CONFIG_VAR_SIZE_SPL
31 31
32 #define CONFIG_SYS_SDRAM_BASE 0x20000000 32 #define CONFIG_SYS_SDRAM_BASE 0x20000000
33 #define CONFIG_SYS_TEXT_BASE 0x23E00000 33 #define CONFIG_SYS_TEXT_BASE 0x23E00000
34 #ifdef CONFIG_VAR_SIZE_SPL 34 #ifdef CONFIG_VAR_SIZE_SPL
35 #define CONFIG_SPL_TEXT_BASE 0x02024410 35 #define CONFIG_SPL_TEXT_BASE 0x02024410
36 #else 36 #else
37 #define CONFIG_SPL_TEXT_BASE 0x02024400 37 #define CONFIG_SPL_TEXT_BASE 0x02024400
38 #endif 38 #endif
39 #define CONFIG_IRAM_TOP 0x02074000 39 #define CONFIG_IRAM_TOP 0x02074000
40 40
41 #define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024) 41 #define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
42 42
43 #define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi" \ 43 #define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi" \
44 "exynos5420-peach-pit exynos5420-smdk5420" 44 "exynos5420-peach-pit exynos5420-smdk5420"
45 45
46 #define CONFIG_MAX_I2C_NUM 11 46 #define CONFIG_MAX_I2C_NUM 11
47 47
48 #define CONFIG_BOARD_REV_GPIO_COUNT 2 48 #define CONFIG_BOARD_REV_GPIO_COUNT 2
49 49
50 #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000" 50 #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
51 51
52 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 52 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
53 53
54 /* 54 /*
55 * Put the initial stack pointer 1KB below this to allow room for the 55 * Put the initial stack pointer 1KB below this to allow room for the
56 * SPL marker. This value is arbitrary, but gd_t is placed starting here. 56 * SPL marker. This value is arbitrary, but gd_t is placed starting here.
57 */ 57 */
58 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) 58 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
59 59
60 /* DRAM Memory Banks */
61 #define CONFIG_NR_DRAM_BANKS 7
62 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
63
64 /* Miscellaneous configurable options */ 60 /* Miscellaneous configurable options */
65 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 61 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
66 62
67 #endif /* __CONFIG_EXYNOS5420_H */ 63 #endif /* __CONFIG_EXYNOS5420_H */
68 64
include/configs/peach-pi.h
Diff comments   View file @ 43581c8
1 /* 1 /*
2 * Copyright (C) 2014 Samsung Electronics 2 * Copyright (C) 2014 Samsung Electronics
3 * 3 *
4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board. 4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_PEACH_PI_H 9 #ifndef __CONFIG_PEACH_PI_H
10 #define __CONFIG_PEACH_PI_H 10 #define __CONFIG_PEACH_PI_H
11 11
12 #define CONFIG_ENV_IS_IN_SPI_FLASH 12 #define CONFIG_ENV_IS_IN_SPI_FLASH
13 #define CONFIG_SPI_FLASH 13 #define CONFIG_SPI_FLASH
14 #define CONFIG_ENV_SPI_BASE 0x12D30000 14 #define CONFIG_ENV_SPI_BASE 0x12D30000
15 #define FLASH_SIZE (0x4 << 20) 15 #define FLASH_SIZE (0x4 << 20)
16 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) 16 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
17 17
18 #include <configs/exynos5420-common.h> 18 #include <configs/exynos5420-common.h>
19 #include <configs/exynos5-dt-common.h> 19 #include <configs/exynos5-dt-common.h>
20 20
21 #define CONFIG_BOARD_COMMON 21 #define CONFIG_BOARD_COMMON
22 22
23 /* select serial console configuration */ 23 /* select serial console configuration */
24 #define CONFIG_SERIAL3 /* use SERIAL 3 */ 24 #define CONFIG_SERIAL3 /* use SERIAL 3 */
25 25
26 #define CONFIG_SYS_PROMPT "Peach-Pi # " 26 #define CONFIG_SYS_PROMPT "Peach-Pi # "
27 #define CONFIG_IDENT_STRING " for Peach-Pi" 27 #define CONFIG_IDENT_STRING " for Peach-Pi"
28 28
29 #define CONFIG_VIDEO_PARADE 29 #define CONFIG_VIDEO_PARADE
30 30
31 /* Display */ 31 /* Display */
32 #define CONFIG_LCD 32 #define CONFIG_LCD
33 #ifdef CONFIG_LCD 33 #ifdef CONFIG_LCD
34 #define CONFIG_EXYNOS_FB 34 #define CONFIG_EXYNOS_FB
35 #define CONFIG_EXYNOS_DP 35 #define CONFIG_EXYNOS_DP
36 #define LCD_BPP LCD_COLOR16 36 #define LCD_BPP LCD_COLOR16
37 #endif 37 #endif
38 38
39 #define CONFIG_POWER_TPS65090_EC 39 #define CONFIG_POWER_TPS65090_EC
40 #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ 40 #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
41 #define CONFIG_DM_CROS_EC 41 #define CONFIG_DM_CROS_EC
42 42
43 #define CONFIG_USB_XHCI 43 #define CONFIG_USB_XHCI
44 #define CONFIG_USB_XHCI_EXYNOS 44 #define CONFIG_USB_XHCI_EXYNOS
45 45
46 /* DRAM Memory Banks */
47 #define CONFIG_NR_DRAM_BANKS 7
48 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
49
46 #endif /* __CONFIG_PEACH_PI_H */ 50 #endif /* __CONFIG_PEACH_PI_H */
47 51
include/configs/peach-pit.h
Diff comments   View file @ 43581c8
1 /* 1 /*
2 * Copyright (C) 2013 Samsung Electronics 2 * Copyright (C) 2013 Samsung Electronics
3 * 3 *
4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board. 4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_PEACH_PIT_H 9 #ifndef __CONFIG_PEACH_PIT_H
10 #define __CONFIG_PEACH_PIT_H 10 #define __CONFIG_PEACH_PIT_H
11 11
12 #define CONFIG_ENV_IS_IN_SPI_FLASH 12 #define CONFIG_ENV_IS_IN_SPI_FLASH
13 #define CONFIG_SPI_FLASH 13 #define CONFIG_SPI_FLASH
14 #define CONFIG_ENV_SPI_BASE 0x12D30000 14 #define CONFIG_ENV_SPI_BASE 0x12D30000
15 #define FLASH_SIZE (0x4 << 20) 15 #define FLASH_SIZE (0x4 << 20)
16 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) 16 #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
17 17
18 #include <configs/exynos5420-common.h> 18 #include <configs/exynos5420-common.h>
19 #include <configs/exynos5-dt-common.h> 19 #include <configs/exynos5-dt-common.h>
20 20
21 #define CONFIG_BOARD_COMMON 21 #define CONFIG_BOARD_COMMON
22 22
23 /* select serial console configuration */ 23 /* select serial console configuration */
24 #define CONFIG_SERIAL3 /* use SERIAL 3 */ 24 #define CONFIG_SERIAL3 /* use SERIAL 3 */
25 25
26 #define CONFIG_SYS_PROMPT "Peach-Pit # " 26 #define CONFIG_SYS_PROMPT "Peach-Pit # "
27 #define CONFIG_IDENT_STRING " for Peach-Pit" 27 #define CONFIG_IDENT_STRING " for Peach-Pit"
28 28
29 #define CONFIG_VIDEO_PARADE 29 #define CONFIG_VIDEO_PARADE
30 30
31 /* Display */ 31 /* Display */
32 #define CONFIG_LCD 32 #define CONFIG_LCD
33 #ifdef CONFIG_LCD 33 #ifdef CONFIG_LCD
34 #define CONFIG_EXYNOS_FB 34 #define CONFIG_EXYNOS_FB
35 #define CONFIG_EXYNOS_DP 35 #define CONFIG_EXYNOS_DP
36 #define LCD_BPP LCD_COLOR16 36 #define LCD_BPP LCD_COLOR16
37 #endif 37 #endif
38 38
39 #define CONFIG_POWER_TPS65090_EC 39 #define CONFIG_POWER_TPS65090_EC
40 #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */ 40 #define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
41 #define CONFIG_DM_CROS_EC 41 #define CONFIG_DM_CROS_EC
42 42
43 #define CONFIG_USB_XHCI 43 #define CONFIG_USB_XHCI
44 #define CONFIG_USB_XHCI_EXYNOS 44 #define CONFIG_USB_XHCI_EXYNOS
45 45
46 /* DRAM Memory Banks */
47 #define CONFIG_NR_DRAM_BANKS 4
48 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
49
46 #endif /* __CONFIG_PEACH_PIT_H */ 50 #endif /* __CONFIG_PEACH_PIT_H */
47 51
include/configs/smdk5420.h
Diff comments   View file @ 43581c8
1 /* 1 /*
2 * Copyright (C) 2013 Samsung Electronics 2 * Copyright (C) 2013 Samsung Electronics
3 * 3 *
4 * Configuration settings for the SAMSUNG SMDK5420 board. 4 * Configuration settings for the SAMSUNG SMDK5420 board.
5 * 5 *
6 * SPDX-License-Identifier: GPL-2.0+ 6 * SPDX-License-Identifier: GPL-2.0+
7 */ 7 */
8 8
9 #ifndef __CONFIG_SMDK5420_H 9 #ifndef __CONFIG_SMDK5420_H
10 #define __CONFIG_SMDK5420_H 10 #define __CONFIG_SMDK5420_H
11 11
12 #include <configs/exynos5420-common.h> 12 #include <configs/exynos5420-common.h>
13 13
14 #define CONFIG_BOARD_COMMON 14 #define CONFIG_BOARD_COMMON
15 15
16 #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ 16 #define CONFIG_SMDK5420 /* which is in a SMDK5420 */
17 17
18 18
19 /* select serial console configuration */ 19 /* select serial console configuration */
20 #define CONFIG_SERIAL3 /* use SERIAL 3 */ 20 #define CONFIG_SERIAL3 /* use SERIAL 3 */
21 21
22 #define CONFIG_SYS_PROMPT "SMDK5420 # " 22 #define CONFIG_SYS_PROMPT "SMDK5420 # "
23 #define CONFIG_IDENT_STRING " for SMDK5420" 23 #define CONFIG_IDENT_STRING " for SMDK5420"
24 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" 24 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
25 25
26 /* DRAM Memory Banks */
27 #define CONFIG_NR_DRAM_BANKS 7
28 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
29
26 #endif /* __CONFIG_SMDK5420_H */ 30 #endif /* __CONFIG_SMDK5420_H */
27 31