Eric Lee / smarc-uboot

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Commit 43db8e3e41c4e70641c64984918572dfe3facdb1

Authored by Adam Ford
Committed by Stefano Babic
1 parent 2881ec544d
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

ARM: imx6q_logic: Remove legacy pinmuxing code from board file. 

With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with
-u-boot.dtsi entries to include the pinmuxing in SPL, the manual
code setting up the pinmux can go away.

This patch removes the legacy pinmuxing code from the board file.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

Showing 1 changed file with 0 additions and 85 deletions Side-by-side Diff

board/logicpd/imx6/imx6logic.c
Diff comments   View file @ 43db8e3
... ... @@ -42,32 +42,6 @@
42 42 return 0;
43 43 }
44 44  
45   -static iomux_v3_cfg_t const uart1_pads[] = {
46   - MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
47   - MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
48   -};
49   -
50   -static iomux_v3_cfg_t const uart2_pads[] = {
51   - MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
52   - MX6_PAD_SD4_DAT5__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
53   - MX6_PAD_SD4_DAT6__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
54   - MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
55   -};
56   -
57   -static iomux_v3_cfg_t const uart3_pads[] = {
58   - MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
59   - MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
60   - MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
61   - MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
62   -};
63   -
64   -static void setup_iomux_uart(void)
65   -{
66   - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
67   - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
68   - imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
69   -}
70   -
71 45 static iomux_v3_cfg_t const nand_pads[] = {
72 46 MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
73 47 MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL),
... ... @@ -135,7 +109,6 @@
135 109  
136 110 int board_early_init_f(void)
137 111 {
138   - setup_iomux_uart();
139 112 setup_nand_pins();
140 113 return 0;
141 114 }
... ... @@ -177,36 +150,6 @@
177 150 }
178 151 #endif
179 152  
180   -/* SD interface */
181   -#define USDHC_PAD_CTRL \
182   - (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
183   - PAD_CTL_SRE_FAST | PAD_CTL_HYS)
184   -
185   -static iomux_v3_cfg_t const usdhc1_pads[] = {
186   - MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
187   - MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
188   - MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
189   - MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
190   - MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
191   - MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
192   -};
193   -
194   -static iomux_v3_cfg_t const usdhc2_pads[] = {
195   - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
196   - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
197   - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
198   - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
199   - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
200   - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
201   - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
202   -};
203   -
204   -#ifdef CONFIG_FSL_ESDHC_IMX
205   -struct fsl_esdhc_cfg usdhc_cfg[] = {
206   - {USDHC1_BASE_ADDR}, /* SOM */
207   - {USDHC2_BASE_ADDR} /* Baseboard */
208   -};
209   -
210 153 void board_boot_order(u32 *spl_boot_list)
211 154 {
212 155 struct src *psrc = (struct src *)SRC_BASE_ADDR;
... ... @@ -235,34 +178,6 @@
235 178 /* As a last resort, use serial downloader */
236 179 spl_boot_list[2] = BOOT_DEVICE_BOARD;
237 180 }
238   -
239   -int board_mmc_init(bd_t *bis)
240   -{
241   - struct src *psrc = (struct src *)SRC_BASE_ADDR;
242   - unsigned int reg = readl(&psrc->sbmr1) >> 11;
243   - /*
244   - * Upon reading BOOT_CFG register the following map is done:
245   - * Bit 11 and 12 of BOOT_CFG register can determine the current
246   - * mmc port
247   - * 0x1 SD1-SOM
248   - * 0x2 SD2-Baseboard
249   - */
250   -
251   - reg &= 0x3; /* Only care about bottom 2 bits */
252   -
253   - switch (reg) {
254   - case 0:
255   - SETUP_IOMUX_PADS(usdhc1_pads);
256   - break;
257   - case 1:
258   - SETUP_IOMUX_PADS(usdhc2_pads);
259   - break;
260   - }
261   -
262   - return 0;
263   -}
264   -
265   -#endif
266 181  
267 182 static void ccgr_init(void)
268 183 {