Eric Lee / smarc-uboot

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Commit 44a84b44a84cd1bdcc54d722987e5f109510891b

Authored by Ye Li
1 parent a72491e307
Exists in smarc-rel_imx_4.1.15_2.0.0_ga

MLK-13115 imx: mx6ullevk: Update LPDDR2 script for i.MX6ULL 9x9 EVK 

Update the LPDDR2 script to 1.2 rev with delay line settings changed.

File:
  IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc
  https://nxp1.sharepoint.com/teams/123/IMX6ULL/SitePages/Documents.aspx

Changes:
  Update Delay Line Settings based on the delay line calibration results of more boards.
       MMDC_MPRDDLCTL   = 0x40403439
       MMDC_MPWRDLCTL   = 0X4040342D

Test:
  One 9x9 EVK board pass stress memtester.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 2 changed files with 4 additions and 4 deletions Inline Diff

board/freescale/mx6ullevk/imximage_lpddr2.cfg
Diff comments   View file @ 44a84b4
1 /* 1 /*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 * 5 *
6 * Refer docs/README.imxmage for more details about how-to configure 6 * Refer docs/README.imxmage for more details about how-to configure
7 * and create imximage boot image 7 * and create imximage boot image
8 * 8 *
9 * The syntax is taken as close as possible with the kwbimage 9 * The syntax is taken as close as possible with the kwbimage
10 */ 10 */
11 11
12 #define __ASSEMBLY__ 12 #define __ASSEMBLY__
13 #include <config.h> 13 #include <config.h>
14 14
15 /* image version */ 15 /* image version */
16 16
17 IMAGE_VERSION 2 17 IMAGE_VERSION 2
18 18
19 /* 19 /*
20 * Boot Device : one of 20 * Boot Device : one of
21 * spi/sd/nand/onenand, qspi/nor 21 * spi/sd/nand/onenand, qspi/nor
22 */ 22 */
23 23
24 #ifdef CONFIG_SYS_BOOT_QSPI 24 #ifdef CONFIG_SYS_BOOT_QSPI
25 BOOT_FROM qspi 25 BOOT_FROM qspi
26 #elif defined(CONFIG_SYS_BOOT_EIMNOR) 26 #elif defined(CONFIG_SYS_BOOT_EIMNOR)
27 BOOT_FROM nor 27 BOOT_FROM nor
28 #else 28 #else
29 BOOT_FROM sd 29 BOOT_FROM sd
30 #endif 30 #endif
31 31
32 #ifdef CONFIG_USE_PLUGIN 32 #ifdef CONFIG_USE_PLUGIN
33 /*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/ 33 /*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
34 PLUGIN board/freescale/mx6ullevk/plugin.bin 0x00907000 34 PLUGIN board/freescale/mx6ullevk/plugin.bin 0x00907000
35 #else 35 #else
36 36
37 #ifdef CONFIG_SECURE_BOOT 37 #ifdef CONFIG_SECURE_BOOT
38 CSF CONFIG_CSF_SIZE 38 CSF CONFIG_CSF_SIZE
39 #endif 39 #endif
40 40
41 /* 41 /*
42 * Device Configuration Data (DCD) 42 * Device Configuration Data (DCD)
43 * 43 *
44 * Each entry must have the format: 44 * Each entry must have the format:
45 * Addr-type Address Value 45 * Addr-type Address Value
46 * 46 *
47 * where: 47 * where:
48 * Addr-type register length (1,2 or 4 bytes) 48 * Addr-type register length (1,2 or 4 bytes)
49 * Address absolute address of the register 49 * Address absolute address of the register
50 * value value to be stored in the register 50 * value value to be stored in the register
51 */ 51 */
52 52
53 DATA 4 0x020c4068 0xffffffff 53 DATA 4 0x020c4068 0xffffffff
54 DATA 4 0x020c406c 0xffffffff 54 DATA 4 0x020c406c 0xffffffff
55 DATA 4 0x020c4070 0xffffffff 55 DATA 4 0x020c4070 0xffffffff
56 DATA 4 0x020c4074 0xffffffff 56 DATA 4 0x020c4074 0xffffffff
57 DATA 4 0x020c4078 0xffffffff 57 DATA 4 0x020c4078 0xffffffff
58 DATA 4 0x020c407c 0xffffffff 58 DATA 4 0x020c407c 0xffffffff
59 DATA 4 0x020c4080 0xffffffff 59 DATA 4 0x020c4080 0xffffffff
60 60
61 DATA 4 0x020E04B4 0x00080000 61 DATA 4 0x020E04B4 0x00080000
62 DATA 4 0x020E04AC 0x00000000 62 DATA 4 0x020E04AC 0x00000000
63 DATA 4 0x020E027C 0x00000030 63 DATA 4 0x020E027C 0x00000030
64 DATA 4 0x020E0250 0x00000030 64 DATA 4 0x020E0250 0x00000030
65 DATA 4 0x020E024C 0x00000030 65 DATA 4 0x020E024C 0x00000030
66 DATA 4 0x020E0490 0x00000030 66 DATA 4 0x020E0490 0x00000030
67 DATA 4 0x020E0288 0x00000030 67 DATA 4 0x020E0288 0x00000030
68 DATA 4 0x020E0270 0x00000000 68 DATA 4 0x020E0270 0x00000000
69 DATA 4 0x020E0260 0x00000000 69 DATA 4 0x020E0260 0x00000000
70 DATA 4 0x020E0264 0x00000000 70 DATA 4 0x020E0264 0x00000000
71 DATA 4 0x020E04A0 0x00000030 71 DATA 4 0x020E04A0 0x00000030
72 DATA 4 0x020E0494 0x00020000 72 DATA 4 0x020E0494 0x00020000
73 DATA 4 0x020E0280 0x00003030 73 DATA 4 0x020E0280 0x00003030
74 DATA 4 0x020E0284 0x00003030 74 DATA 4 0x020E0284 0x00003030
75 DATA 4 0x020E04B0 0x00020000 75 DATA 4 0x020E04B0 0x00020000
76 DATA 4 0x020E0498 0x00000030 76 DATA 4 0x020E0498 0x00000030
77 DATA 4 0x020E04A4 0x00000030 77 DATA 4 0x020E04A4 0x00000030
78 DATA 4 0x020E0244 0x00000030 78 DATA 4 0x020E0244 0x00000030
79 DATA 4 0x020E0248 0x00000030 79 DATA 4 0x020E0248 0x00000030
80 80
81 DATA 4 0x021B001C 0x00008000 81 DATA 4 0x021B001C 0x00008000
82 DATA 4 0x021B085C 0x1b4700c7 82 DATA 4 0x021B085C 0x1b4700c7
83 DATA 4 0x021B0800 0xA1390003 83 DATA 4 0x021B0800 0xA1390003
84 DATA 4 0x021B0890 0x23400A38 84 DATA 4 0x021B0890 0x23400A38
85 DATA 4 0x021B08b8 0x00000800 85 DATA 4 0x021B08b8 0x00000800
86 86
87 DATA 4 0x021B081C 0x33333333 87 DATA 4 0x021B081C 0x33333333
88 DATA 4 0x021B0820 0x33333333 88 DATA 4 0x021B0820 0x33333333
89 DATA 4 0x021B082C 0xf3333333 89 DATA 4 0x021B082C 0xf3333333
90 DATA 4 0x021B0830 0xf3333333 90 DATA 4 0x021B0830 0xf3333333
91 DATA 4 0x021B083C 0x20000000 91 DATA 4 0x021B083C 0x20000000
92 DATA 4 0x021B0848 0x40403238 92 DATA 4 0x021B0848 0x40403439
93 DATA 4 0x021B0850 0x4040322C 93 DATA 4 0x021B0850 0x4040342D
94 DATA 4 0x021B08C0 0x00921012 94 DATA 4 0x021B08C0 0x00921012
95 DATA 4 0x021B08b8 0x00000800 95 DATA 4 0x021B08b8 0x00000800
96 96
97 DATA 4 0x021B0004 0x00020052 97 DATA 4 0x021B0004 0x00020052
98 DATA 4 0x021B0008 0x00000000 98 DATA 4 0x021B0008 0x00000000
99 DATA 4 0x021B000C 0x33374133 99 DATA 4 0x021B000C 0x33374133
100 DATA 4 0x021B0010 0x00100A82 100 DATA 4 0x021B0010 0x00100A82
101 DATA 4 0x021B0038 0x00170557 101 DATA 4 0x021B0038 0x00170557
102 DATA 4 0x021B0014 0x00000093 102 DATA 4 0x021B0014 0x00000093
103 DATA 4 0x021B0018 0x00201748 103 DATA 4 0x021B0018 0x00201748
104 DATA 4 0x021B002C 0x0F9F26D2 104 DATA 4 0x021B002C 0x0F9F26D2
105 DATA 4 0x021B0030 0x009F0010 105 DATA 4 0x021B0030 0x009F0010
106 DATA 4 0x021B0040 0x00000047 106 DATA 4 0x021B0040 0x00000047
107 DATA 4 0x021B0000 0x83100000 107 DATA 4 0x021B0000 0x83100000
108 DATA 4 0x021B001C 0x003F8030 108 DATA 4 0x021B001C 0x003F8030
109 DATA 4 0x021B001C 0xFF0A8030 109 DATA 4 0x021B001C 0xFF0A8030
110 DATA 4 0x021B001C 0x82018030 110 DATA 4 0x021B001C 0x82018030
111 DATA 4 0x021B001C 0x04028030 111 DATA 4 0x021B001C 0x04028030
112 DATA 4 0x021B001C 0x01038030 112 DATA 4 0x021B001C 0x01038030
113 DATA 4 0x021B0020 0x00001800 113 DATA 4 0x021B0020 0x00001800
114 DATA 4 0x021B0818 0x00000000 114 DATA 4 0x021B0818 0x00000000
115 DATA 4 0x021B0800 0xA1310003 115 DATA 4 0x021B0800 0xA1310003
116 DATA 4 0x021B0004 0x00025552 116 DATA 4 0x021B0004 0x00025552
117 DATA 4 0x021B0404 0x00011006 117 DATA 4 0x021B0404 0x00011006
118 DATA 4 0x021B001C 0x00000000 118 DATA 4 0x021B001C 0x00000000
119 #endif 119 #endif
120 120
board/freescale/mx6ullevk/plugin.S
Diff comments   View file @ 44a84b4
1 /* 1 /*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc. 2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 * 3 *
4 * SPDX-License-Identifier: GPL-2.0+ 4 * SPDX-License-Identifier: GPL-2.0+
5 */ 5 */
6 6
7 #include <config.h> 7 #include <config.h>
8 8
9 /* DDR script */ 9 /* DDR script */
10 .macro imx6ull_ddr3_evk_setting 10 .macro imx6ull_ddr3_evk_setting
11 ldr r0, =IOMUXC_BASE_ADDR 11 ldr r0, =IOMUXC_BASE_ADDR
12 ldr r1, =0x000C0000 12 ldr r1, =0x000C0000
13 str r1, [r0, #0x4B4] 13 str r1, [r0, #0x4B4]
14 ldr r1, =0x00000000 14 ldr r1, =0x00000000
15 str r1, [r0, #0x4AC] 15 str r1, [r0, #0x4AC]
16 ldr r1, =0x00000030 16 ldr r1, =0x00000030
17 str r1, [r0, #0x27C] 17 str r1, [r0, #0x27C]
18 ldr r1, =0x00000030 18 ldr r1, =0x00000030
19 str r1, [r0, #0x250] 19 str r1, [r0, #0x250]
20 str r1, [r0, #0x24C] 20 str r1, [r0, #0x24C]
21 str r1, [r0, #0x490] 21 str r1, [r0, #0x490]
22 ldr r1, =0x000C0030 22 ldr r1, =0x000C0030
23 str r1, [r0, #0x288] 23 str r1, [r0, #0x288]
24 24
25 ldr r1, =0x00000000 25 ldr r1, =0x00000000
26 str r1, [r0, #0x270] 26 str r1, [r0, #0x270]
27 27
28 ldr r1, =0x00000030 28 ldr r1, =0x00000030
29 str r1, [r0, #0x260] 29 str r1, [r0, #0x260]
30 str r1, [r0, #0x264] 30 str r1, [r0, #0x264]
31 str r1, [r0, #0x4A0] 31 str r1, [r0, #0x4A0]
32 32
33 ldr r1, =0x00020000 33 ldr r1, =0x00020000
34 str r1, [r0, #0x494] 34 str r1, [r0, #0x494]
35 35
36 ldr r1, =0x00000030 36 ldr r1, =0x00000030
37 str r1, [r0, #0x280] 37 str r1, [r0, #0x280]
38 ldr r1, =0x00000030 38 ldr r1, =0x00000030
39 str r1, [r0, #0x284] 39 str r1, [r0, #0x284]
40 40
41 ldr r1, =0x00020000 41 ldr r1, =0x00020000
42 str r1, [r0, #0x4B0] 42 str r1, [r0, #0x4B0]
43 43
44 ldr r1, =0x00000030 44 ldr r1, =0x00000030
45 str r1, [r0, #0x498] 45 str r1, [r0, #0x498]
46 str r1, [r0, #0x4A4] 46 str r1, [r0, #0x4A4]
47 str r1, [r0, #0x244] 47 str r1, [r0, #0x244]
48 str r1, [r0, #0x248] 48 str r1, [r0, #0x248]
49 49
50 ldr r0, =MMDC_P0_BASE_ADDR 50 ldr r0, =MMDC_P0_BASE_ADDR
51 ldr r1, =0x00008000 51 ldr r1, =0x00008000
52 str r1, [r0, #0x1C] 52 str r1, [r0, #0x1C]
53 ldr r1, =0xA1390003 53 ldr r1, =0xA1390003
54 str r1, [r0, #0x800] 54 str r1, [r0, #0x800]
55 ldr r1, =0x00000004 55 ldr r1, =0x00000004
56 str r1, [r0, #0x80C] 56 str r1, [r0, #0x80C]
57 ldr r1, =0x41640158 57 ldr r1, =0x41640158
58 str r1, [r0, #0x83C] 58 str r1, [r0, #0x83C]
59 ldr r1, =0x40403237 59 ldr r1, =0x40403237
60 str r1, [r0, #0x848] 60 str r1, [r0, #0x848]
61 ldr r1, =0x40403C33 61 ldr r1, =0x40403C33
62 str r1, [r0, #0x850] 62 str r1, [r0, #0x850]
63 ldr r1, =0x33333333 63 ldr r1, =0x33333333
64 str r1, [r0, #0x81C] 64 str r1, [r0, #0x81C]
65 str r1, [r0, #0x820] 65 str r1, [r0, #0x820]
66 ldr r1, =0xF3333333 66 ldr r1, =0xF3333333
67 str r1, [r0, #0x82C] 67 str r1, [r0, #0x82C]
68 str r1, [r0, #0x830] 68 str r1, [r0, #0x830]
69 ldr r1, =0x00944009 69 ldr r1, =0x00944009
70 str r1, [r0, #0x8C0] 70 str r1, [r0, #0x8C0]
71 ldr r1, =0x00000800 71 ldr r1, =0x00000800
72 str r1, [r0, #0x8B8] 72 str r1, [r0, #0x8B8]
73 ldr r1, =0x0002002D 73 ldr r1, =0x0002002D
74 str r1, [r0, #0x004] 74 str r1, [r0, #0x004]
75 ldr r1, =0x1B333030 75 ldr r1, =0x1B333030
76 str r1, [r0, #0x008] 76 str r1, [r0, #0x008]
77 ldr r1, =0x676B52F3 77 ldr r1, =0x676B52F3
78 str r1, [r0, #0x00C] 78 str r1, [r0, #0x00C]
79 ldr r1, =0xB66D0B63 79 ldr r1, =0xB66D0B63
80 str r1, [r0, #0x010] 80 str r1, [r0, #0x010]
81 ldr r1, =0x01FF00DB 81 ldr r1, =0x01FF00DB
82 str r1, [r0, #0x014] 82 str r1, [r0, #0x014]
83 ldr r1, =0x00201740 83 ldr r1, =0x00201740
84 str r1, [r0, #0x018] 84 str r1, [r0, #0x018]
85 ldr r1, =0x00008000 85 ldr r1, =0x00008000
86 str r1, [r0, #0x01C] 86 str r1, [r0, #0x01C]
87 ldr r1, =0x000026D2 87 ldr r1, =0x000026D2
88 str r1, [r0, #0x02C] 88 str r1, [r0, #0x02C]
89 ldr r1, =0x006B1023 89 ldr r1, =0x006B1023
90 str r1, [r0, #0x030] 90 str r1, [r0, #0x030]
91 ldr r1, =0x0000004F 91 ldr r1, =0x0000004F
92 str r1, [r0, #0x040] 92 str r1, [r0, #0x040]
93 ldr r1, =0x84180000 93 ldr r1, =0x84180000
94 str r1, [r0, #0x000] 94 str r1, [r0, #0x000]
95 ldr r1, =0x00400000 95 ldr r1, =0x00400000
96 str r1, [r0, #0x890] 96 str r1, [r0, #0x890]
97 ldr r1, =0x02008032 97 ldr r1, =0x02008032
98 str r1, [r0, #0x01C] 98 str r1, [r0, #0x01C]
99 ldr r1, =0x00008033 99 ldr r1, =0x00008033
100 str r1, [r0, #0x01C] 100 str r1, [r0, #0x01C]
101 ldr r1, =0x00048031 101 ldr r1, =0x00048031
102 str r1, [r0, #0x01C] 102 str r1, [r0, #0x01C]
103 ldr r1, =0x15208030 103 ldr r1, =0x15208030
104 str r1, [r0, #0x01C] 104 str r1, [r0, #0x01C]
105 ldr r1, =0x04008040 105 ldr r1, =0x04008040
106 str r1, [r0, #0x01C] 106 str r1, [r0, #0x01C]
107 ldr r1, =0x00000800 107 ldr r1, =0x00000800
108 str r1, [r0, #0x020] 108 str r1, [r0, #0x020]
109 ldr r1, =0x00000227 109 ldr r1, =0x00000227
110 str r1, [r0, #0x818] 110 str r1, [r0, #0x818]
111 ldr r1, =0x0002552D 111 ldr r1, =0x0002552D
112 str r1, [r0, #0x004] 112 str r1, [r0, #0x004]
113 ldr r1, =0x00011006 113 ldr r1, =0x00011006
114 str r1, [r0, #0x404] 114 str r1, [r0, #0x404]
115 ldr r1, =0x00000000 115 ldr r1, =0x00000000
116 str r1, [r0, #0x01C] 116 str r1, [r0, #0x01C]
117 .endm 117 .endm
118 118
119 .macro imx6ull_lpddr2_evk_setting 119 .macro imx6ull_lpddr2_evk_setting
120 ldr r0, =IOMUXC_BASE_ADDR 120 ldr r0, =IOMUXC_BASE_ADDR
121 ldr r1, =0x00080000 121 ldr r1, =0x00080000
122 str r1, [r0, #0x4B4] 122 str r1, [r0, #0x4B4]
123 ldr r1, =0x00000000 123 ldr r1, =0x00000000
124 str r1, [r0, #0x4AC] 124 str r1, [r0, #0x4AC]
125 ldr r1, =0x00000030 125 ldr r1, =0x00000030
126 str r1, [r0, #0x27C] 126 str r1, [r0, #0x27C]
127 str r1, [r0, #0x250] 127 str r1, [r0, #0x250]
128 str r1, [r0, #0x24C] 128 str r1, [r0, #0x24C]
129 str r1, [r0, #0x490] 129 str r1, [r0, #0x490]
130 str r1, [r0, #0x288] 130 str r1, [r0, #0x288]
131 131
132 ldr r1, =0x00000000 132 ldr r1, =0x00000000
133 str r1, [r0, #0x270] 133 str r1, [r0, #0x270]
134 str r1, [r0, #0x260] 134 str r1, [r0, #0x260]
135 str r1, [r0, #0x264] 135 str r1, [r0, #0x264]
136 136
137 ldr r1, =0x00000030 137 ldr r1, =0x00000030
138 str r1, [r0, #0x4A0] 138 str r1, [r0, #0x4A0]
139 139
140 ldr r1, =0x00020000 140 ldr r1, =0x00020000
141 str r1, [r0, #0x494] 141 str r1, [r0, #0x494]
142 142
143 ldr r1, =0x00003030 143 ldr r1, =0x00003030
144 str r1, [r0, #0x280] 144 str r1, [r0, #0x280]
145 ldr r1, =0x00003030 145 ldr r1, =0x00003030
146 str r1, [r0, #0x284] 146 str r1, [r0, #0x284]
147 147
148 ldr r1, =0x00020000 148 ldr r1, =0x00020000
149 str r1, [r0, #0x4B0] 149 str r1, [r0, #0x4B0]
150 150
151 ldr r1, =0x00000030 151 ldr r1, =0x00000030
152 str r1, [r0, #0x498] 152 str r1, [r0, #0x498]
153 str r1, [r0, #0x4A4] 153 str r1, [r0, #0x4A4]
154 str r1, [r0, #0x244] 154 str r1, [r0, #0x244]
155 str r1, [r0, #0x248] 155 str r1, [r0, #0x248]
156 156
157 ldr r0, =MMDC_P0_BASE_ADDR 157 ldr r0, =MMDC_P0_BASE_ADDR
158 ldr r1, =0x00008000 158 ldr r1, =0x00008000
159 str r1, [r0, #0x1C] 159 str r1, [r0, #0x1C]
160 ldr r1, =0x1b4700c7 160 ldr r1, =0x1b4700c7
161 str r1, [r0, #0x85c] 161 str r1, [r0, #0x85c]
162 ldr r1, =0xA1390003 162 ldr r1, =0xA1390003
163 str r1, [r0, #0x800] 163 str r1, [r0, #0x800]
164 ldr r1, =0x23400A38 164 ldr r1, =0x23400A38
165 str r1, [r0, #0x890] 165 str r1, [r0, #0x890]
166 ldr r1, =0x00000800 166 ldr r1, =0x00000800
167 str r1, [r0, #0x8b8] 167 str r1, [r0, #0x8b8]
168 ldr r1, =0x33333333 168 ldr r1, =0x33333333
169 str r1, [r0, #0x81C] 169 str r1, [r0, #0x81C]
170 str r1, [r0, #0x820] 170 str r1, [r0, #0x820]
171 ldr r1, =0xF3333333 171 ldr r1, =0xF3333333
172 str r1, [r0, #0x82C] 172 str r1, [r0, #0x82C]
173 str r1, [r0, #0x830] 173 str r1, [r0, #0x830]
174 ldr r1, =0x20000000 174 ldr r1, =0x20000000
175 str r1, [r0, #0x83C] 175 str r1, [r0, #0x83C]
176 ldr r1, =0x40403238 176 ldr r1, =0x40403439
177 str r1, [r0, #0x848] 177 str r1, [r0, #0x848]
178 ldr r1, =0x4040322C 178 ldr r1, =0x4040342D
179 str r1, [r0, #0x850] 179 str r1, [r0, #0x850]
180 ldr r1, =0x00921012 180 ldr r1, =0x00921012
181 str r1, [r0, #0x8C0] 181 str r1, [r0, #0x8C0]
182 ldr r1, =0x00000800 182 ldr r1, =0x00000800
183 str r1, [r0, #0x8B8] 183 str r1, [r0, #0x8B8]
184 184
185 ldr r1, =0x00020052 185 ldr r1, =0x00020052
186 str r1, [r0, #0x004] 186 str r1, [r0, #0x004]
187 ldr r1, =0x00000000 187 ldr r1, =0x00000000
188 str r1, [r0, #0x008] 188 str r1, [r0, #0x008]
189 ldr r1, =0x33374133 189 ldr r1, =0x33374133
190 str r1, [r0, #0x00C] 190 str r1, [r0, #0x00C]
191 ldr r1, =0x00100A82 191 ldr r1, =0x00100A82
192 str r1, [r0, #0x010] 192 str r1, [r0, #0x010]
193 ldr r1, =0x00170557 193 ldr r1, =0x00170557
194 str r1, [r0, #0x038] 194 str r1, [r0, #0x038]
195 ldr r1, =0x00000093 195 ldr r1, =0x00000093
196 str r1, [r0, #0x014] 196 str r1, [r0, #0x014]
197 ldr r1, =0x00201748 197 ldr r1, =0x00201748
198 str r1, [r0, #0x018] 198 str r1, [r0, #0x018]
199 ldr r1, =0x0F9F26D2 199 ldr r1, =0x0F9F26D2
200 str r1, [r0, #0x02C] 200 str r1, [r0, #0x02C]
201 ldr r1, =0x009F0010 201 ldr r1, =0x009F0010
202 str r1, [r0, #0x030] 202 str r1, [r0, #0x030]
203 ldr r1, =0x00000047 203 ldr r1, =0x00000047
204 str r1, [r0, #0x040] 204 str r1, [r0, #0x040]
205 ldr r1, =0x83100000 205 ldr r1, =0x83100000
206 str r1, [r0, #0x000] 206 str r1, [r0, #0x000]
207 ldr r1, =0x003F8030 207 ldr r1, =0x003F8030
208 str r1, [r0, #0x01C] 208 str r1, [r0, #0x01C]
209 ldr r1, =0xFF0A8030 209 ldr r1, =0xFF0A8030
210 str r1, [r0, #0x01C] 210 str r1, [r0, #0x01C]
211 ldr r1, =0x82018030 211 ldr r1, =0x82018030
212 str r1, [r0, #0x01C] 212 str r1, [r0, #0x01C]
213 ldr r1, =0x04028030 213 ldr r1, =0x04028030
214 str r1, [r0, #0x01C] 214 str r1, [r0, #0x01C]
215 ldr r1, =0x01038030 215 ldr r1, =0x01038030
216 str r1, [r0, #0x01C] 216 str r1, [r0, #0x01C]
217 ldr r1, =0x00001800 217 ldr r1, =0x00001800
218 str r1, [r0, #0x020] 218 str r1, [r0, #0x020]
219 ldr r1, =0x00000000 219 ldr r1, =0x00000000
220 str r1, [r0, #0x818] 220 str r1, [r0, #0x818]
221 ldr r1, =0xA1310003 221 ldr r1, =0xA1310003
222 str r1, [r0, #0x800] 222 str r1, [r0, #0x800]
223 ldr r1, =0x00025552 223 ldr r1, =0x00025552
224 str r1, [r0, #0x004] 224 str r1, [r0, #0x004]
225 ldr r1, =0x00011006 225 ldr r1, =0x00011006
226 str r1, [r0, #0x404] 226 str r1, [r0, #0x404]
227 ldr r1, =0x00000000 227 ldr r1, =0x00000000
228 str r1, [r0, #0x01C] 228 str r1, [r0, #0x01C]
229 .endm 229 .endm
230 230
231 .macro imx6_clock_gating 231 .macro imx6_clock_gating
232 ldr r0, =CCM_BASE_ADDR 232 ldr r0, =CCM_BASE_ADDR
233 ldr r1, =0xFFFFFFFF 233 ldr r1, =0xFFFFFFFF
234 str r1, [r0, #0x68] 234 str r1, [r0, #0x68]
235 str r1, [r0, #0x6C] 235 str r1, [r0, #0x6C]
236 str r1, [r0, #0x70] 236 str r1, [r0, #0x70]
237 str r1, [r0, #0x74] 237 str r1, [r0, #0x74]
238 str r1, [r0, #0x78] 238 str r1, [r0, #0x78]
239 str r1, [r0, #0x7C] 239 str r1, [r0, #0x7C]
240 str r1, [r0, #0x80] 240 str r1, [r0, #0x80]
241 .endm 241 .endm
242 242
243 .macro imx6_qos_setting 243 .macro imx6_qos_setting
244 .endm 244 .endm
245 245
246 .macro imx6_ddr_setting 246 .macro imx6_ddr_setting
247 #if defined (CONFIG_TARGET_MX6ULL_9X9_EVK) 247 #if defined (CONFIG_TARGET_MX6ULL_9X9_EVK)
248 imx6ull_lpddr2_evk_setting 248 imx6ull_lpddr2_evk_setting
249 #else 249 #else
250 imx6ull_ddr3_evk_setting 250 imx6ull_ddr3_evk_setting
251 #endif 251 #endif
252 .endm 252 .endm
253 253
254 /* include the common plugin code here */ 254 /* include the common plugin code here */
255 #include <asm/arch/mx6_plugin.S> 255 #include <asm/arch/mx6_plugin.S>
256 256