Commit 44a84b44a84cd1bdcc54d722987e5f109510891b

Authored by Ye Li
1 parent a72491e307

MLK-13115 imx: mx6ullevk: Update LPDDR2 script for i.MX6ULL 9x9 EVK

Update the LPDDR2 script to 1.2 rev with delay line settings changed.

File:
  IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc
  https://nxp1.sharepoint.com/teams/123/IMX6ULL/SitePages/Documents.aspx

Changes:
  Update Delay Line Settings based on the delay line calibration results of more boards.
       MMDC_MPRDDLCTL   = 0x40403439
       MMDC_MPWRDLCTL   = 0X4040342D

Test:
  One 9x9 EVK board pass stress memtester.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 2 changed files with 4 additions and 4 deletions Side-by-side Diff

board/freescale/mx6ullevk/imximage_lpddr2.cfg
... ... @@ -89,8 +89,8 @@
89 89 DATA 4 0x021B082C 0xf3333333
90 90 DATA 4 0x021B0830 0xf3333333
91 91 DATA 4 0x021B083C 0x20000000
92   -DATA 4 0x021B0848 0x40403238
93   -DATA 4 0x021B0850 0x4040322C
  92 +DATA 4 0x021B0848 0x40403439
  93 +DATA 4 0x021B0850 0x4040342D
94 94 DATA 4 0x021B08C0 0x00921012
95 95 DATA 4 0x021B08b8 0x00000800
96 96  
board/freescale/mx6ullevk/plugin.S
... ... @@ -173,9 +173,9 @@
173 173 str r1, [r0, #0x830]
174 174 ldr r1, =0x20000000
175 175 str r1, [r0, #0x83C]
176   - ldr r1, =0x40403238
  176 + ldr r1, =0x40403439
177 177 str r1, [r0, #0x848]
178   - ldr r1, =0x4040322C
  178 + ldr r1, =0x4040342D
179 179 str r1, [r0, #0x850]
180 180 ldr r1, =0x00921012
181 181 str r1, [r0, #0x8C0]