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Commit 44ba7a373a46e2816aff0a7aa28166d1dbbe46f0

Authored by Marcel Ziswiler
Committed by Marek Vasut
1 parent a36f11272e
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

pxa: colibri_pxa270: integrate latest validated register settings 

Integrate latest validated register settings from Toradex WinCE BSP
4.2 working accross all module versions from early V1.x, V1.2D, V2.2B
to V2.4A.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>

Showing 1 changed file with 24 additions and 24 deletions Side-by-side Diff

include/configs/colibri_pxa270.h
Diff comments   View file @ 44ba7a3
... ... @@ -163,7 +163,7 @@
163 163 */
164 164 #define CONFIG_SYS_GPSR0_VAL 0x00000000
165 165 #define CONFIG_SYS_GPSR1_VAL 0x00020000
166   -#define CONFIG_SYS_GPSR2_VAL 0x0002C000
  166 +#define CONFIG_SYS_GPSR2_VAL 0x0002c000
167 167 #define CONFIG_SYS_GPSR3_VAL 0x00000000
168 168  
169 169 #define CONFIG_SYS_GPCR0_VAL 0x00000000
170 170  
... ... @@ -171,19 +171,19 @@
171 171 #define CONFIG_SYS_GPCR2_VAL 0x00000000
172 172 #define CONFIG_SYS_GPCR3_VAL 0x00000000
173 173  
174   -#define CONFIG_SYS_GPDR0_VAL 0x08000000
175   -#define CONFIG_SYS_GPDR1_VAL 0x0002A981
176   -#define CONFIG_SYS_GPDR2_VAL 0x0202FC00
177   -#define CONFIG_SYS_GPDR3_VAL 0x00000000
  174 +#define CONFIG_SYS_GPDR0_VAL 0xc8008000
  175 +#define CONFIG_SYS_GPDR1_VAL 0xfc02a981
  176 +#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff
  177 +#define CONFIG_SYS_GPDR3_VAL 0x0061e804
178 178  
179   -#define CONFIG_SYS_GAFR0_L_VAL 0x00100000
180   -#define CONFIG_SYS_GAFR0_U_VAL 0x00C00010
181   -#define CONFIG_SYS_GAFR1_L_VAL 0x999A901A
182   -#define CONFIG_SYS_GAFR1_U_VAL 0xAAA00008
183   -#define CONFIG_SYS_GAFR2_L_VAL 0xAAAAAAAA
184   -#define CONFIG_SYS_GAFR2_U_VAL 0x0109A000
185   -#define CONFIG_SYS_GAFR3_L_VAL 0x54000300
186   -#define CONFIG_SYS_GAFR3_U_VAL 0x00024001
  179 +#define CONFIG_SYS_GAFR0_L_VAL 0x80100000
  180 +#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010
  181 +#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
  182 +#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008
  183 +#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
  184 +#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002
  185 +#define CONFIG_SYS_GAFR3_L_VAL 0x54000310
  186 +#define CONFIG_SYS_GAFR3_U_VAL 0x00005401
187 187  
188 188 #define CONFIG_SYS_PSSR_VAL 0x30
189 189  
190 190  
191 191  
192 192  
... ... @@ -196,24 +196,24 @@
196 196 /*
197 197 * Memory settings
198 198 */
199   -#define CONFIG_SYS_MSC0_VAL 0x000095f2
200   -#define CONFIG_SYS_MSC1_VAL 0x00007ff4
201   -#define CONFIG_SYS_MSC2_VAL 0x00000000
202   -#define CONFIG_SYS_MDCNFG_VAL 0x08000ac9
203   -#define CONFIG_SYS_MDREFR_VAL 0x2013e01e
204   -#define CONFIG_SYS_MDMRS_VAL 0x00320032
205   -#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
  199 +#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2
  200 +#define CONFIG_SYS_MSC1_VAL 0x9ee1f994
  201 +#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1
  202 +#define CONFIG_SYS_MDCNFG_VAL 0x090009c9
  203 +#define CONFIG_SYS_MDREFR_VAL 0x2003a031
  204 +#define CONFIG_SYS_MDMRS_VAL 0x00220022
  205 +#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
206 206 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
207 207  
208 208 /*
209 209 * PCMCIA and CF Interfaces
210 210 */
211   -#define CONFIG_SYS_MECR_VAL 0x00000001
212   -#define CONFIG_SYS_MCMEM0_VAL 0x00014307
  211 +#define CONFIG_SYS_MECR_VAL 0x00000000
  212 +#define CONFIG_SYS_MCMEM0_VAL 0x00028307
213 213 #define CONFIG_SYS_MCMEM1_VAL 0x00014307
214   -#define CONFIG_SYS_MCATT0_VAL 0x0001c787
  214 +#define CONFIG_SYS_MCATT0_VAL 0x00038787
215 215 #define CONFIG_SYS_MCATT1_VAL 0x0001c787
216   -#define CONFIG_SYS_MCIO0_VAL 0x0001430f
  216 +#define CONFIG_SYS_MCIO0_VAL 0x0002830f
217 217 #define CONFIG_SYS_MCIO1_VAL 0x0001430f
218 218  
219 219 #include "pxa-common.h"