Commit 452f67407b20ab6a37c037d0975ea717d2f254e9

Authored by Wolfgang Denk
1 parent 3e0bc4473a
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Adjust configuration of XENIAX board

(chip select and GPIO required for USB operation)

Showing 2 changed files with 6 additions and 3 deletions Side-by-side Diff

... ... @@ -2,6 +2,9 @@
2 2 Changes for U-Boot 1.1.3:
3 3 ======================================================================
4 4  
  5 +* Adjust configuration of XENIAX board
  6 + (chip select and GPIO required for USB operation)
  7 +
5 8 * Fix typos in cpu/85xx/start.S which caused DataTLB exception to be
6 9 routed to the Watchdog handler
7 10 Patch by Eugene Surovegin, 18 Jun 2005
include/configs/xaeniax.h
... ... @@ -236,7 +236,7 @@
236 236 * GP30 == SDATA_OUT is 0
237 237 * GP81 == NSSPCLK is 0
238 238 */
239   -#define CFG_GPCR0_VAL 0x40C31868
  239 +#define CFG_GPCR0_VAL 0x40C31848
240 240 #define CFG_GPCR1_VAL 0x00000000
241 241 #define CFG_GPCR2_VAL 0x00020000
242 242  
243 243  
... ... @@ -455,10 +455,10 @@
455 455 * [14:12] 010 - RRR2: CS deselect to CS time: 2*(2*MemClk) = 40 ns
456 456 * [11:08] 0010 - RDN2: Address to data valid in bursts: (2+1)*MemClk = 30 ns
457 457 * [07:04] 0110 - RDF2: Address for first access: (6+1)*MemClk = 70 ns
458   - * [03] 0 - 32 Bit bus width
  458 + * [03] 1 - 16 Bit bus width
459 459 * [02:00] 100 - variable latency I/O
460 460 */
461   -#define CFG_MSC1_VAL 0x1224A264
  461 +#define CFG_MSC1_VAL 0x1224A26C
462 462  
463 463 /* This is the configuration for nCS4/5 -> LAN
464 464 * configuration for nCS5: