Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit 4666521d19df4421be1b3c1042ac7ecfb351f884

Authored by Marek Vasut
Committed by marex
1 parent 9cf09c799a
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

ARM: rmobile: Implement PMIC reset on V2H Blanche 

Add code to reset the board through PMIC, by writing the required
PMIC registers in the CPU reset handler.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Showing 1 changed file with 20 additions and 0 deletions Side-by-side Diff

board/renesas/blanche/blanche.c
Diff comments   View file @ 4666521
... ... @@ -20,6 +20,7 @@
20 20 #include <dm.h>
21 21 #include <dm/platform_data/serial_sh.h>
22 22 #include <env.h>
  23 +#include <hang.h>
23 24 #include <i2c.h>
24 25 #include <linux/errno.h>
25 26 #include <malloc.h>
... ... @@ -355,5 +356,24 @@
355 356  
356 357 void reset_cpu(ulong addr)
357 358 {
  359 + struct udevice *dev;
  360 + const u8 pmic_bus = 6;
  361 + const u8 pmic_addr = 0x58;
  362 + u8 data;
  363 + int ret;
  364 +
  365 + ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
  366 + if (ret)
  367 + hang();
  368 +
  369 + ret = dm_i2c_read(dev, 0x13, &data, 1);
  370 + if (ret)
  371 + hang();
  372 +
  373 + data |= BIT(1);
  374 +
  375 + ret = dm_i2c_write(dev, 0x13, &data, 1);
  376 + if (ret)
  377 + hang();
358 378 }