Commit
46a3aeea73c13ab04ebf7a8739afb87ac5da94a3
Exists in
master
and in
55 other branches
8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x
83xx: nand support for MPC837XRDB boards
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Showing
1 changed file
with
19 additions
and
0 deletions
Side-by-side Diff
... |
... |
@@ -275,6 +275,25 @@ |
275
|
275 |
#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
276
|
276 |
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
277
|
277 |
|
|
278 |
+/* |
|
279 |
+ * NAND Flash on the Local Bus |
|
280 |
+ */ |
|
281 |
+#define CFG_NAND_BASE 0xE0600000 /* 0xE0600000 */ |
|
282 |
+#define CFG_BR1_PRELIM (CFG_NAND_BASE | \ |
|
283 |
+ (2 << BR_DECC_SHIFT) | /* Use HW ECC */ \ |
|
284 |
+ BR_PS_8 | /* Port Size = 8 bit */ \ |
|
285 |
+ BR_MS_FCM | /* MSEL = FCM */ \ |
|
286 |
+ BR_V) /* valid */ |
|
287 |
+#define CFG_OR1_PRELIM (0xFFFF8000 | /* length 32K */ \ |
|
288 |
+ OR_FCM_CSCT | \ |
|
289 |
+ OR_FCM_CST | \ |
|
290 |
+ OR_FCM_CHT | \ |
|
291 |
+ OR_FCM_SCY_1 | \ |
|
292 |
+ OR_FCM_TRLX | \ |
|
293 |
+ OR_FCM_EHTR) |
|
294 |
+#define CFG_LBLAWBAR1_PRELIM CFG_NAND_BASE |
|
295 |
+#define CFG_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ |
|
296 |
+ |
278
|
297 |
/* Vitesse 7385 */ |
279
|
298 |
|
280
|
299 |
#define CFG_VSC7385_BASE 0xF0000000 |