Eric Lee / smarc-uboot

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Commit 47cd00fa707af9de76408b69d3e911717dbbfab1

Authored by wdenk
1 parent db2f721ffc
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

* Patches by Robert Schwebel, 06 Mar 2003: 

- fix bug in BOOTP code (must use NetCopyIP)
  - update of CSB226 port
  - clear BSS segment on XScale
  - added support for i2c_init_board() function
  - update to the Innokom plattform

* Extend support for redundand environments for configurations where
  environment size < sector size

Showing 30 changed files with 723 additions and 268 deletions Side-by-side Diff

... ... @@ -2,6 +2,16 @@
2 2 Changes since U-Boot 0.2.2:
3 3 ======================================================================
4 4  
  5 +* Patches by Robert Schwebel, 06 Mar 2003:
  6 + - fix bug in BOOTP code (must use NetCopyIP)
  7 + - update of CSB226 port
  8 + - clear BSS segment on XScale
  9 + - added support for i2c_init_board() function
  10 + - update to the Innokom plattform
  11 +
  12 +* Extend support for redundand environments for configurations where
  13 + environment size < sector size
  14 +
5 15 * Patch by Rune Torgersen, 13 Feb 2003:
6 16 Add support for Motorola MPC8266ADS board
7 17  
... ... @@ -897,6 +897,17 @@
897 897 controls the rate of data transfer. The data rate thus
898 898 is 1 / (I2C_DELAY * 4).
899 899  
  900 + CFG_I2C_INIT_BOARD
  901 +
  902 + When a board is reset during an i2c bus transfer
  903 + chips might think that the current transfer is still
  904 + in progress. On some boards it is possible to access
  905 + the i2c SCLK line directly, either by using the
  906 + processor pin as a GPIO or by having a second pin
  907 + connected to the bus. If this option is defined a
  908 + custom i2c_init_board() routine in boards/xxx/board.c
  909 + is run early in the boot sequence.
  910 +
900 911 - SPI Support: CONFIG_SPI
901 912  
902 913 Enables SPI driver (so far only tested with
... ... @@ -1043,7 +1054,7 @@
1043 1054  
1044 1055 If CONFIG_ENV_OVERWRITE is #defined in your config
1045 1056 file, the write protection for vendor parameters is
1046   - completely disabled. Anybody can change or delte
  1057 + completely disabled. Anybody can change or delete
1047 1058 these parameters.
1048 1059  
1049 1060 Alternatively, if you #define _both_ CONFIG_ETHADDR
board/cradle/u-boot.lds
Diff comments   View file @ 47cd00f
... ... @@ -47,7 +47,9 @@
47 47 armboot_end_data = .;
48 48  
49 49 . = ALIGN(4);
  50 + bss_start = .;
50 51 .bss : { *(.bss) }
  52 + bss_end = .;
51 53  
52 54 armboot_end = .;
53 55 }
board/csb226/csb226.c
Diff comments   View file @ 47cd00f
... ... @@ -32,9 +32,29 @@
32 32 # define SHOW_BOOT_PROGRESS(arg)
33 33 #endif
34 34  
35   -/*
36   - * Miscelaneous platform dependent initialisations
  35 +/**
  36 + * misc_init_r: - misc initialisation routines
37 37 */
  38 +
  39 +int misc_init_r(void)
  40 +{
  41 + uchar *str;
  42 +
  43 + /* determine if the software update key is pressed during startup */
  44 +#if 0
  45 + /* not ported yet... */
  46 + if (GPLR0 & 0x00000800) {
  47 + printf("using bootcmd_normal (sw-update button not pressed)\n");
  48 + str = getenv("bootcmd_normal");
  49 + } else {
  50 + printf("using bootcmd_update (sw-update button pressed)\n");
  51 + str = getenv("bootcmd_update");
  52 + }
  53 +
  54 + setenv("bootcmd",str);
  55 +#endif
  56 + return 0;
  57 +}
38 58  
39 59  
40 60 /**
board/csb226/flash.c
Diff comments   View file @ 47cd00f
... ... @@ -45,44 +45,44 @@
45 45  
46 46 ulong flash_init(void)
47 47 {
48   - int i, j;
49   - ulong size = 0;
  48 + int i, j;
  49 + ulong size = 0;
50 50  
51 51 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
52   - ulong flashbase = 0;
53   - flash_info[i].flash_id =
54   - (INTEL_MANUFACT & FLASH_VENDMASK) |
55   - (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
56   - flash_info[i].size = FLASH_BANK_SIZE;
57   - flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
58   - memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
  52 + ulong flashbase = 0;
  53 + flash_info[i].flash_id =
  54 + (INTEL_MANUFACT & FLASH_VENDMASK) |
  55 + (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
  56 + flash_info[i].size = FLASH_BANK_SIZE;
  57 + flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
  58 + memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
59 59  
60 60 switch (i) {
61   - case 0:
62   - flashbase = PHYS_FLASH_1;
63   - break;
64   - default:
65   - panic("configured to many flash banks!\n");
66   - break;
67   - }
  61 + case 0:
  62 + flashbase = PHYS_FLASH_1;
  63 + break;
  64 + default:
  65 + panic("configured to many flash banks!\n");
  66 + break;
  67 + }
68 68 for (j = 0; j < flash_info[i].sector_count; j++) {
69   - flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
  69 + flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
  70 + }
  71 + size += flash_info[i].size;
70 72 }
71   - size += flash_info[i].size;
72   - }
73 73  
74 74 /* Protect monitor and environment sectors */
75   - flash_protect(FLAG_PROTECT_SET,
76   - CFG_FLASH_BASE,
77   - CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
78   - &flash_info[0]);
  75 + flash_protect(FLAG_PROTECT_SET,
  76 + CFG_FLASH_BASE,
  77 + CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
  78 + &flash_info[0]);
79 79  
80   - flash_protect(FLAG_PROTECT_SET,
81   - CFG_ENV_ADDR,
82   - CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
83   - &flash_info[0]);
  80 + flash_protect(FLAG_PROTECT_SET,
  81 + CFG_ENV_ADDR,
  82 + CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
  83 + &flash_info[0]);
84 84  
85   - return size;
  85 + return size;
86 86 }
87 87  
88 88  
89 89  
90 90  
91 91  
92 92  
93 93  
94 94  
... ... @@ -94,43 +94,43 @@
94 94  
95 95 void flash_print_info (flash_info_t *info)
96 96 {
97   - int i, j;
  97 + int i, j;
98 98  
99 99 for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
100 100  
101 101 switch (info->flash_id & FLASH_VENDMASK) {
102 102  
103   - case (INTEL_MANUFACT & FLASH_VENDMASK):
104   - printf("Intel: ");
105   - break;
106   - default:
107   - printf("Unknown Vendor ");
108   - break;
109   - }
  103 + case (INTEL_MANUFACT & FLASH_VENDMASK):
  104 + printf("Intel: ");
  105 + break;
  106 + default:
  107 + printf("Unknown Vendor ");
  108 + break;
  109 + }
110 110  
111 111 switch (info->flash_id & FLASH_TYPEMASK) {
112 112  
113   - case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
114   - printf("28F128J3 (128Mbit)\n");
115   - break;
116   - default:
117   - printf("Unknown Chip Type\n");
  113 + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
  114 + printf("28F128J3 (128Mbit)\n");
  115 + break;
  116 + default:
  117 + printf("Unknown Chip Type\n");
118 118 return;
119   - }
  119 + }
120 120  
121   - printf(" Size: %ld MB in %d Sectors\n",
122   - info->size >> 20, info->sector_count);
  121 + printf(" Size: %ld MB in %d Sectors\n",
  122 + info->size >> 20, info->sector_count);
123 123  
124   - printf(" Sector Start Addresses:");
  124 + printf(" Sector Start Addresses:");
125 125 for (i = 0; i < info->sector_count; i++) {
126 126 if ((i % 5) == 0) printf ("\n ");
127 127  
128   - printf (" %08lX%s", info->start[i],
129   - info->protect[i] ? " (RO)" : " ");
130   - }
131   - printf ("\n");
132   - info++;
133   - }
  128 + printf (" %08lX%s", info->start[i],
  129 + info->protect[i] ? " (RO)" : " ");
  130 + }
  131 + printf ("\n");
  132 + info++;
  133 + }
134 134 }
135 135  
136 136  
137 137  
138 138  
139 139  
140 140  
141 141  
142 142  
143 143  
144 144  
145 145  
... ... @@ -139,46 +139,47 @@
139 139 *
140 140 */
141 141  
142   -int flash_erase (flash_info_t *info, int s_first, int s_last)
  142 +int flash_erase(flash_info_t *info, int s_first, int s_last)
143 143 {
144   - int flag, prot, sect;
145   - int rc = ERR_OK;
  144 + int flag, prot, sect;
  145 + int rc = ERR_OK;
146 146  
147   - if (info->flash_id == FLASH_UNKNOWN)
148   - return ERR_UNKNOWN_FLASH_TYPE;
  147 + if (info->flash_id == FLASH_UNKNOWN)
  148 + return ERR_UNKNOWN_FLASH_TYPE;
149 149  
150   - if ((s_first < 0) || (s_first > s_last)) {
151   - return ERR_INVAL;
152   - }
  150 + if ((s_first < 0) || (s_first > s_last)) {
  151 + return ERR_INVAL;
  152 + }
153 153  
154 154 if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
155   - return ERR_UNKNOWN_FLASH_VENDOR;
156   -
157   - prot = 0;
158   - for (sect=s_first; sect<=s_last; ++sect) {
  155 + return ERR_UNKNOWN_FLASH_VENDOR;
  156 +
  157 + prot = 0;
  158 + for (sect=s_first; sect<=s_last; ++sect) {
159 159 if (info->protect[sect]) prot++;
160 160 }
161 161  
162 162 if (prot) return ERR_PROTECTED;
163 163  
164   - /*
165   - * Disable interrupts which might cause a timeout
166   - * here. Remember that our exception vectors are
167   - * at address 0 in the flash, and we don't want a
168   - * (ticker) exception to happen while the flash
169   - * chip is in programming mode.
170   - */
171   - flag = disable_interrupts();
  164 + /*
  165 + * Disable interrupts which might cause a timeout
  166 + * here. Remember that our exception vectors are
  167 + * at address 0 in the flash, and we don't want a
  168 + * (ticker) exception to happen while the flash
  169 + * chip is in programming mode.
  170 + */
172 171  
173   - /* Start erase on unprotected sectors */
174   - for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
  172 + flag = disable_interrupts();
175 173  
176   - printf("Erasing sector %2d ... ", sect);
  174 + /* Start erase on unprotected sectors */
  175 + for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
177 176  
178   - /* arm simple, non interrupt dependent timer */
179   - reset_timer_masked();
  177 + printf("Erasing sector %2d ... ", sect);
180 178  
181   - if (info->protect[sect] == 0) { /* not protected */
  179 + /* arm simple, non interrupt dependent timer */
  180 + reset_timer_masked();
  181 +
  182 + if (info->protect[sect] == 0) { /* not protected */
182 183 u32 * volatile addr = (u32 * volatile)(info->start[sect]);
183 184  
184 185 /* erase sector: */
185 186  
186 187  
187 188  
188 189  
189 190  
190 191  
... ... @@ -190,32 +191,32 @@
190 191 *addr = 0x00D000D0; /* erase confirm */
191 192  
192 193 while ((*addr & 0x00800080) != 0x00800080) {
193   - if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
  194 + if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
194 195 *addr = 0x00B000B0; /* suspend erase*/
195 196 *addr = 0x00FF00FF; /* read mode */
196   - rc = ERR_TIMOUT;
197   - goto outahere;
198   - }
199   - }
  197 + rc = ERR_TIMOUT;
  198 + goto outahere;
  199 + }
  200 + }
200 201  
201 202 *addr = 0x00500050; /* clear status register cmd. */
202 203 *addr = 0x00FF00FF; /* resest to read mode */
203 204  
204   - }
  205 + }
205 206  
206   - printf("ok.\n");
207   - }
  207 + printf("ok.\n");
  208 + }
208 209  
209 210 if (ctrlc()) printf("User Interrupt!\n");
210 211  
211   -outahere:
  212 + outahere:
212 213  
213   - /* allow flash to settle - wait 10 ms */
214   - udelay_masked(10000);
  214 + /* allow flash to settle - wait 10 ms */
  215 + udelay_masked(10000);
215 216  
216 217 if (flag) enable_interrupts();
217 218  
218   - return rc;
  219 + return rc;
219 220 }
220 221  
221 222  
222 223  
223 224  
224 225  
225 226  
226 227  
227 228  
228 229  
229 230  
230 231  
231 232  
232 233  
233 234  
... ... @@ -230,71 +231,71 @@
230 231  
231 232 static int write_word (flash_info_t *info, ulong dest, ushort data)
232 233 {
233   - ushort *addr = (ushort *)dest, val;
234   - int rc = ERR_OK;
235   - int flag;
  234 + u32 * volatile addr = (u32 * volatile)dest, val;
  235 + int rc = ERR_OK;
  236 + int flag;
236 237  
237 238 /* Check if Flash is (sufficiently) erased */
238 239 if ((*addr & data) != data) return ERR_NOT_ERASED;
239 240  
240   - /*
241   - * Disable interrupts which might cause a timeout
242   - * here. Remember that our exception vectors are
243   - * at address 0 in the flash, and we don't want a
244   - * (ticker) exception to happen while the flash
245   - * chip is in programming mode.
246   - */
247   - flag = disable_interrupts();
  241 + /*
  242 + * Disable interrupts which might cause a timeout
  243 + * here. Remember that our exception vectors are
  244 + * at address 0 in the flash, and we don't want a
  245 + * (ticker) exception to happen while the flash
  246 + * chip is in programming mode.
  247 + */
  248 + flag = disable_interrupts();
248 249  
249   - /* clear status register command */
250   - *addr = 0x50;
  250 + /* clear status register command */
  251 + *addr = 0x50;
251 252  
252   - /* program set-up command */
253   - *addr = 0x40;
  253 + /* program set-up command */
  254 + *addr = 0x40;
254 255  
255   - /* latch address/data */
256   - *addr = data;
  256 + /* latch address/data */
  257 + *addr = data;
257 258  
258   - /* arm simple, non interrupt dependent timer */
259   - reset_timer_masked();
  259 + /* arm simple, non interrupt dependent timer */
  260 + reset_timer_masked();
260 261  
261   - /* wait while polling the status register */
  262 + /* wait while polling the status register */
262 263 while(((val = *addr) & 0x80) != 0x80) {
263   - if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
264   - rc = ERR_TIMOUT;
  264 + if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
  265 + rc = ERR_TIMOUT;
265 266 *addr = 0xB0; /* suspend program command */
266   - goto outahere;
  267 + goto outahere;
  268 + }
267 269 }
268   - }
269 270  
270   - if(val & 0x1A) { /* check for error */
271   - printf("\nFlash write error %02x at address %08lx\n",
272   - (int)val, (unsigned long)dest);
273   - if(val & (1<<3)) {
274   - printf("Voltage range error.\n");
275   - rc = ERR_PROG_ERROR;
276   - goto outahere;
277   - }
278   - if(val & (1<<1)) {
279   - printf("Device protect error.\n");
280   - rc = ERR_PROTECTED;
281   - goto outahere;
282   - }
283   - if(val & (1<<4)) {
284   - printf("Programming error.\n");
285   - rc = ERR_PROG_ERROR;
286   - goto outahere;
287   - }
288   - rc = ERR_PROG_ERROR;
289   - goto outahere;
290   - }
  271 + if(val & 0x1A) { /* check for error */
  272 + printf("\nFlash write error %02x at address %08lx\n",
  273 + (int)val, (unsigned long)dest);
  274 + if(val & (1<<3)) {
  275 + printf("Voltage range error.\n");
  276 + rc = ERR_PROG_ERROR;
  277 + goto outahere;
  278 + }
  279 + if(val & (1<<1)) {
  280 + printf("Device protect error.\n");
  281 + rc = ERR_PROTECTED;
  282 + goto outahere;
  283 + }
  284 + if(val & (1<<4)) {
  285 + printf("Programming error.\n");
  286 + rc = ERR_PROG_ERROR;
  287 + goto outahere;
  288 + }
  289 + rc = ERR_PROG_ERROR;
  290 + goto outahere;
  291 + }
291 292  
292   -outahere:
  293 + outahere:
293 294  
294 295 *addr = 0xFF; /* read array command */
295 296 if (flag) enable_interrupts();
296 297  
297   - return rc;
  298 + return rc;
298 299 }
299 300  
300 301  
301 302  
302 303  
303 304  
304 305  
305 306  
306 307  
307 308  
308 309  
... ... @@ -311,64 +312,64 @@
311 312  
312 313 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
313 314 {
314   - ulong cp, wp;
315   - ushort data;
316   - int l;
317   - int i, rc;
  315 + ulong cp, wp;
  316 + ushort data;
  317 + int l;
  318 + int i, rc;
318 319  
319   - wp = (addr & ~1); /* get lower word aligned address */
  320 + wp = (addr & ~1); /* get lower word aligned address */
320 321  
321   - /*
322   - * handle unaligned start bytes
323   - */
324   - if ((l = addr - wp) != 0) {
325   - data = 0;
326   - for (i=0, cp=wp; i<l; ++i, ++cp) {
327   - data = (data >> 8) | (*(uchar *)cp << 8);
328   - }
329   - for (; i<2 && cnt>0; ++i) {
330   - data = (data >> 8) | (*src++ << 8);
331   - --cnt;
332   - ++cp;
333   - }
334   - for (; cnt==0 && i<2; ++i, ++cp) {
335   - data = (data >> 8) | (*(uchar *)cp << 8);
336   - }
  322 + /*
  323 + * handle unaligned start bytes
  324 + */
  325 + if ((l = addr - wp) != 0) {
  326 + data = 0;
  327 + for (i=0, cp=wp; i<l; ++i, ++cp) {
  328 + data = (data >> 8) | (*(uchar *)cp << 8);
  329 + }
  330 + for (; i<2 && cnt>0; ++i) {
  331 + data = (data >> 8) | (*src++ << 8);
  332 + --cnt;
  333 + ++cp;
  334 + }
  335 + for (; cnt==0 && i<2; ++i, ++cp) {
  336 + data = (data >> 8) | (*(uchar *)cp << 8);
  337 + }
337 338  
338   - if ((rc = write_word(info, wp, data)) != 0) {
339   - return (rc);
  339 + if ((rc = write_word(info, wp, data)) != 0) {
  340 + return (rc);
  341 + }
  342 + wp += 2;
340 343 }
341   - wp += 2;
342   - }
343 344  
344   - /*
345   - * handle word aligned part
346   - */
347   - while (cnt >= 2) {
348   - /* data = *((vushort*)src); */
349   - data = *((ushort*)src);
350   - if ((rc = write_word(info, wp, data)) != 0) {
351   - return (rc);
  345 + /*
  346 + * handle word aligned part
  347 + */
  348 + while (cnt >= 2) {
  349 + /* data = *((vushort*)src); */
  350 + data = *((ushort*)src);
  351 + if ((rc = write_word(info, wp, data)) != 0) {
  352 + return (rc);
  353 + }
  354 + src += 2;
  355 + wp += 2;
  356 + cnt -= 2;
352 357 }
353   - src += 2;
354   - wp += 2;
355   - cnt -= 2;
356   - }
357 358  
358 359 if (cnt == 0) return ERR_OK;
359 360  
360   - /*
361   - * handle unaligned tail bytes
362   - */
363   - data = 0;
364   - for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
365   - data = (data >> 8) | (*src++ << 8);
366   - --cnt;
367   - }
368   - for (; i<2; ++i, ++cp) {
369   - data = (data >> 8) | (*(uchar *)cp << 8);
370   - }
  361 + /*
  362 + * handle unaligned tail bytes
  363 + */
  364 + data = 0;
  365 + for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
  366 + data = (data >> 8) | (*src++ << 8);
  367 + --cnt;
  368 + }
  369 + for (; i<2; ++i, ++cp) {
  370 + data = (data >> 8) | (*(uchar *)cp << 8);
  371 + }
371 372  
372   - return write_word(info, wp, data);
  373 + return write_word(info, wp, data);
373 374 }
board/csb226/memsetup.S
Diff comments   View file @ 47cd00f
... ... @@ -313,17 +313,23 @@
313 313 /* documented in SDRAM data sheets. The address(es) used */
314 314 /* for this purpose must not be cacheable. */
315 315  
316   - ldr r3, =CFG_DRAM_BASE
317   - str r2, [r3]
318   - str r2, [r3]
319   - str r2, [r3]
320   - str r2, [r3]
321   - str r2, [r3]
322   - str r2, [r3]
323   - str r2, [r3]
324   - str r2, [r3]
  316 + /* There should 9 writes, since the first write doesn't */
  317 + /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
  318 + /* PXA210 Processors Specification Update, */
  319 + /* Jan 2003, Errata #116, page 30. */
325 320  
326 321  
  322 + ldr r3, =CFG_DRAM_BASE
  323 + str r2, [r3]
  324 + str r2, [r3]
  325 + str r2, [r3]
  326 + str r2, [r3]
  327 + str r2, [r3]
  328 + str r2, [r3]
  329 + str r2, [r3]
  330 + str r2, [r3]
  331 + str r2, [r3]
  332 +
327 333 /* Step 4g: Write MDCNFG with enable bits asserted */
328 334 /* (MDCNFG:DEx set to 1). */
329 335  
... ... @@ -339,7 +345,6 @@
339 345  
340 346 /* We are finished with Intel's memory controller initialisation */
341 347  
342   -
343 348 /* ---------------------------------------------------------------- */
344 349 /* Disable (mask) all interrupts at interrupt controller */
345 350 /* ---------------------------------------------------------------- */
346 351  
... ... @@ -378,10 +383,11 @@
378 383 str r2, [r1]
379 384  
380 385 /* enable the 32Khz oscillator for RTC and PowerManager */
  386 +/*
381 387 ldr r1, =OSCC
382 388 mov r2, #OSCC_OON
383 389 str r2, [r1]
384   -
  390 +*/
385 391 /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
386 392 /* has settled. */
387 393 60:
... ... @@ -404,8 +410,7 @@
404 410  
405 411 /* FIXME */
406 412  
407   -#define NODEBUG
408   -#ifdef NODEBUG
  413 +#ifndef DEBUG
409 414 /*Disable software and data breakpoints */
410 415 mov r0,#0
411 416 mcr p15,0,r0,c14,c8,0 /* ibcr0 */
... ... @@ -415,7 +420,6 @@
415 420 /*Enable all debug functionality */
416 421 mov r0,#0x80000000
417 422 mcr p14,0,r0,c10,c0,0 /* dcsr */
418   -
419 423 #endif
420 424  
421 425 /* ---------------------------------------------------------------- */
board/csb226/u-boot.lds
Diff comments   View file @ 47cd00f
... ... @@ -47,7 +47,9 @@
47 47 armboot_end_data = .;
48 48  
49 49 . = ALIGN(4);
  50 + bss_start = .;
50 51 .bss : { *(.bss) }
  52 + bss_end = .;
51 53  
52 54 armboot_end = .;
53 55 }
board/innokom/flash.c
Diff comments   View file @ 47cd00f
... ... @@ -31,13 +31,229 @@
31 31 #include <common.h>
32 32 #include <asm/arch/pxa-regs.h>
33 33  
34   -#define FLASH_BANK_SIZE 0x02000000
35   -#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
  34 +#if defined CFG_JFFS_CUSTOM_PART
  35 +#include <jffs2/jffs2.h>
  36 +#endif
36 37  
  38 +/* Debugging macros ------------------------------------------------------ */
  39 +
  40 +#undef FLASH_DEBUG
  41 +//#define FLASH_DEBUG 1
  42 +
  43 +/* Some debug macros */
  44 +#if (FLASH_DEBUG > 2 )
  45 +#define PRINTK3(args...) printf(args)
  46 +#else
  47 +#define PRINTK3(args...)
  48 +#endif
  49 +
  50 +#if FLASH_DEBUG > 1
  51 +#define PRINTK2(args...) printf(args)
  52 +#else
  53 +#define PRINTK2(args...)
  54 +#endif
  55 +
  56 +#ifdef FLASH_DEBUG
  57 +#define PRINTK(args...) printf(args)
  58 +#else
  59 +#define PRINTK(args...)
  60 +#endif
  61 +
  62 +/* ------------------------------------------------------------------------ */
  63 +
  64 +/* Development system: we have only 16 MB Flash */
  65 +#ifdef CONFIG_MTD_INNOKOM_16MB
  66 +#define FLASH_BANK_SIZE 0x01000000 /* 16 MB (during development) */
  67 +#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
  68 +#endif
  69 +
  70 +/* Production system: we have 64 MB Flash */
  71 +#ifdef CONFIG_MTD_INNOKOM_64MB
  72 +#define FLASH_BANK_SIZE 0x04000000 /* 64 MB */
  73 +#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
  74 +#endif
  75 +
37 76 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
38 77  
39 78  
  79 +#if defined CFG_JFFS_CUSTOM_PART
  80 +
40 81 /**
  82 + * jffs2_part_info - get information about a JFFS2 partition
  83 + *
  84 + * @part_num: number of the partition you want to get info about
  85 + * @return: struct part_info* in case of success, 0 if failure
  86 + */
  87 +
  88 +static struct part_info part;
  89 +
  90 +#ifdef CONFIG_MTD_INNOKOM_16MB
  91 +#ifdef CONFIG_MTD_INNOKOM_64MB
  92 +#error Please define only one CONFIG_MTD_INNOKOM_XXMB option.
  93 +#endif
  94 +struct part_info* jffs2_part_info(int part_num) {
  95 +
  96 + PRINTK2("jffs2_part_info: part_num=%i\n",part_num);
  97 +
  98 + /* u-boot partition */
  99 + if(part_num==0){
  100 + if(part.usr_priv==(void*)1) return &part;
  101 +
  102 + memset(&part, 0, sizeof(part));
  103 +
  104 + part.offset=(char*)0x00000000;
  105 + part.size=256*1024;
  106 +
  107 + /* Mark the struct as ready */
  108 + part.usr_priv=(void*)1;
  109 +
  110 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  111 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  112 + return &part;
  113 + }
  114 +
  115 + /* primary OS+firmware partition */
  116 + if(part_num==1){
  117 + if(part.usr_priv==(void*)1) return &part;
  118 +
  119 + memset(&part, 0, sizeof(part));
  120 +
  121 + part.offset=(char*)0x00040000;
  122 + part.size=768*1024;
  123 +
  124 + /* Mark the struct as ready */
  125 + part.usr_priv=(void*)1;
  126 +
  127 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  128 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  129 + return &part;
  130 + }
  131 +
  132 + /* secondary OS+firmware partition */
  133 + if(part_num==2){
  134 + if(part.usr_priv==(void*)1) return &part;
  135 +
  136 + memset(&part, 0, sizeof(part));
  137 +
  138 + part.offset=(char*)0x00100000;
  139 + part.size=8*1024*1024;
  140 +
  141 + /* Mark the struct as ready */
  142 + part.usr_priv=(void*)1;
  143 +
  144 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  145 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  146 + return &part;
  147 + }
  148 +
  149 + /* data partition */
  150 + if(part_num==3){
  151 + if(part.usr_priv==(void*)1) return &part;
  152 +
  153 + memset(&part, 0, sizeof(part));
  154 +
  155 + part.offset=(char*)0x00900000;
  156 + part.size=7*1024*1024;
  157 +
  158 + /* Mark the struct as ready */
  159 + part.usr_priv=(void*)1;
  160 +
  161 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  162 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  163 +
  164 + return &part;
  165 + }
  166 +
  167 + PRINTK("jffs2_part_info: end of partition table\n");
  168 + return 0;
  169 +}
  170 +#endif /* CONFIG_MTD_INNOKOM_16MB */
  171 +
  172 +#ifdef CONFIG_MTD_INNOKOM_64MB
  173 +#ifdef CONFIG_MTD_INNOKOM_16MB
  174 +#error Please define only one CONFIG_MTD_INNOKOM_XXMB option.
  175 +#endif
  176 +struct part_info* jffs2_part_info(int part_num) {
  177 +
  178 + PRINTK2("jffs2_part_info: part_num=%i\n",part_num);
  179 +
  180 + /* u-boot partition */
  181 + if(part_num==0){
  182 + if(part.usr_priv==(void*)1) return &part;
  183 +
  184 + memset(&part, 0, sizeof(part));
  185 +
  186 + part.offset=(char*)0x00000000;
  187 + part.size=256*1024;
  188 +
  189 + /* Mark the struct as ready */
  190 + part.usr_priv=(void*)1;
  191 +
  192 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  193 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  194 + return &part;
  195 + }
  196 +
  197 + /* primary OS+firmware partition */
  198 + if(part_num==1){
  199 + if(part.usr_priv==(void*)1) return &part;
  200 +
  201 + memset(&part, 0, sizeof(part));
  202 +
  203 + part.offset=(char*)0x00040000;
  204 + part.size=16*1024*1024-128*1024;
  205 +
  206 + /* Mark the struct as ready */
  207 + part.usr_priv=(void*)1;
  208 +
  209 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  210 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  211 + return &part;
  212 + }
  213 +
  214 + /* secondary OS+firmware partition */
  215 + if(part_num==2){
  216 + if(part.usr_priv==(void*)1) return &part;
  217 +
  218 + memset(&part, 0, sizeof(part));
  219 +
  220 + part.offset=(char*)0x01020000;
  221 + part.size=16*1024*1024-128*1024;
  222 +
  223 + /* Mark the struct as ready */
  224 + part.usr_priv=(void*)1;
  225 +
  226 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  227 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  228 + return &part;
  229 + }
  230 +
  231 + /* data partition */
  232 + if(part_num==3){
  233 + if(part.usr_priv==(void*)1) return &part;
  234 +
  235 + memset(&part, 0, sizeof(part));
  236 +
  237 + part.offset=(char*)0x02000000;
  238 + part.size=32*1024*1024;
  239 +
  240 + /* Mark the struct as ready */
  241 + part.usr_priv=(void*)1;
  242 +
  243 + PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
  244 + PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
  245 +
  246 + return &part;
  247 + }
  248 +
  249 + PRINTK("jffs2_part_info: end of partition table\n");
  250 + return 0;
  251 +}
  252 +#endif /* CONFIG_MTD_INNOKOM_64MB */
  253 +#endif /* defined CFG_JFFS_CUSTOM_PART */
  254 +
  255 +
  256 +/**
41 257 * flash_init: - initialize data structures for flash chips
42 258 *
43 259 * @return: size of the flash
44 260  
... ... @@ -71,10 +287,10 @@
71 287 size += flash_info[i].size;
72 288 }
73 289  
74   - /* Protect monitor and environment sectors */
  290 + /* Protect u-boot sectors */
75 291 flash_protect(FLAG_PROTECT_SET,
76 292 CFG_FLASH_BASE,
77   - CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
  293 + CFG_FLASH_BASE + (256*1024) - 1,
78 294 &flash_info[0]);
79 295  
80 296 #ifdef CFG_ENV_IS_IN_FLASH
81 297  
82 298  
83 299  
84 300  
85 301  
86 302  
... ... @@ -178,32 +394,38 @@
178 394  
179 395 printf("Erasing sector %2d ... ", sect);
180 396  
  397 + PRINTK("\n");
  398 +
181 399 /* arm simple, non interrupt dependent timer */
182 400 reset_timer_masked();
183 401  
184 402 if (info->protect[sect] == 0) { /* not protected */
185   - u32 * volatile addr = (u32 * volatile)(info->start[sect]);
  403 + u16 * volatile addr = (u16 * volatile)(info->start[sect]);
186 404  
187   - /* erase sector: */
188   - /* The strata flashs are aligned side by side on */
189   - /* the data bus, so we have to write the commands */
190   - /* to both chips here: */
  405 + PRINTK("unlocking sector\n");
  406 + *addr = 0x0060;
  407 + *addr = 0x00d0;
  408 + *addr = 0x00ff;
191 409  
192   - *addr = 0x00200020; /* erase setup */
193   - *addr = 0x00D000D0; /* erase confirm */
  410 + PRINTK("erasing sector\n");
  411 + *addr = 0x0020;
  412 + PRINTK("confirming erase\n");
  413 + *addr = 0x00D0;
194 414  
195   - while ((*addr & 0x00800080) != 0x00800080) {
  415 + while ((*addr & 0x0080) != 0x0080) {
  416 + PRINTK(".");
196 417 if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
197   - *addr = 0x00B000B0; /* suspend erase*/
198   - *addr = 0x00FF00FF; /* read mode */
  418 + *addr = 0x00B0; /* suspend erase*/
  419 + *addr = 0x00FF; /* read mode */
199 420 rc = ERR_TIMOUT;
200 421 goto outahere;
201 422 }
202 423 }
203 424  
204   - *addr = 0x00500050; /* clear status register cmd. */
205   - *addr = 0x00FF00FF; /* resest to read mode */
206   -
  425 + PRINTK("clearing status register\n");
  426 + *addr = 0x0050;
  427 + PRINTK("resetting to read mode");
  428 + *addr = 0x00FF;
207 429 }
208 430  
209 431 printf("ok.\n");
... ... @@ -233,7 +455,7 @@
233 455  
234 456 static int write_word (flash_info_t *info, ulong dest, ushort data)
235 457 {
236   - ushort *addr = (ushort *)dest, val;
  458 + volatile u16 *addr = (u16 *)dest, val;
237 459 int rc = ERR_OK;
238 460 int flag;
239 461  
board/innokom/innokom.c
Diff comments   View file @ 47cd00f
... ... @@ -25,6 +25,7 @@
25 25  
26 26 #include <common.h>
27 27 #include <asm/arch/pxa-regs.h>
  28 +#include <asm/mach-types.h>
28 29  
29 30 #ifdef CONFIG_SHOW_BOOT_PROGRESS
30 31 # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
31 32  
32 33  
33 34  
34 35  
... ... @@ -32,12 +33,55 @@
32 33 # define SHOW_BOOT_PROGRESS(arg)
33 34 #endif
34 35  
35   -/*
36   - * Miscelaneous platform dependent initialisations
  36 +/**
  37 + * i2c_init_board - reset i2c bus. When the board is powercycled during a
  38 + * bus transfer it might hang; for details see doc/I2C_Edge_Conditions.
  39 + * The Innokom board has GPIO70 connected to SCLK which can be toggled
  40 + * until all chips think that their current cycles are finished.
37 41 */
  42 +int i2c_init_board(void)
  43 +{
  44 + int i;
38 45  
  46 + /* set gpio pin to output */
  47 + GPDR(70) |= GPIO_bit(70);
  48 + for (i = 0; i < 11; i++) {
  49 + GPCR(70) = GPIO_bit(70);
  50 + udelay(10);
  51 + GPSR(70) = GPIO_bit(70);
  52 + udelay(10);
  53 + }
  54 + /* set gpio pin to input */
  55 + GPDR(70) &= ~GPIO_bit(70);
39 56  
  57 + return 0;
  58 +}
  59 +
  60 +
40 61 /**
  62 + * misc_init_r: - misc initialisation routines
  63 + */
  64 +
  65 +int misc_init_r(void)
  66 +{
  67 + uchar *str;
  68 +
  69 + /* determine if the software update key is pressed during startup */
  70 + if (GPLR0 & 0x00000800) {
  71 + printf("using bootcmd_normal (sw-update button not pressed)\n");
  72 + str = getenv("bootcmd_normal");
  73 + } else {
  74 + printf("using bootcmd_update (sw-update button pressed)\n");
  75 + str = getenv("bootcmd_update");
  76 + }
  77 +
  78 + setenv("bootcmd",str);
  79 +
  80 + return 0;
  81 +}
  82 +
  83 +
  84 +/**
41 85 * board_init: - setup some data structures
42 86 *
43 87 * @return: 0 in case of success
... ... @@ -51,7 +95,7 @@
51 95 /* so we do _nothing_ here */
52 96  
53 97 /* arch number of Innokom board */
54   - gd->bd->bi_arch_number = 258;
  98 + gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
55 99  
56 100 /* adress of boot parameters */
57 101 gd->bd->bi_boot_params = 0xa0000100;
board/innokom/memsetup.S
Diff comments   View file @ 47cd00f
... ... @@ -38,7 +38,10 @@
38 38 sub pc,pc,#4
39 39 .endm
40 40  
  41 +_TEXT_BASE:
  42 + .word TEXT_BASE
41 43  
  44 +
42 45 /*
43 46 * Memory setup
44 47 */
45 48  
... ... @@ -222,7 +225,13 @@
222 225 /* Step 2c: Write FLYCNFG FIXME: what's that??? */
223 226 /* ---------------------------------------------------------------- */
224 227  
  228 + /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
  229 + adr r3, mem_init /* r0 <- current position of code */
  230 + ldr r2, =mem_init
  231 + cmp r3, r2 /* skip init if in place */
  232 + beq initirqs
225 233  
  234 +
226 235 /* ---------------------------------------------------------------- */
227 236 /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
228 237 /* ---------------------------------------------------------------- */
229 238  
... ... @@ -313,17 +322,23 @@
313 322 /* documented in SDRAM data sheets. The address(es) used */
314 323 /* for this purpose must not be cacheable. */
315 324  
316   - ldr r3, =CFG_DRAM_BASE
317   - str r2, [r3]
318   - str r2, [r3]
319   - str r2, [r3]
320   - str r2, [r3]
321   - str r2, [r3]
322   - str r2, [r3]
323   - str r2, [r3]
324   - str r2, [r3]
  325 + /* There should 9 writes, since the first write doesn't */
  326 + /* trigger a refresh cycle on PXA250. See Intel PXA250 and */
  327 + /* PXA210 Processors Specification Update, */
  328 + /* Jan 2003, Errata #116, page 30. */
325 329  
326 330  
  331 + ldr r3, =CFG_DRAM_BASE
  332 + str r2, [r3]
  333 + str r2, [r3]
  334 + str r2, [r3]
  335 + str r2, [r3]
  336 + str r2, [r3]
  337 + str r2, [r3]
  338 + str r2, [r3]
  339 + str r2, [r3]
  340 + str r2, [r3]
  341 +
327 342 /* Step 4g: Write MDCNFG with enable bits asserted */
328 343 /* (MDCNFG:DEx set to 1). */
329 344  
... ... @@ -339,7 +354,6 @@
339 354  
340 355 /* We are finished with Intel's memory controller initialisation */
341 356  
342   -
343 357 /* ---------------------------------------------------------------- */
344 358 /* Disable (mask) all interrupts at interrupt controller */
345 359 /* ---------------------------------------------------------------- */
... ... @@ -405,8 +419,7 @@
405 419  
406 420 /* FIXME */
407 421  
408   -#define NODEBUG
409   -#ifdef NODEBUG
  422 +#ifndef DEBUG
410 423 /*Disable software and data breakpoints */
411 424 mov r0,#0
412 425 mcr p15,0,r0,c14,c8,0 /* ibcr0 */
... ... @@ -416,7 +429,6 @@
416 429 /*Enable all debug functionality */
417 430 mov r0,#0x80000000
418 431 mcr p14,0,r0,c10,c0,0 /* dcsr */
419   -
420 432 #endif
421 433  
422 434 /* ---------------------------------------------------------------- */
board/innokom/u-boot.lds
Diff comments   View file @ 47cd00f
... ... @@ -47,7 +47,9 @@
47 47 armboot_end_data = .;
48 48  
49 49 . = ALIGN(4);
  50 + bss_start = .;
50 51 .bss : { *(.bss) }
  52 + bss_end = .;
51 53  
52 54 armboot_end = .;
53 55 }
board/lubbock/u-boot.lds
Diff comments   View file @ 47cd00f
... ... @@ -47,7 +47,9 @@
47 47 armboot_end_data = .;
48 48  
49 49 . = ALIGN(4);
  50 + bss_start = .;
50 51 .bss : { *(.bss) }
  52 + bss_end = .;
51 53  
52 54 armboot_end = .;
53 55 }
board/mpl/common/common_util.c
Diff comments   View file @ 47cd00f
... ... @@ -301,7 +301,7 @@
301 301  
302 302 void show_stdio_dev(void)
303 303 {
304   - /* Print informations */
  304 + /* Print information */
305 305 printf ("In: ");
306 306 if (stdio_devices[stdin] == NULL) {
307 307 printf ("No input devices available!\n");
board/trab/u-boot.lds
Diff comments   View file @ 47cd00f
... ... @@ -38,7 +38,7 @@
38 38 lib_generic/crc32.o (.text)
39 39 lib_generic/string.o (.text)
40 40  
41   - . = env_offset;
  41 + . = DEFINED(env_offset) ? env_offset : .;
42 42 common/environment.o (.ppcenv)
43 43  
44 44 *(.text)
... ... @@ -496,7 +496,7 @@
496 496 }
497 497  
498 498 #ifndef CFG_CONSOLE_INFO_QUIET
499   - /* Print informations */
  499 + /* Print information */
500 500 printf ("In: ");
501 501 if (stdio_devices[stdin] == NULL) {
502 502 printf ("No input devices available!\n");
... ... @@ -34,6 +34,7 @@
34 34 #include <environment.h>
35 35 #include <cmd_nvedit.h>
36 36 #include <linux/stddef.h>
  37 +#include <malloc.h>
37 38  
38 39 #if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
39 40 #define CMD_SAVEENV
... ... @@ -41,11 +42,6 @@
41 42 #error Cannot use CFG_ENV_ADDR_REDUND without CFG_CMD_ENV & CFG_CMD_FLASH
42 43 #endif
43 44  
44   -#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE) && \
45   - defined(CFG_ENV_ADDR_REDUND)
46   -#error CFG_ENV_ADDR_REDUND should not be used when CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
47   -#endif
48   -
49 45 #if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND < CFG_ENV_SIZE)
50 46 #error CFG_ENV_SIZE_REDUND should not be less then CFG_ENV_SIZE
51 47 #endif
... ... @@ -80,8 +76,9 @@
80 76 #ifdef CFG_ENV_ADDR_REDUND
81 77 static env_t *flash_addr_new = (env_t *)CFG_ENV_ADDR_REDUND;
82 78  
83   -static ulong end_addr = CFG_ENV_ADDR + CFG_ENV_SIZE - 1;
84   -static ulong end_addr_new = CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1;
  79 +/* CFG_ENV_ADDR is supposed to be on sector boundary */
  80 +static ulong end_addr = CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1;
  81 +static ulong end_addr_new = CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1;
85 82  
86 83 static uchar active_flag = 1;
87 84 static uchar obsolete_flag = 0;
... ... @@ -164,6 +161,8 @@
164 161 int saveenv(void)
165 162 {
166 163 int rc = 1;
  164 + ulong up_data = 0;
  165 + char *saved_data = NULL;
167 166  
168 167 debug ("Protect off %08lX ... %08lX\n",
169 168 (ulong)flash_addr, end_addr);
... ... @@ -179,6 +178,22 @@
179 178 goto Done;
180 179 }
181 180  
  181 +#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
  182 + up_data = (end_addr_new + 1 - ((long)flash_addr_new + CFG_ENV_SIZE));
  183 + debug ("Data to save 0x%x\n", up_data);
  184 + if (up_data) {
  185 + if ((saved_data = malloc(up_data)) == NULL) {
  186 + printf("Unable to save the rest of sector (%ld)\n",
  187 + up_data);
  188 + goto Done;
  189 + }
  190 + memcpy(saved_data,
  191 + (void *)((long)flash_addr_new + CFG_ENV_SIZE), up_data);
  192 + debug ("Data (start 0x%x, len 0x%x) saved at 0x%x\n",
  193 + (long)flash_addr_new + CFG_ENV_SIZE,
  194 + up_data, saved_data);
  195 + }
  196 +#endif
182 197 puts ("Erasing Flash...");
183 198 debug (" %08lX ... %08lX ...",
184 199 (ulong)flash_addr_new, end_addr_new);
... ... @@ -212,6 +227,18 @@
212 227 }
213 228 puts ("done\n");
214 229  
  230 +#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
  231 + if (up_data) { /* restore the rest of sector */
  232 + debug ("Restoring the rest of data to 0x%x len 0x%x\n",
  233 + (long)flash_addr_new + CFG_ENV_SIZE, up_data);
  234 + if (flash_write(saved_data,
  235 + (long)flash_addr_new + CFG_ENV_SIZE,
  236 + up_data)) {
  237 + flash_perror(rc);
  238 + goto Done;
  239 + }
  240 + }
  241 +#endif
215 242 {
216 243 env_t * etmp = flash_addr;
217 244 ulong ltmp = end_addr;
... ... @@ -226,6 +253,8 @@
226 253 rc = 0;
227 254 Done:
228 255  
  256 + if (saved_data)
  257 + free (saved_data);
229 258 /* try to re-protect */
230 259 (void) flash_sect_protect (1, (ulong)flash_addr, end_addr);
231 260 (void) flash_sect_protect (1, (ulong)flash_addr_new, end_addr_new);
cpu/mpc824x/drivers/i2c/i2c1.c
Diff comments   View file @ 47cd00f
... ... @@ -1128,6 +1128,15 @@
1128 1128  
1129 1129 void i2c_init (int speed, int slaveadd)
1130 1130 {
  1131 +#ifdef CFG_I2C_INIT_BOARD
  1132 + /*
  1133 + * call board specific i2c bus reset routine before accessing the
  1134 + * environment, which might be in a chip on that bus. For details
  1135 + * about this problem see doc/I2C_Edge_Conditions.
  1136 + */
  1137 + i2c_init_board();
  1138 +#endif
  1139 +
1131 1140 #ifdef DEBUG
1132 1141 I2C_Initialize (0x7f, 0, (void *) printf);
1133 1142 #else
... ... @@ -221,6 +221,13 @@
221 221 volatile I2C_BD *rxbd, *txbd;
222 222 uint dpaddr;
223 223  
  224 +#ifdef CFG_I2C_INIT_BOARD
  225 + /* call board specific i2c bus reset routine before accessing the */
  226 + /* environment, which might be in a chip on that bus. For details */
  227 + /* about this problem see doc/I2C_Edge_Conditions. */
  228 + i2c_init_board();
  229 +#endif
  230 +
224 231 dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE]));
225 232 if (dpaddr == 0) {
226 233 /* need to allocate dual port ram */
... ... @@ -215,6 +215,13 @@
215 215 volatile I2C_BD *rxbd, *txbd;
216 216 uint dpaddr;
217 217  
  218 +#ifdef CFG_I2C_INIT_BOARD
  219 + /* call board specific i2c bus reset routine before accessing the */
  220 + /* environment, which might be in a chip on that bus. For details */
  221 + /* about this problem see doc/I2C_Edge_Conditions. */
  222 + i2c_init_board();
  223 +#endif
  224 +
218 225 #ifdef CFG_I2C_UCODE_PATCH
219 226 iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
220 227 #else
... ... @@ -85,7 +85,15 @@
85 85 unsigned long freqOPB;
86 86 int val, divisor;
87 87  
  88 +#ifdef CFG_I2C_INIT_BOARD
  89 + /* call board specific i2c bus reset routine before accessing the */
  90 + /* environment, which might be in a chip on that bus. For details */
  91 + /* about this problem see doc/I2C_Edge_Conditions. */
  92 + i2c_init_board();
  93 +#endif
  94 +
88 95 /* Handle possible failed I2C state */
  96 + /* FIXME: put this into i2c_init_board()? */
89 97 _i2c_bus_reset ();
90 98  
91 99 /* clear lo master address */
... ... @@ -41,6 +41,7 @@
41 41 * - I2C_PXA_SLAVE_ADDR
42 42 */
43 43  
  44 +#include <asm/arch/hardware.h>
44 45 #include <asm/arch/pxa-regs.h>
45 46 #include <i2c.h>
46 47  
... ... @@ -244,6 +245,12 @@
244 245  
245 246 void i2c_init(int speed, int slaveaddr)
246 247 {
  248 +#ifdef CFG_I2C_INIT_BOARD
  249 + /* call board specific i2c bus reset routine before accessing the */
  250 + /* environment, which might be in a chip on that bus. For details */
  251 + /* about this problem see doc/I2C_Edge_Conditions. */
  252 + i2c_init_board();
  253 +#endif
247 254 }
248 255  
249 256  
... ... @@ -84,6 +84,17 @@
84 84 .word armboot_end
85 85  
86 86 /*
  87 + * This is defined in the board specific linker script
  88 + */
  89 +.globl _bss_start
  90 +_bss_start:
  91 + .word bss_start
  92 +
  93 +.globl _bss_end
  94 +_bss_end:
  95 + .word bss_end
  96 +
  97 +/*
87 98 * _armboot_real_end is the first usable RAM address behind armboot
88 99 * and the various stacks
89 100 */
... ... @@ -143,7 +154,20 @@
143 154 ldr r0, _uboot_reloc /* upper 128 KiB: relocated uboot */
144 155 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
145 156 /* FIXME: bdinfo should be here */
146   - sub sp, r0, #12 /* leave 3 words for abort-stack */
  157 + sub sp, r0, #12 /* leave 3 words for abort-stack */
  158 +
  159 +clear_bss:
  160 +
  161 + ldr r0, _bss_start /* find start of bss segment */
  162 + add r0, r0, #4 /* start at first byte of bss */
  163 + ldr r1, _bss_end /* stop here */
  164 + mov r2, #0x00000000 /* clear */
  165 +
  166 +clbss_l:str r2, [r0] /* clear loop... */
  167 + add r0, r0, #4
  168 + cmp r0, r1
  169 + bne clbss_l
  170 +
147 171  
148 172 ldr pc, _start_armboot
149 173  
... ... @@ -149,7 +149,7 @@
149 149 __le16_to_cpu (boot -> TimeF));
150 150  
151 151  
152   - /* informations are extracted from boot sector */
  152 + /* information is extracted from boot sector */
153 153 heads = __le16_to_cpu (boot -> nheads);
154 154 sectors = __le16_to_cpu (boot -> nsect);
155 155 fs -> tot_sectors = __le32_to_cpu (boot -> bigsect);
include/cmd_console.h
Diff comments   View file @ 47cd00f
... ... @@ -30,7 +30,7 @@
30 30 #if (CONFIG_COMMANDS & CFG_CMD_CONSOLE)
31 31 #define CMD_TBL_CONINFO MK_CMD_TBL_ENTRY( \
32 32 "coninfo", 5, 3, 1, do_coninfo, \
33   - "coninfo - print console devices and informations\n", \
  33 + "coninfo - print console devices and information\n", \
34 34 "" \
35 35 ),
36 36 int do_coninfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
include/configs/csb226.h
Diff comments   View file @ 47cd00f
... ... @@ -55,12 +55,13 @@
55 55 /*
56 56 * select serial console configuration
57 57 */
58   -#define CONFIG_FFUART 1 /* we use FFUART on CSB226 */
  58 +#define CONFIG_FFUART 1 /* we use FFUART on CSB226 */
59 59  
60 60 /* allow to overwrite serial and ethaddr */
61 61 #define CONFIG_ENV_OVERWRITE
62 62  
63 63 #define CONFIG_BAUDRATE 19200
  64 +#undef CONFIG_MISC_INIT_R /* not used yet */
64 65  
65 66 #define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
66 67  
... ... @@ -68,7 +69,7 @@
68 69 #include <cmd_confdefs.h>
69 70  
70 71 #define CONFIG_BOOTDELAY 3
71   -#define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200"
  72 +#define CONFIG_BOOTARGS "console=ttyS0,19200 ip=dhcp root=/dev/nfs, ether=0,0x08000000,eth0"
72 73 #define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF
73 74 #define CONFIG_NETMASK 255.255.255.0
74 75 #define CONFIG_IPADDR 192.168.1.56
75 76  
... ... @@ -76,8 +77,10 @@
76 77 #define CONFIG_BOOTCOMMAND "bootm 0x40000"
77 78 #define CONFIG_SHOW_BOOT_PROGRESS
78 79  
  80 +#define CONFIG_CMDLINE_TAG 1
  81 +
79 82 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
80   -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
  83 +#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
81 84 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
82 85 #endif
83 86  
... ... @@ -90,7 +93,7 @@
90 93 * used for the RAM copy of the uboot code
91 94 *
92 95 */
93   -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  96 +#define CFG_MALLOC_LEN (128*1024)
94 97  
95 98 #define CFG_LONGHELP /* undef to save memory */
96 99 #define CFG_PROMPT "uboot> " /* Monitor Command Prompt */
... ... @@ -104,7 +107,7 @@
104 107  
105 108 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
106 109  
107   -#define CFG_LOAD_ADDR 0xa7fe0000 /* default load address */
  110 +#define CFG_LOAD_ADDR 0xa3000000 /* default load address */
108 111 /* RS: where is this documented? */
109 112 /* RS: is this where U-Boot is */
110 113 /* RS: relocated to in RAM? */
include/configs/trab.h
Diff comments   View file @ 47cd00f
... ... @@ -117,7 +117,6 @@
117 117 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
118 118 #include <cmd_confdefs.h>
119 119  
120   -
121 120 #define CONFIG_BOOTDELAY 5
122 121 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
123 122 #define CONFIG_BOOTARGS "console=ttyS0"
... ... @@ -126,6 +125,8 @@
126 125 #define CONFIG_HOSTNAME trab
127 126 #define CONFIG_SERVERIP 192.168.3.1
128 127 #define CONFIG_BOOTCOMMAND "run flash_nfs"
  128 +
  129 +#ifndef CONFIG_BIG_FLASH
129 130 #define CONFIG_EXTRA_ENV_SETTINGS \
130 131 "nfs_args=setenv bootargs root=/dev/nfs rw " \
131 132 "nfsroot=$(serverip):$(rootpath)\0" \
... ... @@ -137,7 +138,7 @@
137 138 "load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
138 139 "update=protect off 1:0-8;era 1:0-8;cp.b 0xc100000 0 $(filesize);" \
139 140 "setenv filesize;saveenv\0" \
140   - "loadfile=/tftpboot/TRAB/pImageImage\0" \" \
  141 + "loadfile=/tftpboot/TRAB/uImageImage\0" \" \
141 142 "loadaddr=c400000\0" \
142 143 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
143 144 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
... ... @@ -146,6 +147,27 @@
146 147 "mdm_init1=ATZ\0" \
147 148 "mdm_init2=ATS0=1\0" \
148 149 "mdm_flow_control=rts/cts\0"
  150 +#else /* CONFIG_BIG_FLASH */
  151 +#define CONFIG_EXTRA_ENV_SETTINGS \
  152 + "nfs_args=setenv bootargs root=/dev/nfs rw " \
  153 + "nfsroot=$(serverip):$(rootpath)\0" \
  154 + "rootpath=/opt/eldk/arm_920TDI\0" \
  155 + "ram_args=setenv bootargs root=/dev/ram rw\0" \
  156 + "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
  157 + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
  158 + "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
  159 + "load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
  160 + "update=protect off 1:0;era 1:0;cp.b 0xc100000 0 $(filesize)\0" \
  161 + "loadfile=/tftpboot/TRAB/uImage\0" \
  162 + "loadaddr=c400000\0" \
  163 + "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
  164 + "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
  165 + "kernel_addr=00040000\0" \
  166 + "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
  167 + "mdm_init1=ATZ\0" \
  168 + "mdm_init2=ATS0=1\0" \
  169 + "mdm_flow_control=rts/cts\0"
  170 +#endif /* CONFIG_BIG_FLASH */
149 171  
150 172 #if 0 /* disabled for development */
151 173 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
152 174  
... ... @@ -215,7 +237,11 @@
215 237  
216 238 /* The following #defines are needed to get flash environment right */
217 239 #define CFG_MONITOR_BASE CFG_FLASH_BASE
  240 +#ifndef CONFIG_BIG_FLASH
218 241 #define CFG_MONITOR_LEN (256 << 10)
  242 +#else
  243 +#define CFG_MONITOR_LEN (128 << 10)
  244 +#endif
219 245  
220 246 /*-----------------------------------------------------------------------
221 247 * FLASH and environment organization
... ... @@ -239,7 +265,7 @@
239 265 #define CFG_ENV_SIZE 0x4000
240 266 #define CFG_ENV_SECT_SIZE 0x4000
241 267 #else
242   -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000)
  268 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000)
243 269 #define CFG_ENV_SIZE 0x4000
244 270 #define CFG_ENV_SECT_SIZE 0x20000
245 271 #endif
... ... @@ -35,7 +35,7 @@
35 35 #define DEV_FLAGS_SYSTEM 0x80000000 /* Device is a system device */
36 36 #define DEV_EXT_VIDEO 0x00000001 /* Video extensions supported */
37 37  
38   -/* Device informations */
  38 +/* Device information */
39 39 typedef struct {
40 40 int flags; /* Device flags: input/output/system */
41 41 int ext; /* Supported extensions */
... ... @@ -269,7 +269,7 @@
269 269 board_post_init ();
270 270 #endif
271 271  
272   -printf ("### vfd_type=0x%02X vfd_data_lines_inv=%d\n",gd->vfd_type,gd->vfd_inv_data);
  272 +printf ("### FB @ %08lX vfd_type=0x%02X vfd_data_lines_inv=%d\n",gd->fb_base,gd->vfd_type,gd->vfd_inv_data);
273 273  
274 274 /* main_loop() can return to retry autoboot, if so just run it again. */
275 275 for (;;) {
... ... @@ -211,7 +211,7 @@
211 211 break;
212 212 case 18: /* Extension path - Not yet supported */
213 213 /*
214   - * This can be used to send the informations of the
  214 + * This can be used to send the information of the
215 215 * vendor area in another file that the client can
216 216 * access via TFTP.
217 217 */
... ... @@ -229,7 +229,7 @@
229 229 /* Application layer fields */
230 230 case 43: /* Vendor specific info - Not yet supported */
231 231 /*
232   - * Binary informations to exchange specific
  232 + * Binary information to exchange specific
233 233 * product information.
234 234 */
235 235 break;
... ... @@ -752,6 +752,7 @@
752 752 volatile uchar *pkt, *iphdr;
753 753 Bootp_t *bp;
754 754 int pktlen, iplen, extlen;
  755 + IPaddr_t OfferedIP;
755 756  
756 757 debug ("DhcpSendRequestPkt: Sending DHCPREQUEST\n");
757 758 pkt = NetTxPacket;
... ... @@ -784,7 +785,8 @@
784 785 /*
785 786 * Copy options from OFFER packet if present
786 787 */
787   - extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, bp->bp_yiaddr);
  788 + NetCopyIP(&OfferedIP, &bp->bp_yiaddr);
  789 + extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, OfferedIP);
788 790  
789 791 pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen;
790 792 iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen;
tools/easylogo/easylogo.c
Diff comments   View file @ 47cd00f
... ... @@ -264,7 +264,7 @@
264 264 if (file==NULL)
265 265 return -1 ;
266 266  
267   -/* Author informations */
  267 +/* Author information */
268 268 fprintf(file, "/*\n * Generated by EasyLogo, (C) 2000 by Paolo Scaffardi\n/*\n"); */
269 269 fprintf(file, " * To use this, include it and call: easylogo_plot(screen,&%s, width,x,y)\n *\n", varname);
270 270 fprintf(file, " * Where:\t'screen'\tis the pointer to the frame buffer\n");