Eric Lee / smarc-uboot

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Commit 482cbd553daf3d9cd21e564702bac84a6bd43f2f

Authored by Tom Rini
2 parents 9da7e3daf3 55765b1842
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

Merge git://git.denx.de/u-boot-nand-flash

Showing 53 changed files Side-by-side Diff

... ... @@ -3483,9 +3483,6 @@
3483 3483 Adds the MTD partitioning infrastructure from the Linux
3484 3484 kernel. Needed for UBI support.
3485 3485  
3486   - CONFIG_MTD_NAND_VERIFY_WRITE
3487   - verify if the written data is correct reread.
3488   -
3489 3486 - UBI support
3490 3487 CONFIG_CMD_UBI
3491 3488  
board/prodrive/alpr/nand.c
Diff comments   View file @ 482cbd5
... ... @@ -93,19 +93,6 @@
93 93 }
94 94 }
95 95  
96   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
97   -static int alpr_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
98   -{
99   - int i;
100   -
101   - for (i = 0; i < len; i++)
102   - if (buf[i] != readb(&(alpr_ndfc->data)))
103   - return i;
104   -
105   - return 0;
106   -}
107   -#endif
108   -
109 96 static int alpr_nand_dev_ready(struct mtd_info *mtd)
110 97 {
111 98 /*
... ... @@ -130,9 +117,6 @@
130 117 nand->read_byte = alpr_nand_read_byte;
131 118 nand->write_buf = alpr_nand_write_buf;
132 119 nand->read_buf = alpr_nand_read_buf;
133   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
134   - nand->verify_buf = alpr_nand_verify_buf;
135   -#endif
136 120 nand->dev_ready = alpr_nand_dev_ready;
137 121  
138 122 return 0;
board/socrates/nand.c
Diff comments   View file @ 482cbd5
... ... @@ -18,9 +18,6 @@
18 18 static u_char sc_nand_read_byte(struct mtd_info *mtd);
19 19 static u16 sc_nand_read_word(struct mtd_info *mtd);
20 20 static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
21   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
22   -static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
23   -#endif
24 21 static int sc_nand_device_ready(struct mtd_info *mtdinfo);
25 22  
26 23 #define FPGA_NAND_CMD_MASK (0x7 << 28)
27 24  
... ... @@ -102,26 +99,7 @@
102 99 }
103 100 }
104 101  
105   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
106 102 /**
107   - * sc_nand_verify_buf - Verify chip data against buffer
108   - * @mtd: MTD device structure
109   - * @buf: buffer containing the data to compare
110   - * @len: number of bytes to compare
111   - */
112   -static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
113   -{
114   - int i;
115   -
116   - for (i = 0; i < len; i++) {
117   - if (buf[i] != sc_nand_read_byte(mtd));
118   - return -EFAULT;
119   - }
120   - return 0;
121   -}
122   -#endif
123   -
124   -/**
125 103 * sc_nand_device_ready - Check the NAND device is ready for next command.
126 104 * @mtd: MTD device structure
127 105 */
... ... @@ -178,9 +156,6 @@
178 156 nand->read_word = sc_nand_read_word;
179 157 nand->write_buf = sc_nand_write_buf;
180 158 nand->read_buf = sc_nand_read_buf;
181   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
182   - nand->verify_buf = sc_nand_verify_buf;
183   -#endif
184 159  
185 160 return 0;
186 161 }
... ... @@ -419,10 +419,13 @@
419 419 .mode = MTD_OPS_RAW
420 420 };
421 421  
422   - if (read)
  422 + if (read) {
423 423 ret = mtd_read_oob(nand, off, &ops);
424   - else
  424 + } else {
425 425 ret = mtd_write_oob(nand, off, &ops);
  426 + if (!ret)
  427 + ret = nand_verify_page_oob(nand, &ops, off);
  428 + }
426 429  
427 430 if (ret) {
428 431 printf("%s: error at offset %llx, ret %d\n",
... ... @@ -690,7 +693,8 @@
690 693 else
691 694 ret = nand_write_skip_bad(nand, off, &rwsize,
692 695 NULL, maxsize,
693   - (u_char *)addr, 0);
  696 + (u_char *)addr,
  697 + WITH_WR_VERIFY);
694 698 #ifdef CONFIG_CMD_NAND_TRIMFFS
695 699 } else if (!strcmp(s, ".trimffs")) {
696 700 if (read) {
697 701  
... ... @@ -699,18 +703,8 @@
699 703 }
700 704 ret = nand_write_skip_bad(nand, off, &rwsize, NULL,
701 705 maxsize, (u_char *)addr,
702   - WITH_DROP_FFS);
  706 + WITH_DROP_FFS | WITH_WR_VERIFY);
703 707 #endif
704   -#ifdef CONFIG_CMD_NAND_YAFFS
705   - } else if (!strcmp(s, ".yaffs")) {
706   - if (read) {
707   - printf("Unknown nand command suffix '%s'.\n", s);
708   - return 1;
709   - }
710   - ret = nand_write_skip_bad(nand, off, &rwsize, NULL,
711   - maxsize, (u_char *)addr,
712   - WITH_YAFFS_OOB);
713   -#endif
714 708 } else if (!strcmp(s, ".oob")) {
715 709 /* out-of-band data */
716 710 mtd_oob_ops_t ops = {
... ... @@ -852,11 +846,6 @@
852 846 " write 'size' bytes starting at offset 'off' from memory address\n"
853 847 " 'addr', skipping bad blocks and dropping any pages at the end\n"
854 848 " of eraseblocks that contain only 0xFF\n"
855   -#endif
856   -#ifdef CONFIG_CMD_NAND_YAFFS
857   - "nand write.yaffs - addr off|partition size\n"
858   - " write 'size' bytes starting at offset 'off' with yaffs format\n"
859   - " from memory address 'addr', skipping bad blocks.\n"
860 849 #endif
861 850 "nand erase[.spread] [clean] off size - erase 'size' bytes "
862 851 "from offset 'off'\n"
... ... @@ -99,12 +99,6 @@
99 99 CONFIG_CMD_NAND_TORTURE
100 100 Enables the torture command (see description of this command below).
101 101  
102   - CONFIG_MTD_NAND_ECC_JFFS2
103   - Define this if you want the Error Correction Code information in
104   - the out-of-band data to be formatted to match the JFFS2 file system.
105   - CONFIG_MTD_NAND_ECC_YAFFS would be another useful choice for
106   - someone to implement.
107   -
108 102 CONFIG_SYS_MAX_NAND_DEVICE
109 103 The maximum number of NAND devices you want to support.
110 104  
... ... @@ -311,12 +305,6 @@
311 305  
312 306 NOTE:
313 307 =====
314   -
315   -The current NAND implementation is based on what is in recent
316   -Linux kernels. The old legacy implementation has been removed.
317   -
318   -If you have board code which used CONFIG_NAND_LEGACY, you'll need
319   -to convert to the current NAND interface for it to continue to work.
320 308  
321 309 The Disk On Chip driver is currently broken and has been for some time.
322 310 There is a driver in drivers/mtd/nand, taken from Linux, that works with
drivers/dfu/dfu_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -64,7 +64,7 @@
64 64 return ret;
65 65 /* then write */
66 66 ret = nand_write_skip_bad(nand, start, &count, &actual,
67   - lim, buf, 0);
  67 + lim, buf, WITH_WR_VERIFY);
68 68 }
69 69  
70 70 if (ret != 0) {
drivers/mtd/nand/davinci_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -405,18 +405,6 @@
405 405 goto err;
406 406 }
407 407  
408   -#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
409   - /* Send command to read back the data */
410   - chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
411   -
412   - if (chip->verify_buf(mtd, buf, mtd->writesize)) {
413   - ret = -EIO;
414   - goto err;
415   - }
416   -
417   - /* Make sure the next page prog is preceded by a status read */
418   - chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
419   -#endif
420 408 err:
421 409 /* restore ECC layout */
422 410 if (page < CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE) {
drivers/mtd/nand/fsl_elbc_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -561,41 +561,6 @@
561 561 len, avail);
562 562 }
563 563  
564   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
565   -/*
566   - * Verify buffer against the FCM Controller Data Buffer
567   - */
568   -static int fsl_elbc_verify_buf(struct mtd_info *mtd,
569   - const u_char *buf, int len)
570   -{
571   - struct nand_chip *chip = mtd->priv;
572   - struct fsl_elbc_mtd *priv = chip->priv;
573   - struct fsl_elbc_ctrl *ctrl = priv->ctrl;
574   - int i;
575   -
576   - if (len < 0) {
577   - printf("write_buf of %d bytes", len);
578   - return -EINVAL;
579   - }
580   -
581   - if ((unsigned int)len > ctrl->read_bytes - ctrl->index) {
582   - printf("verify_buf beyond end of buffer "
583   - "(%d requested, %u available)\n",
584   - len, ctrl->read_bytes - ctrl->index);
585   -
586   - ctrl->index = ctrl->read_bytes;
587   - return -EINVAL;
588   - }
589   -
590   - for (i = 0; i < len; i++)
591   - if (in_8(&ctrl->addr[ctrl->index + i]) != buf[i])
592   - break;
593   -
594   - ctrl->index += len;
595   - return i == len && ctrl->status == LTESR_CC ? 0 : -EIO;
596   -}
597   -#endif
598   -
599 564 /* This function is called after Program and Erase Operations to
600 565 * check for success or failure.
601 566 */
... ... @@ -727,9 +692,6 @@
727 692 nand->read_byte = fsl_elbc_read_byte;
728 693 nand->write_buf = fsl_elbc_write_buf;
729 694 nand->read_buf = fsl_elbc_read_buf;
730   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
731   - nand->verify_buf = fsl_elbc_verify_buf;
732   -#endif
733 695 nand->select_chip = fsl_elbc_select_chip;
734 696 nand->cmdfunc = fsl_elbc_cmdfunc;
735 697 nand->waitfunc = fsl_elbc_wait;
drivers/mtd/nand/fsl_ifc_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -683,41 +683,6 @@
683 683 __func__, len, avail);
684 684 }
685 685  
686   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
687   -/*
688   - * Verify buffer against the IFC Controller Data Buffer
689   - */
690   -static int fsl_ifc_verify_buf(struct mtd_info *mtd,
691   - const u_char *buf, int len)
692   -{
693   - struct nand_chip *chip = mtd->priv;
694   - struct fsl_ifc_mtd *priv = chip->priv;
695   - struct fsl_ifc_ctrl *ctrl = priv->ctrl;
696   - int i;
697   -
698   - if (len < 0) {
699   - printf("%s of %d bytes", __func__, len);
700   - return -EINVAL;
701   - }
702   -
703   - if ((unsigned int)len > ctrl->read_bytes - ctrl->index) {
704   - printf("%s beyond end of buffer "
705   - "(%d requested, %u available)\n",
706   - __func__, len, ctrl->read_bytes - ctrl->index);
707   -
708   - ctrl->index = ctrl->read_bytes;
709   - return -EINVAL;
710   - }
711   -
712   - for (i = 0; i < len; i++)
713   - if (in_8(&ctrl->addr[ctrl->index + i]) != buf[i])
714   - break;
715   -
716   - ctrl->index += len;
717   - return i == len && ctrl->status == IFC_NAND_EVTER_STAT_OPC ? 0 : -EIO;
718   -}
719   -#endif
720   -
721 686 /* This function is called after Program and Erase Operations to
722 687 * check for success or failure.
723 688 */
... ... @@ -940,9 +905,6 @@
940 905  
941 906 nand->write_buf = fsl_ifc_write_buf;
942 907 nand->read_buf = fsl_ifc_read_buf;
943   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
944   - nand->verify_buf = fsl_ifc_verify_buf;
945   -#endif
946 908 nand->select_chip = fsl_ifc_select_chip;
947 909 nand->cmdfunc = fsl_ifc_cmdfunc;
948 910 nand->waitfunc = fsl_ifc_wait;
drivers/mtd/nand/fsl_upm.c
Diff comments   View file @ 482cbd5
... ... @@ -153,21 +153,6 @@
153 153 buf[i] = in_8(chip->IO_ADDR_R);
154 154 }
155 155  
156   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
157   -static int upm_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
158   -{
159   - int i;
160   - struct nand_chip *chip = mtd->priv;
161   -
162   - for (i = 0; i < len; i++) {
163   - if (buf[i] != in_8(chip->IO_ADDR_R))
164   - return -EFAULT;
165   - }
166   -
167   - return 0;
168   -}
169   -#endif
170   -
171 156 static int nand_dev_ready(struct mtd_info *mtd)
172 157 {
173 158 struct nand_chip *chip = mtd->priv;
... ... @@ -193,9 +178,6 @@
193 178 chip->read_byte = upm_nand_read_byte;
194 179 chip->read_buf = upm_nand_read_buf;
195 180 chip->write_buf = upm_nand_write_buf;
196   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
197   - chip->verify_buf = upm_nand_verify_buf;
198   -#endif
199 181 if (fun->dev_ready)
200 182 chip->dev_ready = nand_dev_ready;
201 183  
drivers/mtd/nand/mpc5121_nfc.c
Diff comments   View file @ 482cbd5
... ... @@ -459,29 +459,6 @@
459 459 mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
460 460 }
461 461  
462   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
463   -/* Compare buffer with NAND flash */
464   -static int mpc5121_nfc_verify_buf(struct mtd_info *mtd,
465   - const u_char * buf, int len)
466   -{
467   - u_char tmp[256];
468   - uint bsize;
469   -
470   - while (len) {
471   - bsize = min(len, 256);
472   - mpc5121_nfc_read_buf(mtd, tmp, bsize);
473   -
474   - if (memcmp(buf, tmp, bsize))
475   - return 1;
476   -
477   - buf += bsize;
478   - len -= bsize;
479   - }
480   -
481   - return 0;
482   -}
483   -#endif
484   -
485 462 /* Read byte from NFC buffers */
486 463 static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
487 464 {
... ... @@ -609,9 +586,6 @@
609 586 chip->read_word = mpc5121_nfc_read_word;
610 587 chip->read_buf = mpc5121_nfc_read_buf;
611 588 chip->write_buf = mpc5121_nfc_write_buf;
612   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
613   - chip->verify_buf = mpc5121_nfc_verify_buf;
614   -#endif
615 589 chip->select_chip = mpc5121_nfc_select_chip;
616 590 chip->bbt_options = NAND_BBT_USE_FLASH;
617 591 chip->ecc.mode = NAND_ECC_SOFT;
drivers/mtd/nand/mxc_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -949,35 +949,7 @@
949 949 host->col_addr = col;
950 950 }
951 951  
952   -#ifdef __UBOOT__
953   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
954 952 /*
955   - * Used by the upper layer to verify the data in NAND Flash
956   - * with the data in the buf.
957   - */
958   -static int mxc_nand_verify_buf(struct mtd_info *mtd,
959   - const u_char *buf, int len)
960   -{
961   - u_char tmp[256];
962   - uint bsize;
963   -
964   - while (len) {
965   - bsize = min(len, 256);
966   - mxc_nand_read_buf(mtd, tmp, bsize);
967   -
968   - if (memcmp(buf, tmp, bsize))
969   - return 1;
970   -
971   - buf += bsize;
972   - len -= bsize;
973   - }
974   -
975   - return 0;
976   -}
977   -#endif
978   -#endif
979   -
980   -/*
981 953 * This function is used by upper layer for select and
982 954 * deselect of the NAND chip
983 955 */
... ... @@ -1207,11 +1179,6 @@
1207 1179 this->read_word = mxc_nand_read_word;
1208 1180 this->write_buf = mxc_nand_write_buf;
1209 1181 this->read_buf = mxc_nand_read_buf;
1210   -#ifdef __UBOOT__
1211   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
1212   - this->verify_buf = mxc_nand_verify_buf;
1213   -#endif
1214   -#endif
1215 1182  
1216 1183 host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
1217 1184 #ifdef MXC_NFC_V3_2
drivers/mtd/nand/mxs_nand.c
Diff comments   View file @ 482cbd5
... ... @@ -453,7 +453,7 @@
453 453 d->cmd.data =
454 454 MXS_DMA_DESC_COMMAND_NO_DMAXFER | MXS_DMA_DESC_IRQ |
455 455 MXS_DMA_DESC_NAND_WAIT_4_READY | MXS_DMA_DESC_DEC_SEM |
456   - MXS_DMA_DESC_WAIT4END | (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET);
  456 + MXS_DMA_DESC_WAIT4END | (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET);
457 457  
458 458 d->cmd.address = 0;
459 459  
... ... @@ -510,7 +510,7 @@
510 510 d->cmd.data =
511 511 MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ |
512 512 MXS_DMA_DESC_DEC_SEM | MXS_DMA_DESC_WAIT4END |
513   - (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET) |
  513 + (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET) |
514 514 (length << MXS_DMA_DESC_BYTES_OFFSET);
515 515  
516 516 d->cmd.address = (dma_addr_t)nand_info->data_buf;
drivers/mtd/nand/nand_base.c
Diff comments   View file @ 482cbd5
... ... @@ -361,52 +361,7 @@
361 361 ioread8_rep(chip->IO_ADDR_R, buf, len);
362 362 }
363 363  
364   -#ifdef __UBOOT__
365   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
366 364 /**
367   - * nand_verify_buf - [DEFAULT] Verify chip data against buffer
368   - * @mtd: MTD device structure
369   - * @buf: buffer containing the data to compare
370   - * @len: number of bytes to compare
371   - *
372   - * Default verify function for 8bit buswidth.
373   - */
374   -static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
375   -{
376   - int i;
377   - struct nand_chip *chip = mtd->priv;
378   -
379   - for (i = 0; i < len; i++)
380   - if (buf[i] != readb(chip->IO_ADDR_R))
381   - return -EFAULT;
382   - return 0;
383   -}
384   -
385   -/**
386   - * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
387   - * @mtd: MTD device structure
388   - * @buf: buffer containing the data to compare
389   - * @len: number of bytes to compare
390   - *
391   - * Default verify function for 16bit buswidth.
392   - */
393   -static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
394   -{
395   - int i;
396   - struct nand_chip *chip = mtd->priv;
397   - u16 *p = (u16 *) buf;
398   - len >>= 1;
399   -
400   - for (i = 0; i < len; i++)
401   - if (p[i] != readw(chip->IO_ADDR_R))
402   - return -EFAULT;
403   -
404   - return 0;
405   -}
406   -#endif
407   -#endif
408   -
409   -/**
410 365 * nand_write_buf16 - [DEFAULT] write buffer to chip
411 366 * @mtd: MTD device structure
412 367 * @buf: data buffer
... ... @@ -2435,20 +2390,6 @@
2435 2390 status = chip->waitfunc(mtd, chip);
2436 2391 }
2437 2392  
2438   -
2439   -#ifdef __UBOOT__
2440   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
2441   - /* Send command to read back the data */
2442   - chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
2443   -
2444   - if (chip->verify_buf(mtd, buf, mtd->writesize))
2445   - return -EIO;
2446   -
2447   - /* Make sure the next page prog is preceded by a status read */
2448   - chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
2449   -#endif
2450   -#endif
2451   -
2452 2393 return 0;
2453 2394 }
2454 2395  
... ... @@ -3139,12 +3080,6 @@
3139 3080 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
3140 3081 if (!chip->scan_bbt)
3141 3082 chip->scan_bbt = nand_default_bbt;
3142   -#ifdef __UBOOT__
3143   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
3144   - if (!chip->verify_buf)
3145   - chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
3146   -#endif
3147   -#endif
3148 3083  
3149 3084 if (!chip->controller) {
3150 3085 chip->controller = &chip->hwcontrol;
drivers/mtd/nand/nand_util.c
Diff comments   View file @ 482cbd5
... ... @@ -464,6 +464,87 @@
464 464 #endif
465 465  
466 466 /**
  467 + * nand_verify_page_oob:
  468 + *
  469 + * Verify a page of NAND flash, including the OOB.
  470 + * Reads page of NAND and verifies the contents and OOB against the
  471 + * values in ops.
  472 + *
  473 + * @param nand NAND device
  474 + * @param ops MTD operations, including data to verify
  475 + * @param ofs offset in flash
  476 + * @return 0 in case of success
  477 + */
  478 +int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs)
  479 +{
  480 + int rval;
  481 + struct mtd_oob_ops vops;
  482 + size_t verlen = nand->writesize + nand->oobsize;
  483 +
  484 + memcpy(&vops, ops, sizeof(vops));
  485 +
  486 + vops.datbuf = malloc(verlen);
  487 +
  488 + if (!vops.datbuf)
  489 + return -ENOMEM;
  490 +
  491 + vops.oobbuf = vops.datbuf + nand->writesize;
  492 +
  493 + rval = mtd_read_oob(nand, ofs, &vops);
  494 + if (!rval)
  495 + rval = memcmp(ops->datbuf, vops.datbuf, vops.len);
  496 + if (!rval)
  497 + rval = memcmp(ops->oobbuf, vops.oobbuf, vops.ooblen);
  498 +
  499 + free(vops.datbuf);
  500 +
  501 + return rval ? -EIO : 0;
  502 +}
  503 +
  504 +/**
  505 + * nand_verify:
  506 + *
  507 + * Verify a region of NAND flash.
  508 + * Reads NAND in page-sized chunks and verifies the contents against
  509 + * the contents of a buffer. The offset into the NAND must be
  510 + * page-aligned, and the function doesn't handle skipping bad blocks.
  511 + *
  512 + * @param nand NAND device
  513 + * @param ofs offset in flash
  514 + * @param len buffer length
  515 + * @param buf buffer to read from
  516 + * @return 0 in case of success
  517 + */
  518 +int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf)
  519 +{
  520 + int rval = 0;
  521 + size_t verofs;
  522 + size_t verlen = nand->writesize;
  523 + uint8_t *verbuf = malloc(verlen);
  524 +
  525 + if (!verbuf)
  526 + return -ENOMEM;
  527 +
  528 + /* Read the NAND back in page-size groups to limit malloc size */
  529 + for (verofs = ofs; verofs < ofs + len;
  530 + verofs += verlen, buf += verlen) {
  531 + verlen = min(nand->writesize, (uint32_t)(ofs + len - verofs));
  532 + rval = nand_read(nand, verofs, &verlen, verbuf);
  533 + if (!rval || (rval == -EUCLEAN))
  534 + rval = memcmp(buf, verbuf, verlen);
  535 +
  536 + if (rval)
  537 + break;
  538 + }
  539 +
  540 + free(verbuf);
  541 +
  542 + return rval ? -EIO : 0;
  543 +}
  544 +
  545 +
  546 +
  547 +/**
467 548 * nand_write_skip_bad:
468 549 *
469 550 * Write image to NAND flash.
470 551  
... ... @@ -499,25 +580,8 @@
499 580 if (actual)
500 581 *actual = 0;
501 582  
502   -#ifdef CONFIG_CMD_NAND_YAFFS
503   - if (flags & WITH_YAFFS_OOB) {
504   - if (flags & ~WITH_YAFFS_OOB)
505   - return -EINVAL;
  583 + blocksize = nand->erasesize;
506 584  
507   - int pages;
508   - pages = nand->erasesize / nand->writesize;
509   - blocksize = (pages * nand->oobsize) + nand->erasesize;
510   - if (*length % (nand->writesize + nand->oobsize)) {
511   - printf("Attempt to write incomplete page"
512   - " in yaffs mode\n");
513   - return -EINVAL;
514   - }
515   - } else
516   -#endif
517   - {
518   - blocksize = nand->erasesize;
519   - }
520   -
521 585 /*
522 586 * nand_write() handles unaligned, partial page writes.
523 587 *
... ... @@ -554,6 +618,10 @@
554 618  
555 619 if (!need_skip && !(flags & WITH_DROP_FFS)) {
556 620 rval = nand_write(nand, offset, length, buffer);
  621 +
  622 + if ((flags & WITH_WR_VERIFY) && !rval)
  623 + rval = nand_verify(nand, offset, *length, buffer);
  624 +
557 625 if (rval == 0)
558 626 return 0;
559 627  
560 628  
561 629  
... ... @@ -581,48 +649,22 @@
581 649 else
582 650 write_size = blocksize - block_offset;
583 651  
584   -#ifdef CONFIG_CMD_NAND_YAFFS
585   - if (flags & WITH_YAFFS_OOB) {
586   - int page, pages;
587   - size_t pagesize = nand->writesize;
588   - size_t pagesize_oob = pagesize + nand->oobsize;
589   - struct mtd_oob_ops ops;
590   -
591   - ops.len = pagesize;
592   - ops.ooblen = nand->oobsize;
593   - ops.mode = MTD_OPS_AUTO_OOB;
594   - ops.ooboffs = 0;
595   -
596   - pages = write_size / pagesize_oob;
597   - for (page = 0; page < pages; page++) {
598   - WATCHDOG_RESET();
599   -
600   - ops.datbuf = p_buffer;
601   - ops.oobbuf = ops.datbuf + pagesize;
602   -
603   - rval = mtd_write_oob(nand, offset, &ops);
604   - if (rval != 0)
605   - break;
606   -
607   - offset += pagesize;
608   - p_buffer += pagesize_oob;
609   - }
610   - }
611   - else
612   -#endif
613   - {
614   - truncated_write_size = write_size;
  652 + truncated_write_size = write_size;
615 653 #ifdef CONFIG_CMD_NAND_TRIMFFS
616   - if (flags & WITH_DROP_FFS)
617   - truncated_write_size = drop_ffs(nand, p_buffer,
618   - &write_size);
  654 + if (flags & WITH_DROP_FFS)
  655 + truncated_write_size = drop_ffs(nand, p_buffer,
  656 + &write_size);
619 657 #endif
620 658  
621   - rval = nand_write(nand, offset, &truncated_write_size,
622   - p_buffer);
623   - offset += write_size;
624   - p_buffer += write_size;
625   - }
  659 + rval = nand_write(nand, offset, &truncated_write_size,
  660 + p_buffer);
  661 +
  662 + if ((flags & WITH_WR_VERIFY) && !rval)
  663 + rval = nand_verify(nand, offset,
  664 + truncated_write_size, p_buffer);
  665 +
  666 + offset += write_size;
  667 + p_buffer += write_size;
626 668  
627 669 if (rval != 0) {
628 670 printf("NAND write to offset %llx failed %d\n",
drivers/mtd/nand/ndfc.c
Diff comments   View file @ 482cbd5
... ... @@ -118,21 +118,6 @@
118 118 out_be32((u32 *)(base + NDFC_DATA), *p++);
119 119 }
120 120  
121   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
122   -static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
123   -{
124   - struct nand_chip *this = mtdinfo->priv;
125   - ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
126   - uint32_t *p = (uint32_t *) buf;
127   -
128   - for (; len > 0; len -= 4)
129   - if (*p++ != in_be32((u32 *)(base + NDFC_DATA)))
130   - return -1;
131   -
132   - return 0;
133   -}
134   -#endif
135   -
136 121 /*
137 122 * Read a byte from the NDFC.
138 123 */
... ... @@ -207,9 +192,6 @@
207 192 #endif
208 193  
209 194 nand->write_buf = ndfc_write_buf;
210   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
211   - nand->verify_buf = ndfc_verify_buf;
212   -#endif
213 195 nand->read_byte = ndfc_read_byte;
214 196  
215 197 chip++;
drivers/mtd/nand/vf610_nfc.c
Diff comments   View file @ 482cbd5
... ... @@ -146,6 +146,7 @@
146 146 void __iomem *regs;
147 147 uint column;
148 148 int spareonly;
  149 + int page_sz;
149 150 int page;
150 151 /* Status and ID are in alternate locations. */
151 152 int alt_buf;
... ... @@ -329,6 +330,11 @@
329 330 ROW_ADDR_SHIFT, page);
330 331 }
331 332  
  333 +static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)
  334 +{
  335 + __raw_writel(size, regbase + NFC_SECTOR_SIZE);
  336 +}
  337 +
332 338 /* Send command to NAND chip */
333 339 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,
334 340 int column, int page)
335 341  
... ... @@ -342,12 +348,14 @@
342 348 switch (command) {
343 349 case NAND_CMD_PAGEPROG:
344 350 nfc->page = -1;
  351 + vf610_nfc_transfer_size(nfc->regs, nfc->page_sz);
345 352 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN,
346 353 command, PROGRAM_PAGE_CMD_CODE);
347 354 vf610_nfc_addr_cycle(mtd, column, page);
348 355 break;
349 356  
350 357 case NAND_CMD_RESET:
  358 + vf610_nfc_transfer_size(nfc->regs, 0);
351 359 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE);
352 360 break;
353 361 /*
354 362  
... ... @@ -363,14 +371,15 @@
363 371 if (nfc->page == page)
364 372 return;
365 373 nfc->page = page;
  374 + vf610_nfc_transfer_size(nfc->regs, nfc->page_sz);
366 375 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
367 376 NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
368 377 vf610_nfc_addr_cycle(mtd, column, page);
369 378 break;
370 379  
371 380 case NAND_CMD_ERASE1:
372   - if (nfc->page == page)
373   - nfc->page = -1;
  381 + nfc->page = -1;
  382 + vf610_nfc_transfer_size(nfc->regs, 0);
374 383 vf610_nfc_send_commands(nfc->regs, command,
375 384 NAND_CMD_ERASE2, ERASE_CMD_CODE);
376 385 vf610_nfc_addr_cycle(mtd, column, page);
377 386  
... ... @@ -378,11 +387,13 @@
378 387  
379 388 case NAND_CMD_READID:
380 389 nfc->alt_buf = ALT_BUF_ID;
  390 + vf610_nfc_transfer_size(nfc->regs, 0);
381 391 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE);
382 392 break;
383 393  
384 394 case NAND_CMD_STATUS:
385 395 nfc->alt_buf = ALT_BUF_STAT;
  396 + vf610_nfc_transfer_size(nfc->regs, 0);
386 397 vf610_nfc_send_command(nfc->regs, command,
387 398 STATUS_READ_CMD_CODE);
388 399 break;
... ... @@ -580,7 +591,6 @@
580 591 struct nand_chip *chip;
581 592 struct vf610_nfc *nfc;
582 593 int err = 0;
583   - int page_sz;
584 594 struct vf610_nfc_config cfg = {
585 595 .hardware_ecc = 1,
586 596 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
... ... @@ -634,9 +644,8 @@
634 644 chip->bbt_td = &bbt_main_descr;
635 645 chip->bbt_md = &bbt_mirror_descr;
636 646  
637   - page_sz = PAGE_2K + OOB_64;
638   - page_sz += cfg.width == 16 ? 1 : 0;
639   - vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz);
  647 + nfc->page_sz = PAGE_2K + OOB_64;
  648 + nfc->page_sz += cfg.width == 16 ? 1 : 0;
640 649  
641 650 /* Set configuration register. */
642 651 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
643 652  
644 653  
... ... @@ -665,16 +674,15 @@
665 674  
666 675 chip->ecc.mode = NAND_ECC_SOFT; /* default */
667 676  
668   - page_sz = mtd->writesize + mtd->oobsize;
  677 + nfc->page_sz = mtd->writesize + mtd->oobsize;
669 678  
670 679 /* Single buffer only, max 256 OOB minus ECC status */
671   - if (page_sz > PAGE_2K + 256 - 8) {
  680 + if (nfc->page_sz > PAGE_2K + 256 - 8) {
672 681 dev_err(nfc->dev, "Unsupported flash size\n");
673 682 err = -ENXIO;
674 683 goto error;
675 684 }
676   - page_sz += cfg.width == 16 ? 1 : 0;
677   - vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz);
  685 + nfc->page_sz += cfg.width == 16 ? 1 : 0;
678 686  
679 687 if (cfg.hardware_ecc) {
680 688 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
include/configs/B4860QDS.h
Diff comments   View file @ 482cbd5
... ... @@ -391,7 +391,6 @@
391 391  
392 392 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
393 393 #define CONFIG_SYS_MAX_NAND_DEVICE 1
394   -#define CONFIG_MTD_NAND_VERIFY_WRITE
395 394 #define CONFIG_CMD_NAND
396 395  
397 396 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/BSC9131RDB.h
Diff comments   View file @ 482cbd5
... ... @@ -198,7 +198,6 @@
198 198  
199 199 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
200 200 #define CONFIG_SYS_MAX_NAND_DEVICE 1
201   -#define CONFIG_MTD_NAND_VERIFY_WRITE
202 201 #define CONFIG_CMD_NAND
203 202 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
204 203  
include/configs/BSC9132QDS.h
Diff comments   View file @ 482cbd5
... ... @@ -320,7 +320,6 @@
320 320 /* NAND */
321 321 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
322 322 #define CONFIG_SYS_MAX_NAND_DEVICE 1
323   -#define CONFIG_MTD_NAND_VERIFY_WRITE
324 323 #define CONFIG_CMD_NAND
325 324  
326 325 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/C29XPCIE.h
Diff comments   View file @ 482cbd5
... ... @@ -234,7 +234,6 @@
234 234 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
235 235  
236 236 #define CONFIG_SYS_MAX_NAND_DEVICE 1
237   -#define CONFIG_MTD_NAND_VERIFY_WRITE
238 237 #define CONFIG_CMD_NAND
239 238 #define CONFIG_SYS_NAND_BLOCK_SIZE (1024 * 1024)
240 239  
include/configs/M54418TWR.h
Diff comments   View file @ 482cbd5
... ... @@ -53,7 +53,6 @@
53 53 #define CONFIG_CMD_MISC
54 54 #define CONFIG_CMD_MII
55 55 #undef CONFIG_CMD_NAND
56   -#undef CONFIG_CMD_NAND_YAFFS
57 56 #define CONFIG_CMD_NET
58 57 #define CONFIG_CMD_NFS
59 58 #define CONFIG_CMD_PING
include/configs/MPC8313ERDB.h
Diff comments   View file @ 482cbd5
... ... @@ -272,7 +272,6 @@
272 272 "mtdparts=e2800000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
273 273  
274 274 #define CONFIG_SYS_MAX_NAND_DEVICE 1
275   -#define CONFIG_MTD_NAND_VERIFY_WRITE
276 275 #define CONFIG_CMD_NAND 1
277 276 #define CONFIG_NAND_FSL_ELBC 1
278 277 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
include/configs/MPC8315ERDB.h
Diff comments   View file @ 482cbd5
... ... @@ -245,7 +245,6 @@
245 245 "mtdparts=e0600000.flash:512k(uboot),128k(env),3m@1m(kernel),-(fs)"
246 246  
247 247 #define CONFIG_SYS_MAX_NAND_DEVICE 1
248   -#define CONFIG_MTD_NAND_VERIFY_WRITE 1
249 248 #define CONFIG_CMD_NAND 1
250 249 #define CONFIG_NAND_FSL_ELBC 1
251 250 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
include/configs/MPC837XEMDS.h
Diff comments   View file @ 482cbd5
... ... @@ -283,7 +283,6 @@
283 283 * NAND Flash on the Local Bus
284 284 */
285 285 #define CONFIG_CMD_NAND 1
286   -#define CONFIG_MTD_NAND_VERIFY_WRITE 1
287 286 #define CONFIG_SYS_MAX_NAND_DEVICE 1
288 287 #define CONFIG_NAND_FSL_ELBC 1
289 288  
include/configs/MPC8536DS.h
Diff comments   View file @ 482cbd5
... ... @@ -308,7 +308,6 @@
308 308 CONFIG_SYS_NAND_BASE + 0x80000, \
309 309 CONFIG_SYS_NAND_BASE + 0xC0000}
310 310 #define CONFIG_SYS_MAX_NAND_DEVICE 4
311   -#define CONFIG_MTD_NAND_VERIFY_WRITE
312 311 #define CONFIG_CMD_NAND 1
313 312 #define CONFIG_NAND_FSL_ELBC 1
314 313 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/MPC8569MDS.h
Diff comments   View file @ 482cbd5
... ... @@ -194,7 +194,6 @@
194 194 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
195 195 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
196 196 #define CONFIG_SYS_MAX_NAND_DEVICE 1
197   -#define CONFIG_MTD_NAND_VERIFY_WRITE 1
198 197 #define CONFIG_CMD_NAND 1
199 198 #define CONFIG_NAND_FSL_ELBC 1
200 199 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/MPC8572DS.h
Diff comments   View file @ 482cbd5
... ... @@ -303,7 +303,6 @@
303 303 CONFIG_SYS_NAND_BASE + 0x80000,\
304 304 CONFIG_SYS_NAND_BASE + 0xC0000}
305 305 #define CONFIG_SYS_MAX_NAND_DEVICE 4
306   -#define CONFIG_MTD_NAND_VERIFY_WRITE
307 306 #define CONFIG_CMD_NAND 1
308 307 #define CONFIG_NAND_FSL_ELBC 1
309 308 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/P1010RDB.h
Diff comments   View file @ 482cbd5
... ... @@ -444,7 +444,6 @@
444 444  
445 445 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
446 446 #define CONFIG_SYS_MAX_NAND_DEVICE 1
447   -#define CONFIG_MTD_NAND_VERIFY_WRITE
448 447 #define CONFIG_CMD_NAND
449 448  
450 449 #if defined(CONFIG_P1010RDB_PA)
include/configs/P1022DS.h
Diff comments   View file @ 482cbd5
... ... @@ -290,7 +290,6 @@
290 290  
291 291 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
292 292 #define CONFIG_SYS_MAX_NAND_DEVICE 1
293   -#define CONFIG_MTD_NAND_VERIFY_WRITE
294 293 #define CONFIG_CMD_NAND 1
295 294 #define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
296 295 #define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
include/configs/P1023RDB.h
Diff comments   View file @ 482cbd5
... ... @@ -136,7 +136,6 @@
136 136  
137 137 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
138 138 #define CONFIG_SYS_MAX_NAND_DEVICE 1
139   -#define CONFIG_MTD_NAND_VERIFY_WRITE
140 139 #define CONFIG_CMD_NAND
141 140 #define CONFIG_NAND_FSL_ELBC
142 141 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/P2041RDB.h
Diff comments   View file @ 482cbd5
... ... @@ -251,7 +251,6 @@
251 251  
252 252 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
253 253 #define CONFIG_SYS_MAX_NAND_DEVICE 1
254   -#define CONFIG_MTD_NAND_VERIFY_WRITE
255 254 #define CONFIG_CMD_NAND
256 255 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
257 256  
include/configs/T102xQDS.h
Diff comments   View file @ 482cbd5
... ... @@ -398,7 +398,6 @@
398 398 #define CONFIG_SYS_NAND_DDR_LAW 11
399 399 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
400 400 #define CONFIG_SYS_MAX_NAND_DEVICE 1
401   -#define CONFIG_MTD_NAND_VERIFY_WRITE
402 401 #define CONFIG_CMD_NAND
403 402  
404 403 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/T102xRDB.h
Diff comments   View file @ 482cbd5
... ... @@ -379,7 +379,6 @@
379 379 #define CONFIG_SYS_NAND_DDR_LAW 11
380 380 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
381 381 #define CONFIG_SYS_MAX_NAND_DEVICE 1
382   -#define CONFIG_MTD_NAND_VERIFY_WRITE
383 382 #define CONFIG_CMD_NAND
384 383  
385 384 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
include/configs/T1040QDS.h
Diff comments   View file @ 482cbd5
... ... @@ -308,7 +308,6 @@
308 308 #define CONFIG_SYS_NAND_DDR_LAW 11
309 309 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
310 310 #define CONFIG_SYS_MAX_NAND_DEVICE 1
311   -#define CONFIG_MTD_NAND_VERIFY_WRITE
312 311 #define CONFIG_CMD_NAND
313 312  
314 313 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/T104xRDB.h
Diff comments   View file @ 482cbd5
... ... @@ -341,7 +341,6 @@
341 341 #define CONFIG_SYS_NAND_DDR_LAW 11
342 342 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
343 343 #define CONFIG_SYS_MAX_NAND_DEVICE 1
344   -#define CONFIG_MTD_NAND_VERIFY_WRITE
345 344 #define CONFIG_CMD_NAND
346 345  
347 346 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
include/configs/T208xQDS.h
Diff comments   View file @ 482cbd5
... ... @@ -357,7 +357,6 @@
357 357 #define CONFIG_SYS_NAND_DDR_LAW 11
358 358 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
359 359 #define CONFIG_SYS_MAX_NAND_DEVICE 1
360   -#define CONFIG_MTD_NAND_VERIFY_WRITE
361 360 #define CONFIG_CMD_NAND
362 361 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
363 362  
include/configs/T208xRDB.h
Diff comments   View file @ 482cbd5
... ... @@ -328,7 +328,6 @@
328 328 #define CONFIG_SYS_NAND_DDR_LAW 11
329 329 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
330 330 #define CONFIG_SYS_MAX_NAND_DEVICE 1
331   -#define CONFIG_MTD_NAND_VERIFY_WRITE
332 331 #define CONFIG_CMD_NAND
333 332 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
334 333  
include/configs/T4240QDS.h
Diff comments   View file @ 482cbd5
... ... @@ -281,7 +281,6 @@
281 281  
282 282 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
283 283 #define CONFIG_SYS_MAX_NAND_DEVICE 1
284   -#define CONFIG_MTD_NAND_VERIFY_WRITE
285 284 #define CONFIG_CMD_NAND
286 285  
287 286 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/T4240RDB.h
Diff comments   View file @ 482cbd5
... ... @@ -467,7 +467,6 @@
467 467 #define CONFIG_SYS_NAND_DDR_LAW 11
468 468 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
469 469 #define CONFIG_SYS_MAX_NAND_DEVICE 1
470   -#define CONFIG_MTD_NAND_VERIFY_WRITE
471 470 #define CONFIG_CMD_NAND
472 471  
473 472 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
include/configs/VCMA9.h
Diff comments   View file @ 482cbd5
... ... @@ -62,7 +62,6 @@
62 62 #define CONFIG_CMD_PING
63 63 #define CONFIG_CMD_BSP
64 64 #define CONFIG_CMD_NAND
65   -#define CONFIG_CMD_NAND_YAFFS
66 65  
67 66 #define CONFIG_BOARD_LATE_INIT
68 67  
include/configs/corenet_ds.h
Diff comments   View file @ 482cbd5
... ... @@ -248,7 +248,6 @@
248 248  
249 249 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
250 250 #define CONFIG_SYS_MAX_NAND_DEVICE 1
251   -#define CONFIG_MTD_NAND_VERIFY_WRITE
252 251 #define CONFIG_CMD_NAND
253 252 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
254 253  
include/configs/ethernut5.h
Diff comments   View file @ 482cbd5
... ... @@ -153,7 +153,6 @@
153 153  
154 154 /* JFFS2 */
155 155 #ifdef CONFIG_CMD_JFFS2
156   -#define CONFIG_MTD_NAND_ECC_JFFS2
157 156 #define CONFIG_JFFS2_CMDLINE
158 157 #define CONFIG_JFFS2_NAND
159 158 #endif
include/configs/ids8313.h
Diff comments   View file @ 482cbd5
... ... @@ -214,7 +214,6 @@
214 214 #define CONFIG_SYS_NAND_BASE 0xE1000000
215 215 #define CONFIG_SYS_MAX_NAND_DEVICE 1
216 216 #define CONFIG_SYS_NAND_MAX_CHIPS 1
217   -#define CONFIG_MTD_NAND_VERIFY_WRITE
218 217 #define CONFIG_NAND_FSL_ELBC
219 218 #define CONFIG_SYS_NAND_PAGE_SIZE (2048)
220 219 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
include/configs/km/kmp204x-common.h
Diff comments   View file @ 482cbd5
... ... @@ -167,7 +167,6 @@
167 167  
168 168 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
169 169 #define CONFIG_SYS_MAX_NAND_DEVICE 1
170   -#define CONFIG_MTD_NAND_VERIFY_WRITE
171 170 #define CONFIG_CMD_NAND
172 171 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
173 172  
include/configs/ls1021aqds.h
Diff comments   View file @ 482cbd5
... ... @@ -251,7 +251,6 @@
251 251  
252 252 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
253 253 #define CONFIG_SYS_MAX_NAND_DEVICE 1
254   -#define CONFIG_MTD_NAND_VERIFY_WRITE
255 254 #define CONFIG_CMD_NAND
256 255  
257 256 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/ls2085a_common.h
Diff comments   View file @ 482cbd5
... ... @@ -191,7 +191,6 @@
191 191  
192 192 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
193 193 #define CONFIG_SYS_MAX_NAND_DEVICE 1
194   -#define CONFIG_MTD_NAND_VERIFY_WRITE
195 194 #define CONFIG_CMD_NAND
196 195  
197 196 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/p1_p2_rdb_pc.h
Diff comments   View file @ 482cbd5
... ... @@ -494,7 +494,6 @@
494 494  
495 495 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
496 496 #define CONFIG_SYS_MAX_NAND_DEVICE 1
497   -#define CONFIG_MTD_NAND_VERIFY_WRITE
498 497 #define CONFIG_CMD_NAND
499 498 #if defined(CONFIG_P1020RDB_PD)
500 499 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
include/configs/ve8313.h
Diff comments   View file @ 482cbd5
... ... @@ -186,7 +186,6 @@
186 186 */
187 187 #define CONFIG_SYS_NAND_BASE 0x61000000
188 188 #define CONFIG_SYS_MAX_NAND_DEVICE 1
189   -#define CONFIG_MTD_NAND_VERIFY_WRITE
190 189 #define CONFIG_CMD_NAND 1
191 190 #define CONFIG_NAND_FSL_ELBC 1
192 191 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
include/configs/xpedite537x.h
Diff comments   View file @ 482cbd5
... ... @@ -131,7 +131,6 @@
131 131 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
132 132 CONFIG_SYS_NAND_BASE2}
133 133 #define CONFIG_SYS_MAX_NAND_DEVICE 2
134   -#define CONFIG_MTD_NAND_VERIFY_WRITE
135 134 #define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
136 135 #define CONFIG_NAND_FSL_ELBC
137 136  
include/configs/xpedite550x.h
Diff comments   View file @ 482cbd5
... ... @@ -122,7 +122,6 @@
122 122 #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
123 123 CONFIG_SYS_NAND_BASE2}
124 124 #define CONFIG_SYS_MAX_NAND_DEVICE 2
125   -#define CONFIG_MTD_NAND_VERIFY_WRITE
126 125 #define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */
127 126 #define CONFIG_NAND_FSL_ELBC
128 127  
include/linux/mtd/nand.h
Diff comments   View file @ 482cbd5
... ... @@ -678,11 +678,6 @@
678 678 void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
679 679 void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
680 680 void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
681   -#ifdef __UBOOT__
682   -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
683   - int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
684   -#endif
685   -#endif
686 681 void (*select_chip)(struct mtd_info *mtd, int chip);
687 682 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
688 683 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
... ... @@ -82,34 +82,8 @@
82 82 * declarations from nand_util.c
83 83 ****************************************************************************/
84 84  
85   -struct nand_write_options {
86   - u_char *buffer; /* memory block containing image to write */
87   - ulong length; /* number of bytes to write */
88   - ulong offset; /* start address in NAND */
89   - int quiet; /* don't display progress messages */
90   - int autoplace; /* if true use auto oob layout */
91   - int forcejffs2; /* force jffs2 oob layout */
92   - int forceyaffs; /* force yaffs oob layout */
93   - int noecc; /* write without ecc */
94   - int writeoob; /* image contains oob data */
95   - int pad; /* pad to page size */
96   - int blockalign; /* 1|2|4 set multiple of eraseblocks
97   - * to align to */
98   -};
99   -
100   -typedef struct nand_write_options nand_write_options_t;
101 85 typedef struct mtd_oob_ops mtd_oob_ops_t;
102 86  
103   -struct nand_read_options {
104   - u_char *buffer; /* memory block in which read image is written*/
105   - ulong length; /* number of bytes to read */
106   - ulong offset; /* start address in NAND */
107   - int quiet; /* don't display progress messages */
108   - int readoob; /* put oob data in image */
109   -};
110   -
111   -typedef struct nand_read_options nand_read_options_t;
112   -
113 87 struct nand_erase_options {
114 88 loff_t length; /* number of bytes to erase */
115 89 loff_t offset; /* first address in NAND to erase */
116 90  
... ... @@ -130,15 +104,16 @@
130 104 int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
131 105 size_t *actual, loff_t lim, u_char *buffer);
132 106  
133   -#define WITH_YAFFS_OOB (1 << 0) /* whether write with yaffs format. This flag
134   - * is a 'mode' meaning it cannot be mixed with
135   - * other flags */
136   -#define WITH_DROP_FFS (1 << 1) /* drop trailing all-0xff pages */
  107 +#define WITH_DROP_FFS (1 << 0) /* drop trailing all-0xff pages */
  108 +#define WITH_WR_VERIFY (1 << 1) /* verify data was written correctly */
137 109  
138 110 int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
139 111 size_t *actual, loff_t lim, u_char *buffer, int flags);
140 112 int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts);
141 113 int nand_torture(nand_info_t *nand, loff_t offset);
  114 +int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops,
  115 + loff_t ofs);
  116 +int nand_verify(nand_info_t *nand, loff_t ofs, size_t len, u_char *buf);
142 117  
143 118 #define NAND_LOCK_STATUS_TIGHT 0x01
144 119 #define NAND_LOCK_STATUS_UNLOCK 0x04