powerpc/p1010rdb: update mux config of p1010rdb board

On p1010rdb some signals are muxed for tdm/can/uart/flash. If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly, defaultly we keep spi chip selection to spi-flash instead of to tdm/slic and disable uart1 when not using flexcan, as well disable sdhc. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>

powerpc/p1010rdb: update mux config of p1010rdb board
On p1010rdb some signals are muxed for tdm/can/uart/flash. If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly, defaultly we keep spi chip selection to spi-flash instead of to tdm/slic and disable uart1 when not using flexcan, as well disable sdhc. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Shengzhou Liu · Andy Fleming
1 parent 7530d341c7
Showing 1 changed file with 44 additions and 12 deletions Side-by-side Diff
board/freescale/p1010rdb/p1010rdb.c
@@ -252,6 +252,31 @@
 	}
 }
  
+void fdt_del_sdhc(void *blob)
+{
+	int nodeoff = 0;
+
+	while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+			"fsl,esdhc")) >= 0) {
+		fdt_del_node(blob, nodeoff);
+	}
+}
+
+void fdt_disable_uart1(void *blob)
+{
+	int nodeoff;
+
+	nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,ns16550",
+					CONFIG_SYS_NS16550_COM2);
+
+	if (nodeoff > 0) {
+		fdt_status_disabled(blob, nodeoff);
+	} else {
+		printf("WARNING unable to set status for fsl,ns16550 "
+			"uart1: %s\n", fdt_strerror(nodeoff));
+	}
+}
+
 void ft_board_setup(void *blob, bd_t *bd)
 {
 	phys_addr_t base;
  
  
  
  
@@ -281,19 +306,26 @@
 		fdt_del_node_and_alias(blob, "ethernet2");
 	}
 #ifndef CONFIG_SDCARD
+	/* disable sdhc due to sdhc bug */
+	fdt_del_sdhc(blob);
 	if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) {
-		printf("fdt CAN");
 		fdt_del_tdm(blob);
 		fdt_del_spi_slic(blob);
-	}
-#ifndef CONFIG_SPIFLASH
-	else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
-		printf("fdt TDM");
+	} else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
 		fdt_del_flexcan(blob);
 		fdt_del_spi_flash(blob);
+		fdt_disable_uart1(blob);
+	} else {
+		/*
+		 * If we don't set fsl_p1010mux:tdm_can to "can" or "tdm"
+		 * explicitly, defaultly spi_cs_sel to spi-flash instead of
+		 * to tdm/slic.
+		 */
+		fdt_del_tdm(blob);
+		fdt_del_flexcan(blob);
+		fdt_disable_uart1(blob);
 	}
 #endif
-#endif
 }
 #endif
  
@@ -309,10 +341,7 @@
 				MPC85xx_PMUXCR_CAN2_TDM |
 				MPC85xx_PMUXCR_CAN2_UART);
 		out_8(&cpld_data->tdm_can_sel, MUX_CPLD_CAN_UART);
-	}
-#ifndef CONFIG_SPIFLASH
-		if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
-			printf("TDM");
+	} else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
 		clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_UART |
 				MPC85xx_PMUXCR_CAN1_UART);
 		setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_TDM |
@@ -321,8 +350,11 @@
 		setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_TDM);
 		out_8(&cpld_data->tdm_can_sel, MUX_CPLD_TDM);
 		out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_SLIC);
-		}
-#endif
+	} else {
+		/* defaultly spi_cs_sel to flash */
+		out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_FLASH);
+	}
+
 	return 0;
 }
 #endif
...	...	@@ -252,6 +252,31 @@
252	252	}
253	253	}
254	254
	255	+void fdt_del_sdhc(void *blob)
	256	+{
	257	+ int nodeoff = 0;
	258	+
	259	+ while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
	260	+ "fsl,esdhc")) >= 0) {
	261	+ fdt_del_node(blob, nodeoff);
	262	+ }
	263	+}
	264	+
	265	+void fdt_disable_uart1(void *blob)
	266	+{
	267	+ int nodeoff;
	268	+
	269	+ nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,ns16550",
	270	+ CONFIG_SYS_NS16550_COM2);
	271	+
	272	+ if (nodeoff > 0) {
	273	+ fdt_status_disabled(blob, nodeoff);
	274	+ } else {
	275	+ printf("WARNING unable to set status for fsl,ns16550 "
	276	+ "uart1: %s\n", fdt_strerror(nodeoff));
	277	+ }
	278	+}
	279	+
255	280	void ft_board_setup(void blob, bd_t bd)
256	281	{
257	282	phys_addr_t base;
258	283
259	284
260	285
261	286
...	...	@@ -281,19 +306,26 @@
281	306	fdt_del_node_and_alias(blob, "ethernet2");
282	307	}
283	308	#ifndef CONFIG_SDCARD
	309	+ /* disable sdhc due to sdhc bug */
	310	+ fdt_del_sdhc(blob);
284	311	if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) {
285		- printf("fdt CAN");
286	312	fdt_del_tdm(blob);
287	313	fdt_del_spi_slic(blob);
288		- }
289		-#ifndef CONFIG_SPIFLASH
290		- else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
291		- printf("fdt TDM");
	314	+ } else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
292	315	fdt_del_flexcan(blob);
293	316	fdt_del_spi_flash(blob);
	317	+ fdt_disable_uart1(blob);
	318	+ } else {
	319	+ /*
	320	+ * If we don't set fsl_p1010mux:tdm_can to "can" or "tdm"
	321	+ * explicitly, defaultly spi_cs_sel to spi-flash instead of
	322	+ * to tdm/slic.
	323	+ */
	324	+ fdt_del_tdm(blob);
	325	+ fdt_del_flexcan(blob);
	326	+ fdt_disable_uart1(blob);
294	327	}
295	328	#endif
296		-#endif
297	329	}
298	330	#endif
299	331
...	...	@@ -309,10 +341,7 @@
309	341	MPC85xx_PMUXCR_CAN2_TDM \|
310	342	MPC85xx_PMUXCR_CAN2_UART);
311	343	out_8(&cpld_data->tdm_can_sel, MUX_CPLD_CAN_UART);
312		- }
313		-#ifndef CONFIG_SPIFLASH
314		- if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
315		- printf("TDM");
	344	+ } else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
316	345	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_UART \|
317	346	MPC85xx_PMUXCR_CAN1_UART);
318	347	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_TDM \|
...	...	@@ -321,8 +350,11 @@
321	350	setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_TDM);
322	351	out_8(&cpld_data->tdm_can_sel, MUX_CPLD_TDM);
323	352	out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_SLIC);
324		- }
325		-#endif
	353	+ } else {
	354	+ /* defaultly spi_cs_sel to flash */
	355	+ out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_FLASH);
	356	+ }
	357	+
326	358	return 0;
327	359	}
328	360	#endif