Commit 4a732af597df87db74e386190fd90b20931b7205

Authored by Ye Li
1 parent 1d72b97d94

MLK-19960-3 imx8mm: power down core 1/2/3 for variant parts

Power down the A53 cores for dual core and single core iMX8MM parts
to save power.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Showing 1 changed file with 9 additions and 3 deletions Side-by-side Diff

arch/arm/mach-imx/imx8m/soc.c
... ... @@ -248,15 +248,21 @@
248 248 clock_init();
249 249 imx_set_wdog_powerdown(false);
250 250  
251   - if (is_imx8md()) {
252   - /* Power down cpu core 2 and 3 for iMX8MD */
  251 + if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() || is_imx8mmsl()) {
  252 + /* Power down cpu core 1, 2 and 3 for iMX8M Dual core or Single core */
  253 + struct pgc_reg *pgc_core1 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x840);
253 254 struct pgc_reg *pgc_core2 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x880);
254 255 struct pgc_reg *pgc_core3 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x8C0);
255 256 struct gpc_reg *gpc = (struct gpc_reg *)GPC_BASE_ADDR;
256 257  
257 258 writel(0x1, &pgc_core2->pgcr);
258 259 writel(0x1, &pgc_core3->pgcr);
259   - writel(0xC, &gpc->cpu_pgc_dn_trg);
  260 + if (is_imx8mms() || is_imx8mmsl()) {
  261 + writel(0x1, &pgc_core1->pgcr);
  262 + writel(0xE, &gpc->cpu_pgc_dn_trg);
  263 + } else {
  264 + writel(0xC, &gpc->cpu_pgc_dn_trg);
  265 + }
260 266 }
261 267 }
262 268