Eric Lee / smarc-uboot

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Commit 4aeb251f90f3c13b9a3c68c4f296fa871c77f314

Authored by wdenk
1 parent acf98e7f30
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

* Modify XLB arbiter priorities on MPC5200 so all devices use same 

priority; configure critical interrupts to be handled like external
  interrupts

Showing 4 changed files with 17 additions and 1 deletions Side-by-side Diff

... ... @@ -2,6 +2,10 @@
2 2 Changes for U-Boot 1.0.0:
3 3 ======================================================================
4 4  
  5 +* Modify XLB arbiter priorities on MPC5200 so all devices use same
  6 + priority; configure critical interrupts to be handled like external
  7 + interrupts
  8 +
5 9 * Make IPB clock on MGT5100/MPC5200 configurable in board config file;
6 10 go back to 66 MHz for stability
7 11  
... ... @@ -102,7 +102,7 @@
102 102 DBGFLAGS= -g #-DDEBUG
103 103 OPTFLAGS= -Os #-fomit-frame-pointer
104 104 ifndef LDSCRIPT
105   -#LDSCRIPT := board/$(BOARDDIR)/u-boot.lds.debug
  105 +#LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug
106 106 LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
107 107 endif
108 108 OBJCFLAGS += --gap-fill=0xff
cpu/mpc5xxx/cpu_init.c
Diff comments   View file @ 4aeb251
... ... @@ -161,6 +161,9 @@
161 161 addecr |= 0x02;
162 162 *(vu_long *)MPC5XXX_CDM_CFG = addecr;
163 163 #endif
  164 + /* Configure the XLB Arbiter */
  165 + *(vu_long *)MPC5XXX_XLBARB_MPRIEN = 0xff;
  166 + *(vu_long *)MPC5XXX_XLBARB_MPRIVAL = 0x11111111;
164 167 #endif
165 168 }
166 169  
... ... @@ -177,6 +180,8 @@
177 180 #endif
178 181 *(vu_long *)MPC5XXX_ICTL_CRIT |= 0x0001ffff;
179 182 *(vu_long *)MPC5XXX_ICTL_EXT &= ~0x00000f00;
  183 + /* route critical ints to normal ints */
  184 + *(vu_long *)MPC5XXX_ICTL_EXT |= 0x00000001;
180 185  
181 186 #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC5XXX_FEC)
182 187 /* load FEC microcode */
... ... @@ -151,6 +151,13 @@
151 151 #define MPC5XXX_CS_DEADCYCLE (MPC5XXX_LPB + 0x002c)
152 152 #endif
153 153  
  154 +#if defined(CONFIG_MPC5200)
  155 +/* XLB Arbiter registers */
  156 +#define MPC5XXX_XLBARB_CFG (MPC5XXX_XLBARB + 0x40)
  157 +#define MPC5XXX_XLBARB_MPRIEN (MPC5XXX_XLBARB + 0x64)
  158 +#define MPC5XXX_XLBARB_MPRIVAL (MPC5XXX_XLBARB + 0x68)
  159 +#endif
  160 +
154 161 /* GPIO registers */
155 162 #define MPC5XXX_GPS_PORT_CONFIG (MPC5XXX_GPIO + 0x0000)
156 163