Commit 4b0a03d3756c0bb8f25a9b9df3530e4129a6a70c
Committed by
Wolfgang Denk
1 parent
13e95e4230
Exists in
master
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54 other branches
ppc: Fix DBSR_IAx defines in <bedbug/regs.h>
While adding asm/cache.h to common.h for PPC targets, I got an error about multiple definitions of some DBSR_ macros. While scanning these defines, I noticed that some where defined not correctly for all PPC variants. So I removed all unused defines, and corrected the ones really used by bedbug (book-e vs. ppc40x). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Showing 1 changed file with 15 additions and 16 deletions Side-by-side Diff
include/bedbug/regs.h
... | ... | @@ -143,22 +143,21 @@ |
143 | 143 | #define DBCR1_DV1BE 0x0000F000 |
144 | 144 | #define DBCR1_DV2BE 0x00000F00 |
145 | 145 | |
146 | -/* Bits for the DBSR register */ | |
147 | -#define DBSR_IC 0x80000000 | |
148 | -#define DBSR_BT 0x40000000 | |
149 | -#define DBSR_EDE 0x20000000 | |
150 | -#define DBSR_TIE 0x10000000 | |
151 | -#define DBSR_UDE 0x08000000 | |
152 | -#define DBSR_IA1 0x04000000 | |
153 | -#define DBSR_IA2 0x02000000 | |
154 | -#define DBSR_DR1 0x01000000 | |
155 | -#define DBSR_DW1 0x00800000 | |
156 | -#define DBSR_DR2 0x00400000 | |
157 | -#define DBSR_DW2 0x00200000 | |
158 | -#define DBSR_IDE 0x00100000 | |
159 | -#define DBSR_IA3 0x00080000 | |
160 | -#define DBSR_IA4 0x00040000 | |
161 | -#define DBSR_MRR 0x00000300 | |
146 | +/* | |
147 | + * DBSR bits which have conflicting definitions on true Book E versus PPC40x | |
148 | + */ | |
149 | +#ifdef CONFIG_BOOKE | |
150 | +#define DBSR_IA1 0x00800000 /* Instr Address Compare 1 Event */ | |
151 | +#define DBSR_IA2 0x00400000 /* Instr Address Compare 2 Event */ | |
152 | +#define DBSR_IA3 0x00200000 /* Instr Address Compare 3 Event */ | |
153 | +#define DBSR_IA4 0x00100000 /* Instr Address Compare 4 Event */ | |
154 | +#endif | |
155 | +#ifndef CONFIG_440 | |
156 | +#define DBSR_IA1 0x04000000 /* Instr Address Compare 1 Event */ | |
157 | +#define DBSR_IA2 0x02000000 /* Instr Address Compare 2 Event */ | |
158 | +#define DBSR_IA3 0x00080000 /* Instr Address Compare 3 Event */ | |
159 | +#define DBSR_IA4 0x00040000 /* Instr Address Compare 4 Event */ | |
160 | +#endif | |
162 | 161 | |
163 | 162 | struct spr_info { |
164 | 163 | int spr_val; |