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Commit 4bc9b7a56036f7ecf402842e5c381c0ed3bdca4c

Authored by Bo Shen
Committed by Andreas Bießmann
1 parent 77461a6538
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

gpio: atmel: fix code to use pointer for pio port 

fix code to use pointer for pio port as the warning message suggested
remove the warning message

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Showing 1 changed file with 138 additions and 112 deletions Side-by-side Diff

drivers/gpio/at91_gpio.c
Diff comments   View file @ 4bc9b7a
... ... @@ -8,16 +8,6 @@
8 8 * SPDX-License-Identifier: GPL-2.0+
9 9 */
10 10  
11   -/*
12   - * WARNING:
13   - *
14   - * As the code is right now, it expects all PIO ports A,B,C,...
15   - * to be evenly spaced in the memory map:
16   - * ATMEL_BASE_PIOA + port * sizeof at91pio_t
17   - * This might not necessaryly be true in future Atmel SoCs.
18   - * This code should be fixed to use a pointer array to the ports.
19   - */
20   -
21 11 #include <config.h>
22 12 #include <common.h>
23 13 #include <asm/io.h>
24 14  
25 15  
26 16  
27 17  
28 18  
... ... @@ -25,19 +15,42 @@
25 15 #include <asm/arch/hardware.h>
26 16 #include <asm/arch/at91_pio.h>
27 17  
  18 +static struct at91_port *at91_pio_get_port(unsigned port)
  19 +{
  20 + switch (port) {
  21 + case AT91_PIO_PORTA:
  22 + return (struct at91_port *)ATMEL_BASE_PIOA;
  23 + case AT91_PIO_PORTB:
  24 + return (struct at91_port *)ATMEL_BASE_PIOB;
  25 + case AT91_PIO_PORTC:
  26 + return (struct at91_port *)ATMEL_BASE_PIOC;
  27 +#if (ATMEL_PIO_PORTS > 3)
  28 + case AT91_PIO_PORTD:
  29 + return (struct at91_port *)ATMEL_BASE_PIOD;
  30 +#if (ATMEL_PIO_PORTS > 4)
  31 + case AT91_PIO_PORTE:
  32 + return (struct at91_port *)ATMEL_BASE_PIOE;
  33 +#endif
  34 +#endif
  35 + default:
  36 + return NULL;
  37 + }
  38 +}
  39 +
28 40 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
29 41 {
30   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
31   - u32 mask;
  42 + struct at91_port *at91_port = at91_pio_get_port(port);
  43 + u32 mask;
32 44  
33   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  45 + if (at91_port && (pin < 32)) {
34 46 mask = 1 << pin;
35 47 if (use_pullup)
36   - writel(1 << pin, &pio->port[port].puer);
  48 + writel(1 << pin, &at91_port->puer);
37 49 else
38   - writel(1 << pin, &pio->port[port].pudr);
39   - writel(mask, &pio->port[port].per);
  50 + writel(1 << pin, &at91_port->pudr);
  51 + writel(mask, &at91_port->per);
40 52 }
  53 +
41 54 return 0;
42 55 }
43 56  
44 57  
45 58  
46 59  
47 60  
... ... @@ -46,15 +59,16 @@
46 59 */
47 60 int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
48 61 {
49   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
50   - u32 mask;
  62 + struct at91_port *at91_port = at91_pio_get_port(port);
  63 + u32 mask;
51 64  
52   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  65 + if (at91_port && (pin < 32)) {
53 66 mask = 1 << pin;
54   - writel(mask, &pio->port[port].idr);
  67 + writel(mask, &at91_port->idr);
55 68 at91_set_pio_pullup(port, pin, use_pullup);
56   - writel(mask, &pio->port[port].per);
  69 + writel(mask, &at91_port->per);
57 70 }
  71 +
58 72 return 0;
59 73 }
60 74  
61 75  
62 76  
63 77  
64 78  
65 79  
66 80  
... ... @@ -63,23 +77,24 @@
63 77 */
64 78 int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
65 79 {
66   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
67   - u32 mask;
  80 + struct at91_port *at91_port = at91_pio_get_port(port);
  81 + u32 mask;
68 82  
69   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  83 + if (at91_port && (pin < 32)) {
70 84 mask = 1 << pin;
71   - writel(mask, &pio->port[port].idr);
  85 + writel(mask, &at91_port->idr);
72 86 at91_set_pio_pullup(port, pin, use_pullup);
73 87 #if defined(CPU_HAS_PIO3)
74   - writel(readl(&pio->port[port].abcdsr1) & ~mask,
75   - &pio->port[port].abcdsr1);
76   - writel(readl(&pio->port[port].abcdsr2) & ~mask,
77   - &pio->port[port].abcdsr2);
  88 + writel(readl(&at91_port->abcdsr1) & ~mask,
  89 + &at91_port->abcdsr1);
  90 + writel(readl(&at91_port->abcdsr2) & ~mask,
  91 + &at91_port->abcdsr2);
78 92 #else
79   - writel(mask, &pio->port[port].asr);
  93 + writel(mask, &at91_port->asr);
80 94 #endif
81   - writel(mask, &pio->port[port].pdr);
  95 + writel(mask, &at91_port->pdr);
82 96 }
  97 +
83 98 return 0;
84 99 }
85 100  
86 101  
87 102  
88 103  
89 104  
90 105  
91 106  
... ... @@ -88,23 +103,24 @@
88 103 */
89 104 int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
90 105 {
91   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
92   - u32 mask;
  106 + struct at91_port *at91_port = at91_pio_get_port(port);
  107 + u32 mask;
93 108  
94   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  109 + if (at91_port && (pin < 32)) {
95 110 mask = 1 << pin;
96   - writel(mask, &pio->port[port].idr);
  111 + writel(mask, &at91_port->idr);
97 112 at91_set_pio_pullup(port, pin, use_pullup);
98 113 #if defined(CPU_HAS_PIO3)
99   - writel(readl(&pio->port[port].abcdsr1) | mask,
100   - &pio->port[port].abcdsr1);
101   - writel(readl(&pio->port[port].abcdsr2) & ~mask,
102   - &pio->port[port].abcdsr2);
  114 + writel(readl(&at91_port->abcdsr1) | mask,
  115 + &at91_port->abcdsr1);
  116 + writel(readl(&at91_port->abcdsr2) & ~mask,
  117 + &at91_port->abcdsr2);
103 118 #else
104   - writel(mask, &pio->port[port].bsr);
  119 + writel(mask, &at91_port->bsr);
105 120 #endif
106   - writel(mask, &pio->port[port].pdr);
  121 + writel(mask, &at91_port->pdr);
107 122 }
  123 +
108 124 return 0;
109 125 }
110 126  
111 127  
112 128  
113 129  
114 130  
... ... @@ -114,19 +130,20 @@
114 130 */
115 131 int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup)
116 132 {
117   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
118   - u32 mask;
  133 + struct at91_port *at91_port = at91_pio_get_port(port);
  134 + u32 mask;
119 135  
120   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  136 + if (at91_port && (pin < 32)) {
121 137 mask = 1 << pin;
122   - writel(mask, &pio->port[port].idr);
  138 + writel(mask, &at91_port->idr);
123 139 at91_set_pio_pullup(port, pin, use_pullup);
124   - writel(readl(&pio->port[port].abcdsr1) & ~mask,
125   - &pio->port[port].abcdsr1);
126   - writel(readl(&pio->port[port].abcdsr2) | mask,
127   - &pio->port[port].abcdsr2);
128   - writel(mask, &pio->port[port].pdr);
  140 + writel(readl(&at91_port->abcdsr1) & ~mask,
  141 + &at91_port->abcdsr1);
  142 + writel(readl(&at91_port->abcdsr2) | mask,
  143 + &at91_port->abcdsr2);
  144 + writel(mask, &at91_port->pdr);
129 145 }
  146 +
130 147 return 0;
131 148 }
132 149  
133 150  
134 151  
135 152  
136 153  
... ... @@ -135,19 +152,20 @@
135 152 */
136 153 int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup)
137 154 {
138   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
139   - u32 mask;
  155 + struct at91_port *at91_port = at91_pio_get_port(port);
  156 + u32 mask;
140 157  
141   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  158 + if (at91_port && (pin < 32)) {
142 159 mask = 1 << pin;
143   - writel(mask, &pio->port[port].idr);
  160 + writel(mask, &at91_port->idr);
144 161 at91_set_pio_pullup(port, pin, use_pullup);
145   - writel(readl(&pio->port[port].abcdsr1) | mask,
146   - &pio->port[port].abcdsr1);
147   - writel(readl(&pio->port[port].abcdsr2) | mask,
148   - &pio->port[port].abcdsr2);
149   - writel(mask, &pio->port[port].pdr);
  162 + writel(readl(&at91_port->abcdsr1) | mask,
  163 + &at91_port->abcdsr1);
  164 + writel(readl(&at91_port->abcdsr2) | mask,
  165 + &at91_port->abcdsr2);
  166 + writel(mask, &at91_port->pdr);
150 167 }
  168 +
151 169 return 0;
152 170 }
153 171 #endif
154 172  
155 173  
156 174  
157 175  
... ... @@ -158,16 +176,17 @@
158 176 */
159 177 int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
160 178 {
161   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
162   - u32 mask;
  179 + struct at91_port *at91_port = at91_pio_get_port(port);
  180 + u32 mask;
163 181  
164   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  182 + if (at91_port && (pin < 32)) {
165 183 mask = 1 << pin;
166   - writel(mask, &pio->port[port].idr);
  184 + writel(mask, &at91_port->idr);
167 185 at91_set_pio_pullup(port, pin, use_pullup);
168   - writel(mask, &pio->port[port].odr);
169   - writel(mask, &pio->port[port].per);
  186 + writel(mask, &at91_port->odr);
  187 + writel(mask, &at91_port->per);
170 188 }
  189 +
171 190 return 0;
172 191 }
173 192  
174 193  
175 194  
176 195  
177 196  
... ... @@ -177,20 +196,21 @@
177 196 */
178 197 int at91_set_pio_output(unsigned port, u32 pin, int value)
179 198 {
180   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
181   - u32 mask;
  199 + struct at91_port *at91_port = at91_pio_get_port(port);
  200 + u32 mask;
182 201  
183 202 if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
184 203 mask = 1 << pin;
185   - writel(mask, &pio->port[port].idr);
186   - writel(mask, &pio->port[port].pudr);
  204 + writel(mask, &at91_port->idr);
  205 + writel(mask, &at91_port->pudr);
187 206 if (value)
188   - writel(mask, &pio->port[port].sodr);
  207 + writel(mask, &at91_port->sodr);
189 208 else
190   - writel(mask, &pio->port[port].codr);
191   - writel(mask, &pio->port[port].oer);
192   - writel(mask, &pio->port[port].per);
  209 + writel(mask, &at91_port->codr);
  210 + writel(mask, &at91_port->oer);
  211 + writel(mask, &at91_port->per);
193 212 }
  213 +
194 214 return 0;
195 215 }
196 216  
197 217  
198 218  
199 219  
200 220  
201 221  
... ... @@ -199,20 +219,21 @@
199 219 */
200 220 int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
201 221 {
202   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
203   - u32 mask;
  222 + struct at91_port *at91_port = at91_pio_get_port(port);
  223 + u32 mask;
204 224  
205   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  225 + if (at91_port && (pin < 32)) {
206 226 mask = 1 << pin;
207 227 if (is_on) {
208 228 #if defined(CPU_HAS_PIO3)
209   - writel(mask, &pio->port[port].ifscdr);
  229 + writel(mask, &at91_port->ifscdr);
210 230 #endif
211   - writel(mask, &pio->port[port].ifer);
  231 + writel(mask, &at91_port->ifer);
212 232 } else {
213   - writel(mask, &pio->port[port].ifdr);
  233 + writel(mask, &at91_port->ifdr);
214 234 }
215 235 }
  236 +
216 237 return 0;
217 238 }
218 239  
219 240  
220 241  
221 242  
222 243  
... ... @@ -222,19 +243,20 @@
222 243 */
223 244 int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div)
224 245 {
225   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
226   - u32 mask;
  246 + struct at91_port *at91_port = at91_pio_get_port(port);
  247 + u32 mask;
227 248  
228   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  249 + if (at91_port && (pin < 32)) {
229 250 mask = 1 << pin;
230 251 if (is_on) {
231   - writel(mask, &pio->port[port].ifscer);
232   - writel(div & PIO_SCDR_DIV, &pio->port[port].scdr);
233   - writel(mask, &pio->port[port].ifer);
  252 + writel(mask, &at91_port->ifscer);
  253 + writel(div & PIO_SCDR_DIV, &at91_port->scdr);
  254 + writel(mask, &at91_port->ifer);
234 255 } else {
235   - writel(mask, &pio->port[port].ifdr);
  256 + writel(mask, &at91_port->ifdr);
236 257 }
237 258 }
  259 +
238 260 return 0;
239 261 }
240 262  
241 263  
242 264  
243 265  
244 266  
245 267  
... ... @@ -244,17 +266,18 @@
244 266 */
245 267 int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on)
246 268 {
247   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
248   - u32 mask;
  269 + struct at91_port *at91_port = at91_pio_get_port(port);
  270 + u32 mask;
249 271  
250   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  272 + if (at91_port && (pin < 32)) {
251 273 mask = 1 << pin;
252   - writel(mask, &pio->port[port].pudr);
  274 + writel(mask, &at91_port->pudr);
253 275 if (is_on)
254   - writel(mask, &pio->port[port].ppder);
  276 + writel(mask, &at91_port->ppder);
255 277 else
256   - writel(mask, &pio->port[port].ppddr);
  278 + writel(mask, &at91_port->ppddr);
257 279 }
  280 +
258 281 return 0;
259 282 }
260 283  
261 284  
262 285  
263 286  
... ... @@ -263,14 +286,15 @@
263 286 */
264 287 int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin)
265 288 {
266   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
267   - u32 mask;
  289 + struct at91_port *at91_port = at91_pio_get_port(port);
  290 + u32 mask;
268 291  
269   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  292 + if (at91_port && (pin < 32)) {
270 293 mask = 1 << pin;
271   - writel(readl(&pio->port[port].schmitt) | mask,
272   - &pio->port[port].schmitt);
  294 + writel(readl(&at91_port->schmitt) | mask,
  295 + &at91_port->schmitt);
273 296 }
  297 +
274 298 return 0;
275 299 }
276 300 #endif
277 301  
278 302  
279 303  
280 304  
... ... @@ -281,16 +305,17 @@
281 305 */
282 306 int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
283 307 {
284   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
285   - u32 mask;
  308 + struct at91_port *at91_port = at91_pio_get_port(port);
  309 + u32 mask;
286 310  
287   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  311 + if (at91_port && (pin < 32)) {
288 312 mask = 1 << pin;
289 313 if (is_on)
290   - writel(mask, &pio->port[port].mder);
  314 + writel(mask, &at91_port->mder);
291 315 else
292   - writel(mask, &pio->port[port].mddr);
  316 + writel(mask, &at91_port->mddr);
293 317 }
  318 +
294 319 return 0;
295 320 }
296 321  
297 322  
298 323  
299 324  
300 325  
... ... @@ -299,16 +324,17 @@
299 324 */
300 325 int at91_set_pio_value(unsigned port, unsigned pin, int value)
301 326 {
302   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
303   - u32 mask;
  327 + struct at91_port *at91_port = at91_pio_get_port(port);
  328 + u32 mask;
304 329  
305   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  330 + if (at91_port && (pin < 32)) {
306 331 mask = 1 << pin;
307 332 if (value)
308   - writel(mask, &pio->port[port].sodr);
  333 + writel(mask, &at91_port->sodr);
309 334 else
310   - writel(mask, &pio->port[port].codr);
  335 + writel(mask, &at91_port->codr);
311 336 }
  337 +
312 338 return 0;
313 339 }
314 340  
315 341  
316 342  
317 343  
... ... @@ -317,14 +343,14 @@
317 343 */
318 344 int at91_get_pio_value(unsigned port, unsigned pin)
319 345 {
320   - u32 pdsr = 0;
321   - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
322   - u32 mask;
  346 + struct at91_port *at91_port = at91_pio_get_port(port);
  347 + u32 pdsr = 0, mask;
323 348  
324   - if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
  349 + if (at91_port && (pin < 32)) {
325 350 mask = 1 << pin;
326   - pdsr = readl(&pio->port[port].pdsr) & mask;
  351 + pdsr = readl(&at91_port->pdsr) & mask;
327 352 }
  353 +
328 354 return pdsr != 0;
329 355 }