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Commit 4cb71e248f4cee437a5913d0d618f62058ea36ef

Authored by Hiroyuki Yokoyama
Committed by Marek Vasut
1 parent a14d2d153d
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3 

Tidy up unused definition related to power control of 3DG.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

Showing 3 changed files with 0 additions and 18 deletions Side-by-side Diff

board/renesas/draak/draak.c
Diff comments   View file @ 4cb71e2
... ... @@ -44,12 +44,6 @@
44 44 return 0;
45 45 }
46 46  
47   -/* SYSC */
48   -/* R/- 32 Power status register 2(3DG) */
49   -#define SYSC_PWRSR2 0xE6180100
50   -/* -/W 32 Power resume control register 2 (3DG) */
51   -#define SYSC_PWRONCR2 0xE618010C
52   -
53 47 /* HSUSB block registers */
54 48 #define HSUSB_REG_LPSTS 0xE6590102
55 49 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
board/renesas/salvator-x/salvator-x.c
Diff comments   View file @ 4cb71e2
... ... @@ -44,12 +44,6 @@
44 44 return 0;
45 45 }
46 46  
47   -/* SYSC */
48   -/* R/- 32 Power status register 2(3DG) */
49   -#define SYSC_PWRSR2 0xE6180100
50   -/* -/W 32 Power resume control register 2 (3DG) */
51   -#define SYSC_PWRONCR2 0xE618010C
52   -
53 47 /* HSUSB block registers */
54 48 #define HSUSB_REG_LPSTS 0xE6590102
55 49 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
board/renesas/ulcb/ulcb.c
Diff comments   View file @ 4cb71e2
... ... @@ -44,12 +44,6 @@
44 44 return 0;
45 45 }
46 46  
47   -/* SYSC */
48   -/* R/- 32 Power status register 2(3DG) */
49   -#define SYSC_PWRSR2 0xE6180100
50   -/* -/W 32 Power resume control register 2 (3DG) */
51   -#define SYSC_PWRONCR2 0xE618010C
52   -
53 47 /* HSUSB block registers */
54 48 #define HSUSB_REG_LPSTS 0xE6590102
55 49 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)