soft_i2c: move to drivers/i2c

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

soft_i2c: move to drivers/i2c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD
1 parent 717a222229
Showing 4 changed files with 424 additions and 424 deletions Side-by-side Diff
common/Makefile
common/soft_i2c.c
drivers/i2c/Makefile
drivers/i2c/soft_i2c.c
@@ -137,7 +137,6 @@
 COBJS-y += miiphyutil.o
 COBJS-y += s_record.o
 COBJS-y += serial.o
-COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
 ifdef CONFIG_CMD_USB
 COBJS-y += usb.o
-/*
- * (C) Copyright 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
- * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
- * Neil Russell.
- */
-
-#include <common.h>
-#ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
-#include <ioports.h>
-#endif
-#ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-#endif
-#ifdef	CONFIG_IXP425			/* only valid for IXP425 */
-#include <asm/arch/ixp425.h>
-#endif
-#ifdef CONFIG_LPC2292
-#include <asm/arch/hardware.h>
-#endif
-#include <i2c.h>
-
-/* #define	DEBUG_I2C	*/
-
-#ifdef DEBUG_I2C
-DECLARE_GLOBAL_DATA_PTR;
-#endif
-
-
-/*-----------------------------------------------------------------------
- * Definitions
- */
-
-#define RETRIES		0
-
-
-#define I2C_ACK		0		/* PD_SDA level to ack a byte */
-#define I2C_NOACK	1		/* PD_SDA level to noack a byte */
-
-
-#ifdef DEBUG_I2C
-#define PRINTD(fmt,args...)	do {	\
-	if (gd->have_console)		\
-		printf (fmt ,##args);	\
-	} while (0)
-#else
-#define PRINTD(fmt,args...)
-#endif
-
-/*-----------------------------------------------------------------------
- * Local functions
- */
-static void  send_reset	(void);
-static void  send_start	(void);
-static void  send_stop	(void);
-static void  send_ack	(int);
-static int   write_byte	(uchar byte);
-static uchar read_byte	(int);
-
-
-/*-----------------------------------------------------------------------
- * Send a reset sequence consisting of 9 clocks with the data signal high
- * to clock any confused device back into an idle state.  Also send a
- * <stop> at the end of the sequence for belts & suspenders.
- */
-static void send_reset(void)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-	int j;
-
-	I2C_SCL(1);
-	I2C_SDA(1);
-#ifdef	I2C_INIT
-	I2C_INIT;
-#endif
-	I2C_TRISTATE;
-	for(j = 0; j < 9; j++) {
-		I2C_SCL(0);
-		I2C_DELAY;
-		I2C_DELAY;
-		I2C_SCL(1);
-		I2C_DELAY;
-		I2C_DELAY;
-	}
-	send_stop();
-	I2C_TRISTATE;
-}
-
-/*-----------------------------------------------------------------------
- * START: High -> Low on SDA while SCL is High
- */
-static void send_start(void)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-
-	I2C_DELAY;
-	I2C_SDA(1);
-	I2C_ACTIVE;
-	I2C_DELAY;
-	I2C_SCL(1);
-	I2C_DELAY;
-	I2C_SDA(0);
-	I2C_DELAY;
-}
-
-/*-----------------------------------------------------------------------
- * STOP: Low -> High on SDA while SCL is High
- */
-static void send_stop(void)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-
-	I2C_SCL(0);
-	I2C_DELAY;
-	I2C_SDA(0);
-	I2C_ACTIVE;
-	I2C_DELAY;
-	I2C_SCL(1);
-	I2C_DELAY;
-	I2C_SDA(1);
-	I2C_DELAY;
-	I2C_TRISTATE;
-}
-
-
-/*-----------------------------------------------------------------------
- * ack should be I2C_ACK or I2C_NOACK
- */
-static void send_ack(int ack)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-
-	I2C_SCL(0);
-	I2C_DELAY;
-	I2C_ACTIVE;
-	I2C_SDA(ack);
-	I2C_DELAY;
-	I2C_SCL(1);
-	I2C_DELAY;
-	I2C_DELAY;
-	I2C_SCL(0);
-	I2C_DELAY;
-}
-
-
-/*-----------------------------------------------------------------------
- * Send 8 bits and look for an acknowledgement.
- */
-static int write_byte(uchar data)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-	int j;
-	int nack;
-
-	I2C_ACTIVE;
-	for(j = 0; j < 8; j++) {
-		I2C_SCL(0);
-		I2C_DELAY;
-		I2C_SDA(data & 0x80);
-		I2C_DELAY;
-		I2C_SCL(1);
-		I2C_DELAY;
-		I2C_DELAY;
-
-		data <<= 1;
-	}
-
-	/*
-	 * Look for an <ACK>(negative logic) and return it.
-	 */
-	I2C_SCL(0);
-	I2C_DELAY;
-	I2C_SDA(1);
-	I2C_TRISTATE;
-	I2C_DELAY;
-	I2C_SCL(1);
-	I2C_DELAY;
-	I2C_DELAY;
-	nack = I2C_READ;
-	I2C_SCL(0);
-	I2C_DELAY;
-	I2C_ACTIVE;
-
-	return(nack);	/* not a nack is an ack */
-}
-
-
-/*-----------------------------------------------------------------------
- * if ack == I2C_ACK, ACK the byte so can continue reading, else
- * send I2C_NOACK to end the read.
- */
-static uchar read_byte(int ack)
-{
-#ifdef	CONFIG_MPC8260
-	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-	int  data;
-	int  j;
-
-	/*
-	 * Read 8 bits, MSB first.
-	 */
-	I2C_TRISTATE;
-	I2C_SDA(1);
-	data = 0;
-	for(j = 0; j < 8; j++) {
-		I2C_SCL(0);
-		I2C_DELAY;
-		I2C_SCL(1);
-		I2C_DELAY;
-		data <<= 1;
-		data |= I2C_READ;
-		I2C_DELAY;
-	}
-	send_ack(ack);
-
-	return(data);
-}
-
-/*=====================================================================*/
-/*                         Public Functions                            */
-/*=====================================================================*/
-
-/*-----------------------------------------------------------------------
- * Initialization
- */
-void i2c_init (int speed, int slaveaddr)
-{
-	/*
-	 * WARNING: Do NOT save speed in a static variable: if the
-	 * I2C routines are called before RAM is initialized (to read
-	 * the DIMM SPD, for instance), RAM won't be usable and your
-	 * system will crash.
-	 */
-	send_reset ();
-}
-
-/*-----------------------------------------------------------------------
- * Probe to see if a chip is present.  Also good for checking for the
- * completion of EEPROM writes since the chip stops responding until
- * the write completes (typically 10mSec).
- */
-int i2c_probe(uchar addr)
-{
-	int rc;
-
-	/*
-	 * perform 1 byte write transaction with just address byte
-	 * (fake write)
-	 */
-	send_start();
-	rc = write_byte ((addr << 1) | 0);
-	send_stop();
-
-	return (rc ? 1 : 0);
-}
-
-/*-----------------------------------------------------------------------
- * Read bytes
- */
-int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-	int shift;
-	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
-		chip, addr, alen, buffer, len);
-
-#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
-	/*
-	 * EEPROM chips that implement "address overflow" are ones
-	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
-	 * address and the extra bits end up in the "chip address"
-	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
-	 * four 256 byte chips.
-	 *
-	 * Note that we consider the length of the address field to
-	 * still be one byte because the extra address bits are
-	 * hidden in the chip address.
-	 */
-	chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
-
-	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
-		chip, addr);
-#endif
-
-	/*
-	 * Do the addressing portion of a write cycle to set the
-	 * chip's address pointer.  If the address length is zero,
-	 * don't do the normal write cycle to set the address pointer,
-	 * there is no address pointer in this chip.
-	 */
-	send_start();
-	if(alen > 0) {
-		if(write_byte(chip << 1)) {	/* write cycle */
-			send_stop();
-			PRINTD("i2c_read, no chip responded %02X\n", chip);
-			return(1);
-		}
-		shift = (alen-1) * 8;
-		while(alen-- > 0) {
-			if(write_byte(addr >> shift)) {
-				PRINTD("i2c_read, address not <ACK>ed\n");
-				return(1);
-			}
-			shift -= 8;
-		}
-		send_stop();	/* reportedly some chips need a full stop */
-		send_start();
-	}
-	/*
-	 * Send the chip address again, this time for a read cycle.
-	 * Then read the data.  On the last byte, we do a NACK instead
-	 * of an ACK(len == 0) to terminate the read.
-	 */
-	write_byte((chip << 1) | 1);	/* read cycle */
-	while(len-- > 0) {
-		*buffer++ = read_byte(len == 0);
-	}
-	send_stop();
-	return(0);
-}
-
-/*-----------------------------------------------------------------------
- * Write bytes
- */
-int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-	int shift, failures = 0;
-
-	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
-		chip, addr, alen, buffer, len);
-
-	send_start();
-	if(write_byte(chip << 1)) {	/* write cycle */
-		send_stop();
-		PRINTD("i2c_write, no chip responded %02X\n", chip);
-		return(1);
-	}
-	shift = (alen-1) * 8;
-	while(alen-- > 0) {
-		if(write_byte(addr >> shift)) {
-			PRINTD("i2c_write, address not <ACK>ed\n");
-			return(1);
-		}
-		shift -= 8;
-	}
-
-	while(len-- > 0) {
-		if(write_byte(*buffer++)) {
-			failures++;
-		}
-	}
-	send_stop();
-	return(failures);
-}
-
-/*-----------------------------------------------------------------------
- * Read a register
- */
-uchar i2c_reg_read(uchar i2c_addr, uchar reg)
-{
-	uchar buf;
-
-	i2c_read(i2c_addr, reg, 1, &buf, 1);
-
-	return(buf);
-}
-
-/*-----------------------------------------------------------------------
- * Write a register
- */
-void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
-{
-	i2c_write(i2c_addr, reg, 1, &val, 1);
-}
@@ -29,6 +29,7 @@
 COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
+COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
  
 COBJS	:= $(COBJS-y)
+/*
+ * (C) Copyright 2001, 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
+ * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
+ * Neil Russell.
+ */
+
+#include <common.h>
+#ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
+#include <ioports.h>
+#endif
+#ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#endif
+#ifdef	CONFIG_IXP425			/* only valid for IXP425 */
+#include <asm/arch/ixp425.h>
+#endif
+#ifdef CONFIG_LPC2292
+#include <asm/arch/hardware.h>
+#endif
+#include <i2c.h>
+
+/* #define	DEBUG_I2C	*/
+
+#ifdef DEBUG_I2C
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
+
+/*-----------------------------------------------------------------------
+ * Definitions
+ */
+
+#define RETRIES		0
+
+
+#define I2C_ACK		0		/* PD_SDA level to ack a byte */
+#define I2C_NOACK	1		/* PD_SDA level to noack a byte */
+
+
+#ifdef DEBUG_I2C
+#define PRINTD(fmt,args...)	do {	\
+	if (gd->have_console)		\
+		printf (fmt ,##args);	\
+	} while (0)
+#else
+#define PRINTD(fmt,args...)
+#endif
+
+/*-----------------------------------------------------------------------
+ * Local functions
+ */
+static void  send_reset	(void);
+static void  send_start	(void);
+static void  send_stop	(void);
+static void  send_ack	(int);
+static int   write_byte	(uchar byte);
+static uchar read_byte	(int);
+
+
+/*-----------------------------------------------------------------------
+ * Send a reset sequence consisting of 9 clocks with the data signal high
+ * to clock any confused device back into an idle state.  Also send a
+ * <stop> at the end of the sequence for belts & suspenders.
+ */
+static void send_reset(void)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+	int j;
+
+	I2C_SCL(1);
+	I2C_SDA(1);
+#ifdef	I2C_INIT
+	I2C_INIT;
+#endif
+	I2C_TRISTATE;
+	for(j = 0; j < 9; j++) {
+		I2C_SCL(0);
+		I2C_DELAY;
+		I2C_DELAY;
+		I2C_SCL(1);
+		I2C_DELAY;
+		I2C_DELAY;
+	}
+	send_stop();
+	I2C_TRISTATE;
+}
+
+/*-----------------------------------------------------------------------
+ * START: High -> Low on SDA while SCL is High
+ */
+static void send_start(void)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+
+	I2C_DELAY;
+	I2C_SDA(1);
+	I2C_ACTIVE;
+	I2C_DELAY;
+	I2C_SCL(1);
+	I2C_DELAY;
+	I2C_SDA(0);
+	I2C_DELAY;
+}
+
+/*-----------------------------------------------------------------------
+ * STOP: Low -> High on SDA while SCL is High
+ */
+static void send_stop(void)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+
+	I2C_SCL(0);
+	I2C_DELAY;
+	I2C_SDA(0);
+	I2C_ACTIVE;
+	I2C_DELAY;
+	I2C_SCL(1);
+	I2C_DELAY;
+	I2C_SDA(1);
+	I2C_DELAY;
+	I2C_TRISTATE;
+}
+
+
+/*-----------------------------------------------------------------------
+ * ack should be I2C_ACK or I2C_NOACK
+ */
+static void send_ack(int ack)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+
+	I2C_SCL(0);
+	I2C_DELAY;
+	I2C_ACTIVE;
+	I2C_SDA(ack);
+	I2C_DELAY;
+	I2C_SCL(1);
+	I2C_DELAY;
+	I2C_DELAY;
+	I2C_SCL(0);
+	I2C_DELAY;
+}
+
+
+/*-----------------------------------------------------------------------
+ * Send 8 bits and look for an acknowledgement.
+ */
+static int write_byte(uchar data)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+	int j;
+	int nack;
+
+	I2C_ACTIVE;
+	for(j = 0; j < 8; j++) {
+		I2C_SCL(0);
+		I2C_DELAY;
+		I2C_SDA(data & 0x80);
+		I2C_DELAY;
+		I2C_SCL(1);
+		I2C_DELAY;
+		I2C_DELAY;
+
+		data <<= 1;
+	}
+
+	/*
+	 * Look for an <ACK>(negative logic) and return it.
+	 */
+	I2C_SCL(0);
+	I2C_DELAY;
+	I2C_SDA(1);
+	I2C_TRISTATE;
+	I2C_DELAY;
+	I2C_SCL(1);
+	I2C_DELAY;
+	I2C_DELAY;
+	nack = I2C_READ;
+	I2C_SCL(0);
+	I2C_DELAY;
+	I2C_ACTIVE;
+
+	return(nack);	/* not a nack is an ack */
+}
+
+
+/*-----------------------------------------------------------------------
+ * if ack == I2C_ACK, ACK the byte so can continue reading, else
+ * send I2C_NOACK to end the read.
+ */
+static uchar read_byte(int ack)
+{
+#ifdef	CONFIG_MPC8260
+	volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
+#endif
+#ifdef	CONFIG_8xx
+	volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
+	int  data;
+	int  j;
+
+	/*
+	 * Read 8 bits, MSB first.
+	 */
+	I2C_TRISTATE;
+	I2C_SDA(1);
+	data = 0;
+	for(j = 0; j < 8; j++) {
+		I2C_SCL(0);
+		I2C_DELAY;
+		I2C_SCL(1);
+		I2C_DELAY;
+		data <<= 1;
+		data |= I2C_READ;
+		I2C_DELAY;
+	}
+	send_ack(ack);
+
+	return(data);
+}
+
+/*=====================================================================*/
+/*                         Public Functions                            */
+/*=====================================================================*/
+
+/*-----------------------------------------------------------------------
+ * Initialization
+ */
+void i2c_init (int speed, int slaveaddr)
+{
+	/*
+	 * WARNING: Do NOT save speed in a static variable: if the
+	 * I2C routines are called before RAM is initialized (to read
+	 * the DIMM SPD, for instance), RAM won't be usable and your
+	 * system will crash.
+	 */
+	send_reset ();
+}
+
+/*-----------------------------------------------------------------------
+ * Probe to see if a chip is present.  Also good for checking for the
+ * completion of EEPROM writes since the chip stops responding until
+ * the write completes (typically 10mSec).
+ */
+int i2c_probe(uchar addr)
+{
+	int rc;
+
+	/*
+	 * perform 1 byte write transaction with just address byte
+	 * (fake write)
+	 */
+	send_start();
+	rc = write_byte ((addr << 1) | 0);
+	send_stop();
+
+	return (rc ? 1 : 0);
+}
+
+/*-----------------------------------------------------------------------
+ * Read bytes
+ */
+int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+	int shift;
+	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
+		chip, addr, alen, buffer, len);
+
+#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
+	/*
+	 * EEPROM chips that implement "address overflow" are ones
+	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+	 * address and the extra bits end up in the "chip address"
+	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
+	 * four 256 byte chips.
+	 *
+	 * Note that we consider the length of the address field to
+	 * still be one byte because the extra address bits are
+	 * hidden in the chip address.
+	 */
+	chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+
+	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
+		chip, addr);
+#endif
+
+	/*
+	 * Do the addressing portion of a write cycle to set the
+	 * chip's address pointer.  If the address length is zero,
+	 * don't do the normal write cycle to set the address pointer,
+	 * there is no address pointer in this chip.
+	 */
+	send_start();
+	if(alen > 0) {
+		if(write_byte(chip << 1)) {	/* write cycle */
+			send_stop();
+			PRINTD("i2c_read, no chip responded %02X\n", chip);
+			return(1);
+		}
+		shift = (alen-1) * 8;
+		while(alen-- > 0) {
+			if(write_byte(addr >> shift)) {
+				PRINTD("i2c_read, address not <ACK>ed\n");
+				return(1);
+			}
+			shift -= 8;
+		}
+		send_stop();	/* reportedly some chips need a full stop */
+		send_start();
+	}
+	/*
+	 * Send the chip address again, this time for a read cycle.
+	 * Then read the data.  On the last byte, we do a NACK instead
+	 * of an ACK(len == 0) to terminate the read.
+	 */
+	write_byte((chip << 1) | 1);	/* read cycle */
+	while(len-- > 0) {
+		*buffer++ = read_byte(len == 0);
+	}
+	send_stop();
+	return(0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write bytes
+ */
+int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+	int shift, failures = 0;
+
+	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
+		chip, addr, alen, buffer, len);
+
+	send_start();
+	if(write_byte(chip << 1)) {	/* write cycle */
+		send_stop();
+		PRINTD("i2c_write, no chip responded %02X\n", chip);
+		return(1);
+	}
+	shift = (alen-1) * 8;
+	while(alen-- > 0) {
+		if(write_byte(addr >> shift)) {
+			PRINTD("i2c_write, address not <ACK>ed\n");
+			return(1);
+		}
+		shift -= 8;
+	}
+
+	while(len-- > 0) {
+		if(write_byte(*buffer++)) {
+			failures++;
+		}
+	}
+	send_stop();
+	return(failures);
+}
+
+/*-----------------------------------------------------------------------
+ * Read a register
+ */
+uchar i2c_reg_read(uchar i2c_addr, uchar reg)
+{
+	uchar buf;
+
+	i2c_read(i2c_addr, reg, 1, &buf, 1);
+
+	return(buf);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a register
+ */
+void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
+{
+	i2c_write(i2c_addr, reg, 1, &val, 1);
+}
...	...	@@ -137,7 +137,6 @@
137	137	COBJS-y += miiphyutil.o
138	138	COBJS-y += s_record.o
139	139	COBJS-y += serial.o
140		-COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
141	140	COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
142	141	ifdef CONFIG_CMD_USB
143	142	COBJS-y += usb.o
1		-/*
2		- * (C) Copyright 2001, 2002
3		- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4		- *
5		- * See file CREDITS for list of people who contributed to this
6		- * project.
7		- *
8		- * This program is free software; you can redistribute it and/or
9		- * modify it under the terms of the GNU General Public License as
10		- * published by the Free Software Foundation; either version 2 of
11		- * the License, or (at your option) any later version.
12		- *
13		- * This program is distributed in the hope that it will be useful,
14		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
15		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16		- * GNU General Public License for more details.
17		- *
18		- * You should have received a copy of the GNU General Public License
19		- * along with this program; if not, write to the Free Software
20		- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21		- * MA 02111-1307 USA
22		- *
23		- * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24		- * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25		- * Neil Russell.
26		- */
27		-
28		-#include <common.h>
29		-#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30		-#include <ioports.h>
31		-#endif
32		-#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
33		-#include <asm/io.h>
34		-#include <asm/arch/hardware.h>
35		-#endif
36		-#ifdef CONFIG_IXP425 /* only valid for IXP425 */
37		-#include <asm/arch/ixp425.h>
38		-#endif
39		-#ifdef CONFIG_LPC2292
40		-#include <asm/arch/hardware.h>
41		-#endif
42		-#include <i2c.h>
43		-
44		-/* #define DEBUG_I2C */
45		-
46		-#ifdef DEBUG_I2C
47		-DECLARE_GLOBAL_DATA_PTR;
48		-#endif
49		-
50		-
51		-/*-----------------------------------------------------------------------
52		- * Definitions
53		- */
54		-
55		-#define RETRIES 0
56		-
57		-
58		-#define I2C_ACK 0 /* PD_SDA level to ack a byte */
59		-#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
60		-
61		-
62		-#ifdef DEBUG_I2C
63		-#define PRINTD(fmt,args...) do { \
64		- if (gd->have_console) \
65		- printf (fmt ,##args); \
66		- } while (0)
67		-#else
68		-#define PRINTD(fmt,args...)
69		-#endif
70		-
71		-/*-----------------------------------------------------------------------
72		- * Local functions
73		- */
74		-static void send_reset (void);
75		-static void send_start (void);
76		-static void send_stop (void);
77		-static void send_ack (int);
78		-static int write_byte (uchar byte);
79		-static uchar read_byte (int);
80		-
81		-
82		-/*-----------------------------------------------------------------------
83		- * Send a reset sequence consisting of 9 clocks with the data signal high
84		- * to clock any confused device back into an idle state. Also send a
85		- * <stop> at the end of the sequence for belts & suspenders.
86		- */
87		-static void send_reset(void)
88		-{
89		-#ifdef CONFIG_MPC8260
90		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
91		-#endif
92		-#ifdef CONFIG_8xx
93		- volatile immap_t immr = (immap_t )CFG_IMMR;
94		-#endif
95		- int j;
96		-
97		- I2C_SCL(1);
98		- I2C_SDA(1);
99		-#ifdef I2C_INIT
100		- I2C_INIT;
101		-#endif
102		- I2C_TRISTATE;
103		- for(j = 0; j < 9; j++) {
104		- I2C_SCL(0);
105		- I2C_DELAY;
106		- I2C_DELAY;
107		- I2C_SCL(1);
108		- I2C_DELAY;
109		- I2C_DELAY;
110		- }
111		- send_stop();
112		- I2C_TRISTATE;
113		-}
114		-
115		-/*-----------------------------------------------------------------------
116		- * START: High -> Low on SDA while SCL is High
117		- */
118		-static void send_start(void)
119		-{
120		-#ifdef CONFIG_MPC8260
121		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
122		-#endif
123		-#ifdef CONFIG_8xx
124		- volatile immap_t immr = (immap_t )CFG_IMMR;
125		-#endif
126		-
127		- I2C_DELAY;
128		- I2C_SDA(1);
129		- I2C_ACTIVE;
130		- I2C_DELAY;
131		- I2C_SCL(1);
132		- I2C_DELAY;
133		- I2C_SDA(0);
134		- I2C_DELAY;
135		-}
136		-
137		-/*-----------------------------------------------------------------------
138		- * STOP: Low -> High on SDA while SCL is High
139		- */
140		-static void send_stop(void)
141		-{
142		-#ifdef CONFIG_MPC8260
143		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
144		-#endif
145		-#ifdef CONFIG_8xx
146		- volatile immap_t immr = (immap_t )CFG_IMMR;
147		-#endif
148		-
149		- I2C_SCL(0);
150		- I2C_DELAY;
151		- I2C_SDA(0);
152		- I2C_ACTIVE;
153		- I2C_DELAY;
154		- I2C_SCL(1);
155		- I2C_DELAY;
156		- I2C_SDA(1);
157		- I2C_DELAY;
158		- I2C_TRISTATE;
159		-}
160		-
161		-
162		-/*-----------------------------------------------------------------------
163		- * ack should be I2C_ACK or I2C_NOACK
164		- */
165		-static void send_ack(int ack)
166		-{
167		-#ifdef CONFIG_MPC8260
168		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
169		-#endif
170		-#ifdef CONFIG_8xx
171		- volatile immap_t immr = (immap_t )CFG_IMMR;
172		-#endif
173		-
174		- I2C_SCL(0);
175		- I2C_DELAY;
176		- I2C_ACTIVE;
177		- I2C_SDA(ack);
178		- I2C_DELAY;
179		- I2C_SCL(1);
180		- I2C_DELAY;
181		- I2C_DELAY;
182		- I2C_SCL(0);
183		- I2C_DELAY;
184		-}
185		-
186		-
187		-/*-----------------------------------------------------------------------
188		- * Send 8 bits and look for an acknowledgement.
189		- */
190		-static int write_byte(uchar data)
191		-{
192		-#ifdef CONFIG_MPC8260
193		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
194		-#endif
195		-#ifdef CONFIG_8xx
196		- volatile immap_t immr = (immap_t )CFG_IMMR;
197		-#endif
198		- int j;
199		- int nack;
200		-
201		- I2C_ACTIVE;
202		- for(j = 0; j < 8; j++) {
203		- I2C_SCL(0);
204		- I2C_DELAY;
205		- I2C_SDA(data & 0x80);
206		- I2C_DELAY;
207		- I2C_SCL(1);
208		- I2C_DELAY;
209		- I2C_DELAY;
210		-
211		- data <<= 1;
212		- }
213		-
214		- /*
215		- * Look for an <ACK>(negative logic) and return it.
216		- */
217		- I2C_SCL(0);
218		- I2C_DELAY;
219		- I2C_SDA(1);
220		- I2C_TRISTATE;
221		- I2C_DELAY;
222		- I2C_SCL(1);
223		- I2C_DELAY;
224		- I2C_DELAY;
225		- nack = I2C_READ;
226		- I2C_SCL(0);
227		- I2C_DELAY;
228		- I2C_ACTIVE;
229		-
230		- return(nack); /* not a nack is an ack */
231		-}
232		-
233		-
234		-/*-----------------------------------------------------------------------
235		- * if ack == I2C_ACK, ACK the byte so can continue reading, else
236		- * send I2C_NOACK to end the read.
237		- */
238		-static uchar read_byte(int ack)
239		-{
240		-#ifdef CONFIG_MPC8260
241		- volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
242		-#endif
243		-#ifdef CONFIG_8xx
244		- volatile immap_t immr = (immap_t )CFG_IMMR;
245		-#endif
246		- int data;
247		- int j;
248		-
249		- /*
250		- * Read 8 bits, MSB first.
251		- */
252		- I2C_TRISTATE;
253		- I2C_SDA(1);
254		- data = 0;
255		- for(j = 0; j < 8; j++) {
256		- I2C_SCL(0);
257		- I2C_DELAY;
258		- I2C_SCL(1);
259		- I2C_DELAY;
260		- data <<= 1;
261		- data \|= I2C_READ;
262		- I2C_DELAY;
263		- }
264		- send_ack(ack);
265		-
266		- return(data);
267		-}
268		-
269		-/=====================================================================/
270		-/* Public Functions */
271		-/=====================================================================/
272		-
273		-/*-----------------------------------------------------------------------
274		- * Initialization
275		- */
276		-void i2c_init (int speed, int slaveaddr)
277		-{
278		- /*
279		- * WARNING: Do NOT save speed in a static variable: if the
280		- * I2C routines are called before RAM is initialized (to read
281		- * the DIMM SPD, for instance), RAM won't be usable and your
282		- * system will crash.
283		- */
284		- send_reset ();
285		-}
286		-
287		-/*-----------------------------------------------------------------------
288		- * Probe to see if a chip is present. Also good for checking for the
289		- * completion of EEPROM writes since the chip stops responding until
290		- * the write completes (typically 10mSec).
291		- */
292		-int i2c_probe(uchar addr)
293		-{
294		- int rc;
295		-
296		- /*
297		- * perform 1 byte write transaction with just address byte
298		- * (fake write)
299		- */
300		- send_start();
301		- rc = write_byte ((addr << 1) \| 0);
302		- send_stop();
303		-
304		- return (rc ? 1 : 0);
305		-}
306		-
307		-/*-----------------------------------------------------------------------
308		- * Read bytes
309		- */
310		-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
311		-{
312		- int shift;
313		- PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
314		- chip, addr, alen, buffer, len);
315		-
316		-#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
317		- /*
318		- * EEPROM chips that implement "address overflow" are ones
319		- * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
320		- * address and the extra bits end up in the "chip address"
321		- * bit slots. This makes a 24WC08 (1Kbyte) chip look like
322		- * four 256 byte chips.
323		- *
324		- * Note that we consider the length of the address field to
325		- * still be one byte because the extra address bits are
326		- * hidden in the chip address.
327		- */
328		- chip \|= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
329		-
330		- PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
331		- chip, addr);
332		-#endif
333		-
334		- /*
335		- * Do the addressing portion of a write cycle to set the
336		- * chip's address pointer. If the address length is zero,
337		- * don't do the normal write cycle to set the address pointer,
338		- * there is no address pointer in this chip.
339		- */
340		- send_start();
341		- if(alen > 0) {
342		- if(write_byte(chip << 1)) { /* write cycle */
343		- send_stop();
344		- PRINTD("i2c_read, no chip responded %02X\n", chip);
345		- return(1);
346		- }
347		- shift = (alen-1) * 8;
348		- while(alen-- > 0) {
349		- if(write_byte(addr >> shift)) {
350		- PRINTD("i2c_read, address not <ACK>ed\n");
351		- return(1);
352		- }
353		- shift -= 8;
354		- }
355		- send_stop(); /* reportedly some chips need a full stop */
356		- send_start();
357		- }
358		- /*
359		- * Send the chip address again, this time for a read cycle.
360		- * Then read the data. On the last byte, we do a NACK instead
361		- * of an ACK(len == 0) to terminate the read.
362		- */
363		- write_byte((chip << 1) \| 1); /* read cycle */
364		- while(len-- > 0) {
365		- *buffer++ = read_byte(len == 0);
366		- }
367		- send_stop();
368		- return(0);
369		-}
370		-
371		-/*-----------------------------------------------------------------------
372		- * Write bytes
373		- */
374		-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
375		-{
376		- int shift, failures = 0;
377		-
378		- PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
379		- chip, addr, alen, buffer, len);
380		-
381		- send_start();
382		- if(write_byte(chip << 1)) { /* write cycle */
383		- send_stop();
384		- PRINTD("i2c_write, no chip responded %02X\n", chip);
385		- return(1);
386		- }
387		- shift = (alen-1) * 8;
388		- while(alen-- > 0) {
389		- if(write_byte(addr >> shift)) {
390		- PRINTD("i2c_write, address not <ACK>ed\n");
391		- return(1);
392		- }
393		- shift -= 8;
394		- }
395		-
396		- while(len-- > 0) {
397		- if(write_byte(*buffer++)) {
398		- failures++;
399		- }
400		- }
401		- send_stop();
402		- return(failures);
403		-}
404		-
405		-/*-----------------------------------------------------------------------
406		- * Read a register
407		- */
408		-uchar i2c_reg_read(uchar i2c_addr, uchar reg)
409		-{
410		- uchar buf;
411		-
412		- i2c_read(i2c_addr, reg, 1, &buf, 1);
413		-
414		- return(buf);
415		-}
416		-
417		-/*-----------------------------------------------------------------------
418		- * Write a register
419		- */
420		-void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
421		-{
422		- i2c_write(i2c_addr, reg, 1, &val, 1);
423		-}
...	...	@@ -29,6 +29,7 @@
29	29	COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
30	30	COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
31	31	COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
	32	+COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
32	33	COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
33	34
34	35	COBJS := $(COBJS-y)
	1	+/*
	2	+ * (C) Copyright 2001, 2002
	3	+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	+ *
	5	+ * See file CREDITS for list of people who contributed to this
	6	+ * project.
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or
	9	+ * modify it under the terms of the GNU General Public License as
	10	+ * published by the Free Software Foundation; either version 2 of
	11	+ * the License, or (at your option) any later version.
	12	+ *
	13	+ * This program is distributed in the hope that it will be useful,
	14	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+ * GNU General Public License for more details.
	17	+ *
	18	+ * You should have received a copy of the GNU General Public License
	19	+ * along with this program; if not, write to the Free Software
	20	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+ * MA 02111-1307 USA
	22	+ *
	23	+ * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
	24	+ * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
	25	+ * Neil Russell.
	26	+ */
	27	+
	28	+#include <common.h>
	29	+#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
	30	+#include <ioports.h>
	31	+#endif
	32	+#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
	33	+#include <asm/io.h>
	34	+#include <asm/arch/hardware.h>
	35	+#endif
	36	+#ifdef CONFIG_IXP425 /* only valid for IXP425 */
	37	+#include <asm/arch/ixp425.h>
	38	+#endif
	39	+#ifdef CONFIG_LPC2292
	40	+#include <asm/arch/hardware.h>
	41	+#endif
	42	+#include <i2c.h>
	43	+
	44	+/* #define DEBUG_I2C */
	45	+
	46	+#ifdef DEBUG_I2C
	47	+DECLARE_GLOBAL_DATA_PTR;
	48	+#endif
	49	+
	50	+
	51	+/*-----------------------------------------------------------------------
	52	+ * Definitions
	53	+ */
	54	+
	55	+#define RETRIES 0
	56	+
	57	+
	58	+#define I2C_ACK 0 /* PD_SDA level to ack a byte */
	59	+#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
	60	+
	61	+
	62	+#ifdef DEBUG_I2C
	63	+#define PRINTD(fmt,args...) do { \
	64	+ if (gd->have_console) \
	65	+ printf (fmt ,##args); \
	66	+ } while (0)
	67	+#else
	68	+#define PRINTD(fmt,args...)
	69	+#endif
	70	+
	71	+/*-----------------------------------------------------------------------
	72	+ * Local functions
	73	+ */
	74	+static void send_reset (void);
	75	+static void send_start (void);
	76	+static void send_stop (void);
	77	+static void send_ack (int);
	78	+static int write_byte (uchar byte);
	79	+static uchar read_byte (int);
	80	+
	81	+
	82	+/*-----------------------------------------------------------------------
	83	+ * Send a reset sequence consisting of 9 clocks with the data signal high
	84	+ * to clock any confused device back into an idle state. Also send a
	85	+ * <stop> at the end of the sequence for belts & suspenders.
	86	+ */
	87	+static void send_reset(void)
	88	+{
	89	+#ifdef CONFIG_MPC8260
	90	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	91	+#endif
	92	+#ifdef CONFIG_8xx
	93	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	94	+#endif
	95	+ int j;
	96	+
	97	+ I2C_SCL(1);
	98	+ I2C_SDA(1);
	99	+#ifdef I2C_INIT
	100	+ I2C_INIT;
	101	+#endif
	102	+ I2C_TRISTATE;
	103	+ for(j = 0; j < 9; j++) {
	104	+ I2C_SCL(0);
	105	+ I2C_DELAY;
	106	+ I2C_DELAY;
	107	+ I2C_SCL(1);
	108	+ I2C_DELAY;
	109	+ I2C_DELAY;
	110	+ }
	111	+ send_stop();
	112	+ I2C_TRISTATE;
	113	+}
	114	+
	115	+/*-----------------------------------------------------------------------
	116	+ * START: High -> Low on SDA while SCL is High
	117	+ */
	118	+static void send_start(void)
	119	+{
	120	+#ifdef CONFIG_MPC8260
	121	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	122	+#endif
	123	+#ifdef CONFIG_8xx
	124	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	125	+#endif
	126	+
	127	+ I2C_DELAY;
	128	+ I2C_SDA(1);
	129	+ I2C_ACTIVE;
	130	+ I2C_DELAY;
	131	+ I2C_SCL(1);
	132	+ I2C_DELAY;
	133	+ I2C_SDA(0);
	134	+ I2C_DELAY;
	135	+}
	136	+
	137	+/*-----------------------------------------------------------------------
	138	+ * STOP: Low -> High on SDA while SCL is High
	139	+ */
	140	+static void send_stop(void)
	141	+{
	142	+#ifdef CONFIG_MPC8260
	143	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	144	+#endif
	145	+#ifdef CONFIG_8xx
	146	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	147	+#endif
	148	+
	149	+ I2C_SCL(0);
	150	+ I2C_DELAY;
	151	+ I2C_SDA(0);
	152	+ I2C_ACTIVE;
	153	+ I2C_DELAY;
	154	+ I2C_SCL(1);
	155	+ I2C_DELAY;
	156	+ I2C_SDA(1);
	157	+ I2C_DELAY;
	158	+ I2C_TRISTATE;
	159	+}
	160	+
	161	+
	162	+/*-----------------------------------------------------------------------
	163	+ * ack should be I2C_ACK or I2C_NOACK
	164	+ */
	165	+static void send_ack(int ack)
	166	+{
	167	+#ifdef CONFIG_MPC8260
	168	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	169	+#endif
	170	+#ifdef CONFIG_8xx
	171	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	172	+#endif
	173	+
	174	+ I2C_SCL(0);
	175	+ I2C_DELAY;
	176	+ I2C_ACTIVE;
	177	+ I2C_SDA(ack);
	178	+ I2C_DELAY;
	179	+ I2C_SCL(1);
	180	+ I2C_DELAY;
	181	+ I2C_DELAY;
	182	+ I2C_SCL(0);
	183	+ I2C_DELAY;
	184	+}
	185	+
	186	+
	187	+/*-----------------------------------------------------------------------
	188	+ * Send 8 bits and look for an acknowledgement.
	189	+ */
	190	+static int write_byte(uchar data)
	191	+{
	192	+#ifdef CONFIG_MPC8260
	193	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	194	+#endif
	195	+#ifdef CONFIG_8xx
	196	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	197	+#endif
	198	+ int j;
	199	+ int nack;
	200	+
	201	+ I2C_ACTIVE;
	202	+ for(j = 0; j < 8; j++) {
	203	+ I2C_SCL(0);
	204	+ I2C_DELAY;
	205	+ I2C_SDA(data & 0x80);
	206	+ I2C_DELAY;
	207	+ I2C_SCL(1);
	208	+ I2C_DELAY;
	209	+ I2C_DELAY;
	210	+
	211	+ data <<= 1;
	212	+ }
	213	+
	214	+ /*
	215	+ * Look for an <ACK>(negative logic) and return it.
	216	+ */
	217	+ I2C_SCL(0);
	218	+ I2C_DELAY;
	219	+ I2C_SDA(1);
	220	+ I2C_TRISTATE;
	221	+ I2C_DELAY;
	222	+ I2C_SCL(1);
	223	+ I2C_DELAY;
	224	+ I2C_DELAY;
	225	+ nack = I2C_READ;
	226	+ I2C_SCL(0);
	227	+ I2C_DELAY;
	228	+ I2C_ACTIVE;
	229	+
	230	+ return(nack); /* not a nack is an ack */
	231	+}
	232	+
	233	+
	234	+/*-----------------------------------------------------------------------
	235	+ * if ack == I2C_ACK, ACK the byte so can continue reading, else
	236	+ * send I2C_NOACK to end the read.
	237	+ */
	238	+static uchar read_byte(int ack)
	239	+{
	240	+#ifdef CONFIG_MPC8260
	241	+ volatile ioport_t iop = ioport_addr((immap_t )CFG_IMMR, I2C_PORT);
	242	+#endif
	243	+#ifdef CONFIG_8xx
	244	+ volatile immap_t immr = (immap_t )CFG_IMMR;
	245	+#endif
	246	+ int data;
	247	+ int j;
	248	+
	249	+ /*
	250	+ * Read 8 bits, MSB first.
	251	+ */
	252	+ I2C_TRISTATE;
	253	+ I2C_SDA(1);
	254	+ data = 0;
	255	+ for(j = 0; j < 8; j++) {
	256	+ I2C_SCL(0);
	257	+ I2C_DELAY;
	258	+ I2C_SCL(1);
	259	+ I2C_DELAY;
	260	+ data <<= 1;
	261	+ data \|= I2C_READ;
	262	+ I2C_DELAY;
	263	+ }
	264	+ send_ack(ack);
	265	+
	266	+ return(data);
	267	+}
	268	+
	269	+/=====================================================================/
	270	+/* Public Functions */
	271	+/=====================================================================/
	272	+
	273	+/*-----------------------------------------------------------------------
	274	+ * Initialization
	275	+ */
	276	+void i2c_init (int speed, int slaveaddr)
	277	+{
	278	+ /*
	279	+ * WARNING: Do NOT save speed in a static variable: if the
	280	+ * I2C routines are called before RAM is initialized (to read
	281	+ * the DIMM SPD, for instance), RAM won't be usable and your
	282	+ * system will crash.
	283	+ */
	284	+ send_reset ();
	285	+}
	286	+
	287	+/*-----------------------------------------------------------------------
	288	+ * Probe to see if a chip is present. Also good for checking for the
	289	+ * completion of EEPROM writes since the chip stops responding until
	290	+ * the write completes (typically 10mSec).
	291	+ */
	292	+int i2c_probe(uchar addr)
	293	+{
	294	+ int rc;
	295	+
	296	+ /*
	297	+ * perform 1 byte write transaction with just address byte
	298	+ * (fake write)
	299	+ */
	300	+ send_start();
	301	+ rc = write_byte ((addr << 1) \| 0);
	302	+ send_stop();
	303	+
	304	+ return (rc ? 1 : 0);
	305	+}
	306	+
	307	+/*-----------------------------------------------------------------------
	308	+ * Read bytes
	309	+ */
	310	+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
	311	+{
	312	+ int shift;
	313	+ PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
	314	+ chip, addr, alen, buffer, len);
	315	+
	316	+#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
	317	+ /*
	318	+ * EEPROM chips that implement "address overflow" are ones
	319	+ * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
	320	+ * address and the extra bits end up in the "chip address"
	321	+ * bit slots. This makes a 24WC08 (1Kbyte) chip look like
	322	+ * four 256 byte chips.
	323	+ *
	324	+ * Note that we consider the length of the address field to
	325	+ * still be one byte because the extra address bits are
	326	+ * hidden in the chip address.
	327	+ */
	328	+ chip \|= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
	329	+
	330	+ PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
	331	+ chip, addr);
	332	+#endif
	333	+
	334	+ /*
	335	+ * Do the addressing portion of a write cycle to set the
	336	+ * chip's address pointer. If the address length is zero,
	337	+ * don't do the normal write cycle to set the address pointer,
	338	+ * there is no address pointer in this chip.
	339	+ */
	340	+ send_start();
	341	+ if(alen > 0) {
	342	+ if(write_byte(chip << 1)) { /* write cycle */
	343	+ send_stop();
	344	+ PRINTD("i2c_read, no chip responded %02X\n", chip);
	345	+ return(1);
	346	+ }
	347	+ shift = (alen-1) * 8;
	348	+ while(alen-- > 0) {
	349	+ if(write_byte(addr >> shift)) {
	350	+ PRINTD("i2c_read, address not <ACK>ed\n");
	351	+ return(1);
	352	+ }
	353	+ shift -= 8;
	354	+ }
	355	+ send_stop(); /* reportedly some chips need a full stop */
	356	+ send_start();
	357	+ }
	358	+ /*
	359	+ * Send the chip address again, this time for a read cycle.
	360	+ * Then read the data. On the last byte, we do a NACK instead
	361	+ * of an ACK(len == 0) to terminate the read.
	362	+ */
	363	+ write_byte((chip << 1) \| 1); /* read cycle */
	364	+ while(len-- > 0) {
	365	+ *buffer++ = read_byte(len == 0);
	366	+ }
	367	+ send_stop();
	368	+ return(0);
	369	+}
	370	+
	371	+/*-----------------------------------------------------------------------
	372	+ * Write bytes
	373	+ */
	374	+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
	375	+{
	376	+ int shift, failures = 0;
	377	+
	378	+ PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
	379	+ chip, addr, alen, buffer, len);
	380	+
	381	+ send_start();
	382	+ if(write_byte(chip << 1)) { /* write cycle */
	383	+ send_stop();
	384	+ PRINTD("i2c_write, no chip responded %02X\n", chip);
	385	+ return(1);
	386	+ }
	387	+ shift = (alen-1) * 8;
	388	+ while(alen-- > 0) {
	389	+ if(write_byte(addr >> shift)) {
	390	+ PRINTD("i2c_write, address not <ACK>ed\n");
	391	+ return(1);
	392	+ }
	393	+ shift -= 8;
	394	+ }
	395	+
	396	+ while(len-- > 0) {
	397	+ if(write_byte(*buffer++)) {
	398	+ failures++;
	399	+ }
	400	+ }
	401	+ send_stop();
	402	+ return(failures);
	403	+}
	404	+
	405	+/*-----------------------------------------------------------------------
	406	+ * Read a register
	407	+ */
	408	+uchar i2c_reg_read(uchar i2c_addr, uchar reg)
	409	+{
	410	+ uchar buf;
	411	+
	412	+ i2c_read(i2c_addr, reg, 1, &buf, 1);
	413	+
	414	+ return(buf);
	415	+}
	416	+
	417	+/*-----------------------------------------------------------------------
	418	+ * Write a register
	419	+ */
	420	+void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
	421	+{
	422	+ i2c_write(i2c_addr, reg, 1, &val, 1);
	423	+}