Commit 4dd02a752c714e1616025fceba78e121807cfc11
Committed by
Simon Glass
Simon Glass
1 parent
8ceb2429c9
Exists in
v2017.01-smarct4x
and in
30 other branches
x86: crownbay: Enable on-board SMSC superio keyboard controller
So far we only enabled one legacy serial port on the SMSC LPC47m superio chipset on Intel Crown Bay board. As the board also has dual PS/2 ports routed out, enable the keyboard controller which is i8042 compatible so that we can use PS/2 keyboard and mouse. In order to make PS/2 keyboard work with the VGA console, remove CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode using PIRQ routing table, adjust the mask in the device tree to reserve irq12 which is used by PS/2 mouse. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Showing 3 changed files with 5 additions and 7 deletions Side-by-side Diff
arch/x86/dts/crownbay.dts
| ... | ... | @@ -168,7 +168,7 @@ |
| 168 | 168 | compatible = "intel,irq-router"; |
| 169 | 169 | intel,pirq-config = "pci"; |
| 170 | 170 | intel,pirq-link = <0x60 8>; |
| 171 | - intel,pirq-mask = <0xdee0>; | |
| 171 | + intel,pirq-mask = <0xcee0>; | |
| 172 | 172 | intel,pirq-routing = < |
| 173 | 173 | /* TunnelCreek PCI devices */ |
| 174 | 174 | PCI_BDF(0, 2, 0) INTA PIRQE |
board/intel/crownbay/crownbay.c
| ... | ... | @@ -10,11 +10,12 @@ |
| 10 | 10 | #include <netdev.h> |
| 11 | 11 | #include <smsc_lpc47m.h> |
| 12 | 12 | |
| 13 | -#define SERIAL_DEV PNP_DEV(0x2e, 4) | |
| 14 | - | |
| 15 | 13 | int board_early_init_f(void) |
| 16 | 14 | { |
| 17 | - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); | |
| 15 | + lpc47m_enable_serial(PNP_DEV(LPC47M_IO_PORT, LPC47M_SP1), | |
| 16 | + UART0_BASE, UART0_IRQ); | |
| 17 | + lpc47m_enable_kbc(PNP_DEV(LPC47M_IO_PORT, LPC47M_KBC), | |
| 18 | + KBD_IRQ, MSE_IRQ); | |
| 18 | 19 | |
| 19 | 20 | return 0; |
| 20 | 21 | } |
include/configs/crownbay.h