Commit 4e422bce8a51749ff3c67eec2c8caa6377cc35ee
Committed by
Tom Rini
1 parent
7ba7917c91
Exists in
master
and in
54 other branches
ahci: cosmetics and cleanup
- print the correct speed - print all the AHCI capability flags (information taken from Linux kernel driver) - clean up some comments For example, this might show the following string: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org>
Showing 2 changed files with 19 additions and 7 deletions Side-by-side Diff
drivers/block/ahci.c
... | ... | @@ -194,7 +194,7 @@ |
194 | 194 | /* set irq mask (enables interrupts) */ |
195 | 195 | writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK); |
196 | 196 | |
197 | - /*register linkup ports */ | |
197 | + /* register linkup ports */ | |
198 | 198 | tmp = readl(port_mmio + PORT_SCR_STAT); |
199 | 199 | debug("Port %d status: 0x%x\n", i, tmp); |
200 | 200 | if ((tmp & 0xf) == 0x03) |
201 | 201 | |
... | ... | @@ -222,12 +222,13 @@ |
222 | 222 | u16 cc; |
223 | 223 | #endif |
224 | 224 | volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base; |
225 | - u32 vers, cap, impl, speed; | |
225 | + u32 vers, cap, cap2, impl, speed; | |
226 | 226 | const char *speed_s; |
227 | 227 | const char *scc_s; |
228 | 228 | |
229 | 229 | vers = readl(mmio + HOST_VERSION); |
230 | 230 | cap = probe_ent->cap; |
231 | + cap2 = readl(mmio + HOST_CAP2); | |
231 | 232 | impl = probe_ent->port_map; |
232 | 233 | |
233 | 234 | speed = (cap >> 20) & 0xf; |
... | ... | @@ -235,6 +236,8 @@ |
235 | 236 | speed_s = "1.5"; |
236 | 237 | else if (speed == 2) |
237 | 238 | speed_s = "3"; |
239 | + else if (speed == 3) | |
240 | + speed_s = "6"; | |
238 | 241 | else |
239 | 242 | speed_s = "?"; |
240 | 243 | |
... | ... | @@ -260,8 +263,9 @@ |
260 | 263 | ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s); |
261 | 264 | |
262 | 265 | printf("flags: " |
263 | - "%s%s%s%s%s%s" | |
264 | - "%s%s%s%s%s%s%s\n", | |
266 | + "%s%s%s%s%s%s%s" | |
267 | + "%s%s%s%s%s%s%s" | |
268 | + "%s%s%s%s%s%s\n", | |
265 | 269 | cap & (1 << 31) ? "64bit " : "", |
266 | 270 | cap & (1 << 30) ? "ncq " : "", |
267 | 271 | cap & (1 << 28) ? "ilck " : "", |
268 | 272 | |
... | ... | @@ -272,9 +276,16 @@ |
272 | 276 | cap & (1 << 19) ? "nz " : "", |
273 | 277 | cap & (1 << 18) ? "only " : "", |
274 | 278 | cap & (1 << 17) ? "pmp " : "", |
279 | + cap & (1 << 16) ? "fbss " : "", | |
275 | 280 | cap & (1 << 15) ? "pio " : "", |
276 | 281 | cap & (1 << 14) ? "slum " : "", |
277 | - cap & (1 << 13) ? "part " : ""); | |
282 | + cap & (1 << 13) ? "part " : "", | |
283 | + cap & (1 << 7) ? "ccc " : "", | |
284 | + cap & (1 << 6) ? "ems " : "", | |
285 | + cap & (1 << 5) ? "sxs " : "", | |
286 | + cap2 & (1 << 2) ? "apst " : "", | |
287 | + cap2 & (1 << 1) ? "nvmp " : "", | |
288 | + cap2 & (1 << 0) ? "boh " : ""); | |
278 | 289 | } |
279 | 290 | |
280 | 291 | #ifndef CONFIG_SCSI_AHCI_PLAT |
... | ... | @@ -369,7 +380,7 @@ |
369 | 380 | u32 cmd_fis_len = 5; /* five dwords */ |
370 | 381 | u8 fis[20]; |
371 | 382 | |
372 | - /*set feature */ | |
383 | + /* set feature */ | |
373 | 384 | memset(fis, 0, 20); |
374 | 385 | fis[0] = 0x27; |
375 | 386 | fis[1] = 1 << 7; |
... | ... | @@ -383,7 +394,7 @@ |
383 | 394 | readl(port_mmio + PORT_CMD_ISSUE); |
384 | 395 | |
385 | 396 | if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) { |
386 | - printf("set feature error!\n"); | |
397 | + printf("set feature error on port %d!\n", port); | |
387 | 398 | } |
388 | 399 | } |
389 | 400 |
include/ahci.h
... | ... | @@ -51,6 +51,7 @@ |
51 | 51 | #define HOST_IRQ_STAT 0x08 /* interrupt status */ |
52 | 52 | #define HOST_PORTS_IMPL 0x0c /* bitmap of implemented ports */ |
53 | 53 | #define HOST_VERSION 0x10 /* AHCI spec. version compliancy */ |
54 | +#define HOST_CAP2 0x24 /* host capabilities, extended */ | |
54 | 55 | |
55 | 56 | /* HOST_CTL bits */ |
56 | 57 | #define HOST_RESET (1 << 0) /* reset controller; self-clear */ |