ARM: OMAP: hide custom bit manipulation function sr32()

The only remaining user of the custom bit manipulation function sr32() is arch/arm/cpu/armv7/omap3/clock.c, so make it a static function in that file to prepare complete removal. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

ARM: OMAP: hide custom bit manipulation function sr32()
The only remaining user of the custom bit manipulation function sr32() is arch/arm/cpu/armv7/omap3/clock.c, so make it a static function in that file to prepare complete removal. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Wolfgang Denk · Tom Rini
1 parent e7300f463d
Showing 5 changed files with 13 additions and 16 deletions Side-by-side Diff
arch/arm/cpu/armv7/omap3/clock.c
arch/arm/cpu/armv7/syslib.c
arch/arm/include/asm/arch-omap3/sys_proto.h
arch/arm/include/asm/arch-omap4/sys_proto.h
arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -21,6 +21,19 @@
 #include <environment.h>
 #include <command.h>
  
+/*
+ * sr32 - clear & set a value in a bit range for a 32 bit address
+ */
+static inline void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
+{
+	u32 tmp, msk = 0;
+	msk = 1 << num_bits;
+	--msk;
+	tmp = readl((u32)addr) & ~(msk << start_bit);
+	tmp |= value << start_bit;
+	writel(tmp, (u32)addr);
+}
+
 /******************************************************************************
  * get_sys_clk_speed() - determine reference oscillator speed
  *                       based on known 32kHz clock and gptimer.
@@ -24,19 +24,6 @@
 			  "bne 1b":"=r" (loops):"0"(loops));
 }
  
-/*****************************************************************
- * sr32 - clear & set a value in a bit range for a 32 bit address
- *****************************************************************/
-void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
-{
-	u32 tmp, msk = 0;
-	msk = 1 << num_bits;
-	--msk;
-	tmp = readl((u32)addr) & ~(msk << start_bit);
-	tmp |= value << start_bit;
-	writel(tmp, (u32)addr);
-}
-
 /*********************************************************************
  * wait_on_value() - common routine to allow waiting for changes in
  *   volatile regs.
@@ -62,7 +62,6 @@
 void try_unlock_memory(void);
 u32 get_boot_type(void);
 void invalidate_dcache(u32);
-void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
 void make_cs1_contiguous(void);
@@ -31,7 +31,6 @@
 u32 get_device_type(void);
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
 void set_muxconf_regs_essential(void);
-void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
 void set_pl310_ctrl_reg(u32 val);
@@ -32,7 +32,6 @@
 u32 get_device_type(void);
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
 void set_muxconf_regs_essential(void);
-void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
 void setup_clocks_for_console(void);
...	...	@@ -21,6 +21,19 @@
21	21	#include <environment.h>
22	22	#include <command.h>
23	23
	24	+/*
	25	+ * sr32 - clear & set a value in a bit range for a 32 bit address
	26	+ */
	27	+static inline void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
	28	+{
	29	+ u32 tmp, msk = 0;
	30	+ msk = 1 << num_bits;
	31	+ --msk;
	32	+ tmp = readl((u32)addr) & ~(msk << start_bit);
	33	+ tmp \|= value << start_bit;
	34	+ writel(tmp, (u32)addr);
	35	+}
	36	+
24	37	/******************************************************************************
25	38	* get_sys_clk_speed() - determine reference oscillator speed
26	39	* based on known 32kHz clock and gptimer.
...	...	@@ -24,19 +24,6 @@
24	24	"bne 1b":"=r" (loops):"0"(loops));
25	25	}
26	26
27		-/*****************************************************************
28		- * sr32 - clear & set a value in a bit range for a 32 bit address
29		- *****************************************************************/
30		-void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
31		-{
32		- u32 tmp, msk = 0;
33		- msk = 1 << num_bits;
34		- --msk;
35		- tmp = readl((u32)addr) & ~(msk << start_bit);
36		- tmp \|= value << start_bit;
37		- writel(tmp, (u32)addr);
38		-}
39		-
40	27	/*********************************************************************
41	28	* wait_on_value() - common routine to allow waiting for changes in
42	29	* volatile regs.
...	...	@@ -62,7 +62,6 @@
62	62	void try_unlock_memory(void);
63	63	u32 get_boot_type(void);
64	64	void invalidate_dcache(u32);
65		-void sr32(void *, u32, u32, u32);
66	65	u32 wait_on_value(u32, u32, void *, u32);
67	66	void sdelay(unsigned long);
68	67	void make_cs1_contiguous(void);
...	...	@@ -31,7 +31,6 @@
31	31	u32 get_device_type(void);
32	32	void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
33	33	void set_muxconf_regs_essential(void);
34		-void sr32(void *, u32, u32, u32);
35	34	u32 wait_on_value(u32, u32, void *, u32);
36	35	void sdelay(unsigned long);
37	36	void set_pl310_ctrl_reg(u32 val);
...	...	@@ -32,7 +32,6 @@
32	32	u32 get_device_type(void);
33	33	void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
34	34	void set_muxconf_regs_essential(void);
35		-void sr32(void *, u32, u32, u32);
36	35	u32 wait_on_value(u32, u32, void *, u32);
37	36	void sdelay(unsigned long);
38	37	void setup_clocks_for_console(void);