Eric Lee / smarc-uboot

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Commit 4ef218f6fdf8d747f4589da5252b004e7d2c2876

Authored by Wolfgang Denk
1 parent bf6a9ca9b2
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Coding style cleanup; update CHANGELOG. 

Signed-off-by: Wolfgang Denk <wd@denx.de>

Showing 11 changed files with 716 additions and 388 deletions Side-by-side Diff

  1 +commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f
  2 +Author: Wolfgang Denk <wd@denx.de>
  3 +Date: Fri Jul 6 02:50:19 2007 +0200
  4 +
  5 + Code cleanup and default config update for STC GP3 SSA board.
  6 +
  7 + Signed-off-by: Wolfgang Denk <wd@denx.de>
  8 +
  9 +commit b44896215a09c60fa40cae906f7ed207bbc2c492
  10 +Author: Sergei Poselenov <sposelenov@emcraft.com>
  11 +Date: Thu Jul 5 08:17:37 2007 +0200
  12 +
  13 + Merged POST framework with the current TOT.
  14 +
  15 + Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
  16 +
  17 +commit f780b83316d9af1f61d71cc88b1917b387b9b995
  18 +Author: Niklaus Giger <niklausgiger@gmx.ch>
  19 +Date: Wed Jun 27 18:11:38 2007 +0200
  20 +
  21 + resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
  22 +
  23 + Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
  24 +
  25 +commit 04e6c38b766eaa2f3287561563c9e215e0c3a0d4
  26 +Author: Stefan Roese <sr@denx.de>
  27 +Date: Wed Jul 4 10:06:30 2007 +0200
  28 +
  29 + ppc4xx: Update lwmon5 board
  30 +
  31 + - Add optional ECC generation routine to preserve existing
  32 + RAM values. This is needed for the Linux log-buffer support
  33 + - Add optional DDR2 setup with CL=4
  34 + - GPIO50 not used anymore
  35 + - Lime register setup added
  36 +
  37 + Signed-off-by: Stefan Roese <sr@denx.de>
  38 +
  39 +commit 1f2a05898658900dc5717761e27abf2052e67e13
  40 +Author: Mushtaq Khan <mushtaqk_921@yahoo.co.in>
  41 +Date: Sat Jun 30 18:50:48 2007 +0200
  42 +
  43 + Fix S-ATA support.
  44 +
  45 + Signed-off-by: mushtaq khan <mushtaqk_921@yahoo.co.in>
  46 +
  47 +commit a5d71e290f3673269be8eefb4ec44f53412f9461
  48 +Author: Heiko Schocher <hs@pollux.denx.de>
  49 +Date: Mon Jun 25 19:11:37 2007 +0200
  50 +
  51 + [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
  52 +
  53 + Signed-off-by: Heiko Schocher <hs@denx.de>
  54 +
  55 +commit a1bd6200eccd3a02040a955d5f43d3ee1fc9f93b
  56 +Author: Niklaus Giger <niklaus.giger@nestal.com>
  57 +Date: Mon Jun 25 17:03:13 2007 +0200
  58 +
  59 + ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
  60 +
  61 + This patch prints the DDR status registers upon machine check
  62 + interrupt on the 440EPx/GRx. This can be useful especially when
  63 + ECC support is enabled.
  64 +
  65 + I added some small changes to the original patch from Niklaus to
  66 + make it compile clean.
  67 +
  68 + Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
  69 + Signed-off-by: Stefan Roese <sr@denx.de>
  70 +
  71 +commit 807018fb7faceb429ce0cb47baa2073746b33a4e
  72 +Author: Niklaus Giger <niklaus.giger@nestal.com>
  73 +Date: Mon Jun 25 16:50:55 2007 +0200
  74 +
  75 + ppc4xx: Fix O=buildir builds
  76 +
  77 + This patch fixes the problem to assemble cpu/ppc4xx/start.S
  78 + experienced last week where building failed having specified
  79 + O=../build.sequoia.
  80 +
  81 + Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
  82 +
  83 +commit 466fff1a7bb5fe764a06450626f6098219f446b8
  84 +Author: Stefan Roese <sr@denx.de>
  85 +Date: Mon Jun 25 15:57:39 2007 +0200
  86 +
  87 + ppc4xx: Add pci_pre_init() for 405 boards
  88 +
  89 + This patch removes the CFG_PCI_PRE_INIT option completely, since
  90 + it's not needed anymore with the patch from Matthias Fuchs with
  91 + the "weak" pci_pre_init() implementation.
  92 +
  93 + Signed-off-by: Stefan Roese <sr@denx.de>
  94 +
  95 +commit 6f35c53166213c24a5a0e2390ed861136ff73870
  96 +Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
  97 +Date: Sun Jun 24 17:41:21 2007 +0200
  98 +
  99 + ppc4xx: Maintenance patch for esd's CPCI405 derivats
  100 +
  101 + -add pci_pre_init() for pci interrupt fixup code
  102 + -disable phy sleep mode via reset_phy() function
  103 + -use correct io accessors
  104 + -cleanup
  105 +
  106 + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
  107 +
  108 +commit 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8
  109 +Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
  110 +Date: Sun Jun 24 17:23:41 2007 +0200
  111 +
  112 + ppc4xx: Add pci_pre_init() for 405 boards
  113 +
  114 + This patch adds support for calling a plattform dependant
  115 + pci_pre_init() function for 405 boards. This can be used to
  116 + move the current pci_405gp_fixup_irq() function into the
  117 + board code.
  118 +
  119 + This patch also makes the CFG_PCI_PRE_INIT define obsolete.
  120 + A default function with 'weak' attribute is used when
  121 + a board specific pci_pre_init() is not implemented.
  122 +
  123 + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
  124 +
  125 +commit 1636d1c8529c006d106287cfbc20cd0a246fe1cb
  126 +Author: Wolfgang Denk <wd@denx.de>
  127 +Date: Fri Jun 22 23:59:00 2007 +0200
  128 +
  129 + Coding stylke cleanup; rebuild CHANGELOG
  130 +
1 131 commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
2 132 Author: Igor Lisitsin <igor@emcraft.com>
3 133 Date: Wed Apr 18 14:55:19 2007 +0400
... ... @@ -22,6 +152,34 @@
22 152 Signed-off-by: Igor Lisitsin <igor@emcraft.com>
23 153 --
24 154  
  155 +commit 566a494f592ae3b3c0785d90d4e1ba45574880c4
  156 +Author: Heiko Schocher <hs@pollux.denx.de>
  157 +Date: Fri Jun 22 19:11:54 2007 +0200
  158 +
  159 + [PCS440EP] upgrade the PCS440EP board:
  160 + - Show on the Status LEDs, some States of the board.
  161 + - Get the MAC addresses from the EEProm
  162 + - use PREBOOT
  163 + - use the CF on the board.
  164 + - check the U-Boot image in the Flash with a SHA1
  165 + checksum.
  166 + - use dynamic TLB entries generation for the SDRAM
  167 +
  168 + Signed-off-by: Heiko Schocher <hs@denx.de>
  169 +
  170 +commit 3a1f5c81b0b9557817a789bece839905581c2205
  171 +Author: Stefan Roese <sr@denx.de>
  172 +Date: Fri Jun 22 16:58:40 2007 +0200
  173 +
  174 + ppc4xx: Fix problem with extended program_tlb() funtion
  175 +
  176 + The recently extended program_tlb() function had a problem when
  177 + multiple TLB's had to be setup (for example with 512MB of SDRAM). The
  178 + virtual address was not incremented. This patch fixes this issue
  179 + and is tested on Katmai with 512MB SDRAM.
  180 +
  181 + Signed-off-by: Stefan Roese <sr@denx.de>
  182 +
25 183 commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
26 184 Author: Rafal Jaworowski <raj@semihalf.com>
27 185 Date: Fri Jun 22 14:58:04 2007 +0200
... ... @@ -526,6 +684,14 @@
526 684  
527 685 Signed-off-by: Stefan Roese <sr@denx.de>
528 686  
  687 +commit 822d55365bb557e084d0e33625a6dedcc866110b
  688 +Author: Jon Loeliger <jdl@freescale.com>
  689 +Date: Wed May 23 14:09:46 2007 -0500
  690 +
  691 + Add LIST_86xx MAKEALL target for PowerPC builds.
  692 +
  693 + Signed-off-by: Jon Loeliger <jdl@freescale.com>
  694 +
529 695 commit 9f0077abd69f7a7c756a915b961037302be3e6f2
530 696 Author: Stefan Roese <sr@denx.de>
531 697 Date: Tue May 22 12:48:09 2007 +0200
... ... @@ -574,6 +740,17 @@
574 740  
575 741 Makefile permissions
576 742  
  743 +commit 255a3577c848706441daee0174543efe205a77f8
  744 +Author: Kim Phillips <kim.phillips@freescale.com>
  745 +Date: Wed May 16 16:52:19 2007 -0500
  746 +
  747 + Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
  748 +
  749 + For all practical u-boot purposes, TSECs don't differ throughout the
  750 + mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
  751 +
  752 + Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
  753 +
577 754 commit 70124c2602ae2d4c5d3dba05b482d91548242de8
578 755 Author: Stefano Babic <sbabic@denx.de>
579 756 Date: Wed May 16 14:49:12 2007 +0200
... ... @@ -615,6 +792,109 @@
615 792  
616 793 Coding Style Cleanup, new CHANGELOG
617 794  
  795 +commit 3162eb836903c8b247fdc7470dd39bfa6996f495
  796 +Author: Wolfgang Denk <wd@denx.de>
  797 +Date: Tue May 15 23:38:05 2007 +0200
  798 +
  799 + Minor coding style cleanup.
  800 +
  801 +commit 66d9dbec1cc27d6398ee6cf84639dbe14971251e
  802 +Author: mushtaq khan <mushtaq_k@procsys.com>
  803 +Date: Fri Apr 20 14:23:02 2007 +0530
  804 +
  805 + Add driver for S-ATA-controller on Intel processors with South
  806 + Bridge, ICH-5, ICH-6 and ICH-7.
  807 +
  808 + Implementation:
  809 +
  810 + 1. Code is divided in to two files. All functions, which are
  811 + controller specific are kept in "drivers/ata_piix.c" file and
  812 + functions, which are not controller specific, are kept in
  813 + "common/cmd_sata.c" file.
  814 +
  815 + 2. Reading and Writing from the S-ATA drive is done using PIO method.
  816 +
  817 + 3. Driver can be configured for 48-bit addressing by defining macro
  818 + CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
  819 + addressing.
  820 +
  821 + 4. S-ATA read function is hooked to the File system, commands like
  822 + ext2ls and ext2load file can be used. This has been tested.
  823 +
  824 + 5. U-Boot command "SATA_init" is added, which initializes the S-ATA
  825 + controller and identifies the S-ATA drives connected to it.
  826 +
  827 + 6. U-Boot command "sata" is added, which is used to read/write, print
  828 + partition table and get info about the drives present. This I have
  829 + implemented in same way as "ide" command is implemented in U-Boot.
  830 +
  831 + 7. This driver is for S-ATA in native mode.
  832 +
  833 + 8. This driver does not support the Native command queuing and
  834 + Hot-plugging.
  835 +
  836 + Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
  837 +
  838 +commit 644e6fb4eb8be90ea04ba34b643a8bf019d680e0
  839 +Author: mushtaq khan <mushtaq_k@procsys.com>
  840 +Date: Mon Apr 30 15:57:22 2007 +0530
  841 +
  842 + Fixes bug clearing the bss section for i386
  843 +
  844 + Hi,
  845 + There is a bug in the code of clearing the bss section for processor
  846 + i386.(File: cpu/i386/start.S)
  847 + In the code, bss_start addr (starting addr of bss section) is put into
  848 + the register %eax, but the code which clears the bss section refers to
  849 + the addr pointed by %edi.
  850 +
  851 + This patch fixes this bug by putting bss_start into %edi register.
  852 +
  853 + Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
  854 +
  855 +commit c3243cf7b490057277d61acffe4ad0946f9eb4a4
  856 +Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
  857 +Date: Mon Apr 30 16:47:28 2007 -0500
  858 +
  859 + Add support for BCM5464 Quad Phy
  860 +
  861 + Added support for Broadcom's BCM5464 Quad Phy
  862 +
  863 + Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
  864 +
  865 +commit 1b305bdc754c8468e1d5d858f5dcf8a7a0a4bb7a
  866 +Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
  867 +Date: Wed May 9 08:10:57 2007 +0800
  868 +
  869 + Search the exception table with linear algorithm
  870 +
  871 + Search the exception table with linear algorithm instead of
  872 + bisecting algorithm.
  873 + Because the exception table might be unsorted.
  874 +
  875 + Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
  876 +
  877 +commit 5dfaa50eb819686bfba1927e8c5b8a70a4d65fd3
  878 +Author: Aubrey.Li <aubrey.adi@gmail.com>
  879 +Date: Mon May 14 11:47:35 2007 +0800
  880 +
  881 + Fix compilation issues on MACOSX
  882 +
  883 + Singed-off-by: Marc Hoffman <Marc.Hoffman@analog.com>
  884 + Signed-off-by: Aubrey Li <aubrey.adi@gmail.com>
  885 +
  886 +commit 56fd7162985c412317bbf763a225fba23c64fd31
  887 +Author: Stephen Williams <steve@icarus.com>
  888 +Date: Tue May 15 07:55:42 2007 -0700
  889 +
  890 + Fix for compile of JSE target
  891 +
  892 + The attached patch fixes the compile of the JSE board in the
  893 + denx git as of 14 may 2007. It is an extremely simple patch,
  894 + it just adds the missing define of CFG_SYSTEMACE_WIDTH.
  895 +
  896 + Fix to compile JSE against 20070514 git of u-boot
  897 +
618 898 commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
619 899 Author: Stefan Roese <sr@denx.de>
620 900 Date: Fri May 11 12:01:49 2007 +0200
... ... @@ -954,6 +1234,20 @@
954 1234  
955 1235 Signed-off-by: Stefan Roese <sr@denx.de>
956 1236  
  1237 +commit 2f550ab976405300f5b07bf2890800840d0aa05f
  1238 +Author: Timur Tabi <timur@freescale.com>
  1239 +Date: Sat May 5 08:12:30 2007 +0200
  1240 +
  1241 + 5xxx: write MAC address to mac-address and local-mac-address
  1242 +
  1243 + Some device trees have a mac-address property, some have local-mac-address,
  1244 + and some have both. To support all of these device trees, ftp_cpu_setup()
  1245 + should write the MAC address to mac-address and local-mac-address, if they
  1246 + exist.
  1247 +
  1248 + Signed-off-by: Timur Tabi <timur@freescale.com>
  1249 + Acked-by: Grant Likely <grant.likely@secretlab.ca>
  1250 +
957 1251 commit a79886590593ba1d667c840caa4940c61639f18f
958 1252 Author: Thomas Knobloch <knobloch@siemens.com>
959 1253 Date: Sat May 5 07:04:42 2007 +0200
960 1254  
... ... @@ -1117,12 +1411,35 @@
1117 1411  
1118 1412 Signed-off-by: Stefan Roese <sr@denx.de>
1119 1413  
  1414 +commit 864aa6a6a466fcb92bf32b1d7dba79cd709b52c9
  1415 +Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
  1416 +Date: Sun Apr 29 14:01:54 2007 +0200
  1417 +
  1418 + [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
  1419 +
  1420 + MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
  1421 + message. Use PVR to distinguish between the two variants, and print proper CPU
  1422 + information.
  1423 +
  1424 + Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
  1425 + Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
  1426 + Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
  1427 +
1120 1428 commit 5c5d3242935cf3543af01142627494434834cf98
1121 1429 Author: Kim Phillips <kim.phillips@freescale.com>
1122 1430 Date: Wed Apr 25 12:34:38 2007 -0500
1123 1431  
1124 1432 mpc83xx: minor fixups for 8313rdb introduction
1125 1433  
  1434 +commit ada4d40091f6ed4a4f0040e08d20db21967e4a67
  1435 +Author: Ladislav Michl <ladis@linux-mips.org>
  1436 +Date: Wed Apr 25 16:01:26 2007 +0200
  1437 +
  1438 + [PATCH] simplify silent console
  1439 +
  1440 + Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
  1441 + Acked-by: Stefan Roese <sr@denx.de>
  1442 +
1126 1443 commit 144876a380f5756f57412caf74c1d6dc201dd796
1127 1444 Author: Michal Simek <monstr@monstr.eu>
1128 1445 Date: Tue Apr 24 23:01:02 2007 +0200
... ... @@ -1418,6 +1735,58 @@
1418 1735 mpc83xx: Add register definitions for MPC831x.
1419 1736  
1420 1737 Signed-off-by: Scott Wood <scottwood@freescale.com>
  1738 +
  1739 +commit 7fc4c71a143be8666d70803fb25ae60379c95622
  1740 +Author: Stefan Roese <sr@denx.de>
  1741 +Date: Mon Apr 23 15:39:59 2007 +0200
  1742 +
  1743 + Fix file mode
  1744 +
  1745 + Signed-off-by: Stefan Roese <sr@denx.de>
  1746 +
  1747 +commit 38257988abfe74d459ca2ad748b109ca04e4efe1
  1748 +Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
  1749 +Date: Mon Apr 23 15:30:39 2007 +0200
  1750 +
  1751 + [PATCH] Avoid assigning PCI resources from zero address
  1752 +
  1753 + If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
  1754 + core complains and IDE drivers fails to work. Also, assigning zero to a BAR
  1755 + was illegal according to PCI 2.1 (the later revisions seem to have excluded the
  1756 + sentence about "0" being considered an invalid address) -- so, use a reasonable
  1757 + starting value of 0x1000 (that's what the most Linux archs are using).
  1758 +
  1759 + Alternatively, one might have fixed the calls to pci_set_region() individually
  1760 + (some code even seems to have taken care of this issue) but that would have
  1761 + been a lot more work. :-)
  1762 +
  1763 + Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
  1764 + Acked-by: Stefan Roese <sr@denx.de>
  1765 +
  1766 +commit afb903a2eb9436baa9270ccc0c27082d86497d89
  1767 +Author: Jeffrey Mann <mannj@embeddedplanet.com>
  1768 +Date: Mon Apr 23 14:00:11 2007 +0200
  1769 +
  1770 + [patch] setenv(...) can delete environmentalvariables
  1771 +
  1772 + update setenv() function so that entering a NULL value for the
  1773 + variable's value will delete the environmental variable
  1774 +
  1775 + Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
  1776 + Acked-by: Stefan Roese <sr@denx.de>
  1777 +
  1778 +commit 36f104e5caa747d568eff26b369565af57c2ffa6
  1779 +Author: Mike Frysinger <vapier@gentoo.org>
  1780 +Date: Mon Apr 23 13:54:24 2007 +0200
  1781 +
  1782 + [patch] use unsigned char in smc91111 driver for mac
  1783 +
  1784 + the v_mac variable in the smc91111 driver is declared as a signed char ...
  1785 + this causes problems when one of the bytes in the MAC is "signed" like 0xE0
  1786 + because when it gets printed out, you get a display like:
  1787 + 0xFFFFFFE0 and that's no good
  1788 +
  1789 + Signed-off-by: Mike Frysinger <vapier@gentoo.org>
1421 1790  
1422 1791 commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
1423 1792 Author: Stefan Roese <sr@denx.de>
board/esd/cpci405/cpci405.c
Diff comments   View file @ 4ef218f
... ... @@ -31,7 +31,7 @@
31 31  
32 32 DECLARE_GLOBAL_DATA_PTR;
33 33  
34   -extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
  34 +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
35 35 #if 0
36 36 #define FPGA_DEBUG
37 37 #endif
... ... @@ -54,8 +54,6 @@
54 54 * include common fpga code (for esd boards)
55 55 */
56 56 #include "../common/fpga.c"
57   -
58   -
59 57 #include "../common/auto_update.h"
60 58  
61 59 #ifdef CONFIG_CPCI405AB
62 60  
... ... @@ -88,13 +86,11 @@
88 86  
89 87 int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
90 88  
91   -
92 89 /* Prototypes */
93 90 int cpci405_version(void);
94 91 int gunzip(void *, int, unsigned char *, unsigned long *);
95 92 void lxt971_no_sleep(void);
96 93  
97   -
98 94 int board_early_init_f (void)
99 95 {
100 96 #ifndef CONFIG_CPCI405_VER2
101 97  
... ... @@ -113,10 +109,10 @@
113 109 /*
114 110 * First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
115 111 */
116   - out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
117   - out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
  112 + out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
  113 + out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
118 114 out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
119   - out32(GPIO0_OR, 0); /* pull prg low */
  115 + out32(GPIO0_OR, 0); /* pull prg low */
120 116  
121 117 /*
122 118 * Boot onboard FPGA
123 119  
124 120  
125 121  
126 122  
127 123  
128 124  
129 125  
130 126  
131 127  
132 128  
133 129  
134 130  
... ... @@ -178,51 +174,48 @@
178 174 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
179 175 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
180 176 */
181   - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
182   - mtdcr(uicer, 0x00000000); /* disable all ints */
183   - mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
  177 + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  178 + mtdcr(uicer, 0x00000000); /* disable all ints */
  179 + mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
184 180 #ifdef CONFIG_CPCI405_6U
185 181 if (cpci405_version() == 3) {
186   - mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
  182 + mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
187 183 } else {
188   - mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
  184 + mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
189 185 }
190 186 #else
191   - mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
  187 + mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
192 188 #endif
193   - mtdcr(uictr, 0x10000000); /* set int trigger levels */
194   - mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
195   - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  189 + mtdcr(uictr, 0x10000000); /* set int trigger levels */
  190 + mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
  191 + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
196 192  
197 193 return 0;
198 194 }
199 195  
200   -
201 196 /* ------------------------------------------------------------------------- */
202 197  
203 198 int ctermm2(void)
204 199 {
205 200 #ifdef CONFIG_CPCI405_VER2
206   - return 0; /* no, board is cpci405 */
  201 + return 0; /* no, board is cpci405 */
207 202 #else
208 203 if ((*(unsigned char *)0xf0000400 == 0x00) &&
209 204 (*(unsigned char *)0xf0000401 == 0x01))
210   - return 0; /* no, board is cpci405 */
  205 + return 0; /* no, board is cpci405 */
211 206 else
212   - return -1; /* yes, board is cterm-m2 */
  207 + return -1; /* yes, board is cterm-m2 */
213 208 #endif
214 209 }
215 210  
216   -
217 211 int cpci405_host(void)
218 212 {
219 213 if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
220   - return -1; /* yes, board is cpci405 host */
  214 + return -1; /* yes, board is cpci405 host */
221 215 else
222   - return 0; /* no, board is cpci405 adapter */
  216 + return 0; /* no, board is cpci405 adapter */
223 217 }
224 218  
225   -
226 219 int cpci405_version(void)
227 220 {
228 221 unsigned long cntrl0Reg;
... ... @@ -235,8 +228,8 @@
235 228 mtdcr(cntrl0, cntrl0Reg | 0x03000000);
236 229 out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000);
237 230 out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000);
238   - udelay(1000); /* wait some time before reading input */
239   - value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
  231 + udelay(1000); /* wait some time before reading input */
  232 + value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
240 233  
241 234 /*
242 235 * Restore GPIO settings
243 236  
... ... @@ -262,13 +255,11 @@
262 255 }
263 256 }
264 257  
265   -
266 258 int misc_init_f (void)
267 259 {
268 260 return 0; /* dummy implementation */
269 261 }
270 262  
271   -
272 263 int misc_init_r (void)
273 264 {
274 265 unsigned long cntrl0Reg;
... ... @@ -432,7 +423,6 @@
432 423 return (0);
433 424 }
434 425  
435   -
436 426 /*
437 427 * Check Board Identity:
438 428 */
... ... @@ -488,7 +478,7 @@
488 478 }
489 479  
490 480 #ifndef CONFIG_CPCI405_VER2
491   - puts ("\nFPGA: ");
  481 + puts ("\nFPGA: ");
492 482  
493 483 /* display infos on fpgaimage */
494 484 index = 15;
... ... @@ -515,7 +505,6 @@
515 505 return (4*1024*1024 << ((val & 0x000e0000) >> 17));
516 506 }
517 507  
518   -
519 508 void reset_phy(void)
520 509 {
521 510 #ifdef CONFIG_LXT971_NO_SLEEP
... ... @@ -527,7 +516,6 @@
527 516 #endif
528 517 }
529 518  
530   -
531 519 /* ------------------------------------------------------------------------- */
532 520  
533 521 #ifdef CONFIG_CPCI405_VER2
... ... @@ -550,7 +538,6 @@
550 538 #endif /* CONFIG_IDE_RESET */
551 539 #endif /* CONFIG_CPCI405_VER2 */
552 540  
553   -
554 541 #if defined(CONFIG_PCI)
555 542 void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
556 543 {
557 544  
558 545  
559 546  
... ... @@ -585,14 +572,13 @@
585 572 #endif /* defined(CONFIG_PCI) */
586 573  
587 574  
588   -
589 575 #ifdef CONFIG_CPCI405AB
590 576  
591   -#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
  577 +#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
592 578 |= CFG_FPGA_MODE_1WIRE_DIR)
593   -#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
  579 +#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
594 580 &= ~CFG_FPGA_MODE_1WIRE_DIR)
595   -#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
  581 +#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
596 582 & CFG_FPGA_MODE_1WIRE)
597 583  
598 584 /*
... ... @@ -615,7 +601,6 @@
615 601 return result;
616 602 }
617 603  
618   -
619 604 /*
620 605 * Send 1 a 1-wire write bit.
621 606 * Provide 10us recovery time.
... ... @@ -641,7 +626,6 @@
641 626 }
642 627 }
643 628  
644   -
645 629 /*
646 630 * Read a bit from the 1-wire bus and return it.
647 631 * Provide 10us recovery time.
... ... @@ -661,7 +645,6 @@
661 645 return result;
662 646 }
663 647  
664   -
665 648 void OWWriteByte(int data)
666 649 {
667 650 int loop;
... ... @@ -672,7 +655,6 @@
672 655 }
673 656 }
674 657  
675   -
676 658 int OWReadByte(void)
677 659 {
678 660 int loop, result = 0;
... ... @@ -687,7 +669,6 @@
687 669 return result;
688 670 }
689 671  
690   -
691 672 int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
692 673 {
693 674 volatile unsigned short val;
... ... @@ -727,7 +708,6 @@
727 708 "onewire - Read 1-write ID\n",
728 709 NULL
729 710 );
730   -
731 711  
732 712 #define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
733 713 #define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/
board/pcs440ep/pcs440ep.c
Diff comments   View file @ 4ef218f
... ... @@ -197,14 +197,13 @@
197 197 * - The checksum, stored in the last 2 Bytes, is correct
198 198 */
199 199 if ((strncmp (buf,"ATR",3) != 0) ||
200   - ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
201   - ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1]))
202   - {
  200 + ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
  201 + ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
203 202 /* EEprom is not programmed */
204 203 printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
205 204 } else {
206 205 /* get the MACs */
207   - sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
  206 + sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
208 207 buf[3],
209 208 buf[4],
210 209 buf[5],
... ... @@ -212,7 +211,7 @@
212 211 buf[7],
213 212 buf[8]);
214 213 setenv ("ethaddr", (char *) mac);
215   - sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
  214 + sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
216 215 buf[9],
217 216 buf[10],
218 217 buf[11],
... ... @@ -378,7 +377,7 @@
378 377 org[i] = ptroff[i];
379 378 ptroff[i] = 0;
380 379 }
381   -
  380 +
382 381 sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
383 382  
384 383 if (docheck == 2) {
... ... @@ -796,7 +795,7 @@
796 795 unsigned char output[20];
797 796 int len;
798 797 int i;
799   -
  798 +
800 799 data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
801 800 len = simple_strtoul (argv[2], NULL, 16);
802 801 sha1_csum (data, len, (unsigned char *)output);
... ... @@ -823,7 +822,7 @@
823 822 } else {
824 823 rcode = pcs440ep_sha1 (0);
825 824 }
826   - return rcode;
  825 + return rcode;
827 826 }
828 827 return rcode;
829 828 }
... ... @@ -1222,7 +1222,7 @@
1222 1222 */
1223 1223 #ifdef CONFIG_440
1224 1224 .globl dcache_disable
1225   - .globl icache_disable
  1225 + .globl icache_disable
1226 1226 .globl icache_enable
1227 1227 dcache_disable:
1228 1228 icache_disable:
include/configs/pcs440ep.h
Diff comments   View file @ 4ef218f
... ... @@ -480,9 +480,9 @@
480 480 /* Offset for alternate registers */
481 481 #define CFG_ATA_ALT_OFFSET (0x0000)
482 482  
483   -/* This addresses need to be shifted one place to the left
  483 +/* These addresses need to be shifted one place to the left
484 484 * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
485   - * This values are shifted
  485 + * These values are shifted
486 486 */
487 487 #define CFG_ATA_PORT_ADDR(port) ((port) << 1)
488 488  
... ... @@ -17,7 +17,7 @@
17 17 * You should have received a copy of the GNU Lesser General Public
18 18 * License along with this library; if not, write to the Free Software
19 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20   - * MA 02110-1301 USA
  20 + * MA 02110-1301 USA
21 21 */
22 22 /*
23 23 * The SHA-1 standard was published by NIST in 1993.
24 24  
25 25  
26 26  
27 27  
28 28  
29 29  
30 30  
31 31  
32 32  
33 33  
34 34  
35 35  
36 36  
37 37  
38 38  
39 39  
40 40  
41 41  
42 42  
43 43  
... ... @@ -35,76 +35,76 @@
35 35 #define SHA1_SUM_LEN 20
36 36  
37 37 /**
38   - * \brief SHA-1 context structure
  38 + * \brief SHA-1 context structure
39 39 */
40 40 typedef struct
41 41 {
42   - unsigned long total[2]; /*!< number of bytes processed */
43   - unsigned long state[5]; /*!< intermediate digest state */
44   - unsigned char buffer[64]; /*!< data block being processed */
  42 + unsigned long total[2]; /*!< number of bytes processed */
  43 + unsigned long state[5]; /*!< intermediate digest state */
  44 + unsigned char buffer[64]; /*!< data block being processed */
45 45 }
46 46 sha1_context;
47 47  
48 48 /**
49   - * \brief SHA-1 context setup
  49 + * \brief SHA-1 context setup
50 50 *
51   - * \param ctx SHA-1 context to be initialized
  51 + * \param ctx SHA-1 context to be initialized
52 52 */
53 53 void sha1_starts( sha1_context *ctx );
54 54  
55 55 /**
56   - * \brief SHA-1 process buffer
  56 + * \brief SHA-1 process buffer
57 57 *
58   - * \param ctx SHA-1 context
  58 + * \param ctx SHA-1 context
59 59 * \param input buffer holding the data
60   - * \param ilen length of the input data
  60 + * \param ilen length of the input data
61 61 */
62 62 void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
63 63  
64 64 /**
65   - * \brief SHA-1 final digest
  65 + * \brief SHA-1 final digest
66 66 *
67   - * \param ctx SHA-1 context
  67 + * \param ctx SHA-1 context
68 68 * \param output SHA-1 checksum result
69 69 */
70 70 void sha1_finish( sha1_context *ctx, unsigned char output[20] );
71 71  
72 72 /**
73   - * \brief Output = SHA-1( input buffer )
  73 + * \brief Output = SHA-1( input buffer )
74 74 *
75 75 * \param input buffer holding the data
76   - * \param ilen length of the input data
  76 + * \param ilen length of the input data
77 77 * \param output SHA-1 checksum result
78 78 */
79 79 void sha1_csum( unsigned char *input, int ilen,
80   - unsigned char output[20] );
  80 + unsigned char output[20] );
81 81  
82 82 /**
83   - * \brief Output = SHA-1( file contents )
  83 + * \brief Output = SHA-1( file contents )
84 84 *
85   - * \param path input file name
  85 + * \param path input file name
86 86 * \param output SHA-1 checksum result
87   - * \return 0 if successful, or 1 if fopen failed
  87 + * \return 0 if successful, or 1 if fopen failed
88 88 */
89 89 int sha1_file( char *path, unsigned char output[20] );
90 90  
91 91 /**
92   - * \brief Output = HMAC-SHA-1( input buffer, hmac key )
  92 + * \brief Output = HMAC-SHA-1( input buffer, hmac key )
93 93 *
94   - * \param key HMAC secret key
  94 + * \param key HMAC secret key
95 95 * \param keylen length of the HMAC key
96 96 * \param input buffer holding the data
97   - * \param ilen length of the input data
  97 + * \param ilen length of the input data
98 98 * \param output HMAC-SHA-1 result
99 99 */
100 100 void sha1_hmac( unsigned char *key, int keylen,
101   - unsigned char *input, int ilen,
102   - unsigned char output[20] );
  101 + unsigned char *input, int ilen,
  102 + unsigned char output[20] );
103 103  
104 104 /**
105   - * \brief Checkup routine
  105 + * \brief Checkup routine
106 106 *
107   - * \return 0 if successful, or 1 if the test failed
  107 + * \return 0 if successful, or 1 if the test failed
108 108 */
109 109 int sha1_self_test( void );
110 110  
... ... @@ -36,103 +36,99 @@
36 36 * 32-bit integer manipulation macros (big endian)
37 37 */
38 38 #ifndef GET_UINT32_BE
39   -#define GET_UINT32_BE(n,b,i) \
40   -{ \
41   - (n) = ( (unsigned long) (b)[(i) ] << 24 ) \
42   - | ( (unsigned long) (b)[(i) + 1] << 16 ) \
43   - | ( (unsigned long) (b)[(i) + 2] << 8 ) \
44   - | ( (unsigned long) (b)[(i) + 3] ); \
  39 +#define GET_UINT32_BE(n,b,i) { \
  40 + (n) = ( (unsigned long) (b)[(i) ] << 24 ) \
  41 + | ( (unsigned long) (b)[(i) + 1] << 16 ) \
  42 + | ( (unsigned long) (b)[(i) + 2] << 8 ) \
  43 + | ( (unsigned long) (b)[(i) + 3] ); \
45 44 }
46 45 #endif
47 46 #ifndef PUT_UINT32_BE
48   -#define PUT_UINT32_BE(n,b,i) \
49   -{ \
50   - (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
51   - (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
52   - (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
53   - (b)[(i) + 3] = (unsigned char) ( (n) ); \
  47 +#define PUT_UINT32_BE(n,b,i) { \
  48 + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
  49 + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
  50 + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
  51 + (b)[(i) + 3] = (unsigned char) ( (n) ); \
54 52 }
55 53 #endif
56 54  
57 55 /*
58 56 * SHA-1 context setup
59 57 */
60   -void sha1_starts( sha1_context *ctx )
  58 +void sha1_starts (sha1_context * ctx)
61 59 {
62   - ctx->total[0] = 0;
63   - ctx->total[1] = 0;
  60 + ctx->total[0] = 0;
  61 + ctx->total[1] = 0;
64 62  
65   - ctx->state[0] = 0x67452301;
66   - ctx->state[1] = 0xEFCDAB89;
67   - ctx->state[2] = 0x98BADCFE;
68   - ctx->state[3] = 0x10325476;
69   - ctx->state[4] = 0xC3D2E1F0;
  63 + ctx->state[0] = 0x67452301;
  64 + ctx->state[1] = 0xEFCDAB89;
  65 + ctx->state[2] = 0x98BADCFE;
  66 + ctx->state[3] = 0x10325476;
  67 + ctx->state[4] = 0xC3D2E1F0;
70 68 }
71 69  
72   -static void sha1_process( sha1_context *ctx, unsigned char data[64] )
  70 +static void sha1_process (sha1_context * ctx, unsigned char data[64])
73 71 {
74   - unsigned long temp, W[16], A, B, C, D, E;
  72 + unsigned long temp, W[16], A, B, C, D, E;
75 73  
76   - GET_UINT32_BE( W[0], data, 0 );
77   - GET_UINT32_BE( W[1], data, 4 );
78   - GET_UINT32_BE( W[2], data, 8 );
79   - GET_UINT32_BE( W[3], data, 12 );
80   - GET_UINT32_BE( W[4], data, 16 );
81   - GET_UINT32_BE( W[5], data, 20 );
82   - GET_UINT32_BE( W[6], data, 24 );
83   - GET_UINT32_BE( W[7], data, 28 );
84   - GET_UINT32_BE( W[8], data, 32 );
85   - GET_UINT32_BE( W[9], data, 36 );
86   - GET_UINT32_BE( W[10], data, 40 );
87   - GET_UINT32_BE( W[11], data, 44 );
88   - GET_UINT32_BE( W[12], data, 48 );
89   - GET_UINT32_BE( W[13], data, 52 );
90   - GET_UINT32_BE( W[14], data, 56 );
91   - GET_UINT32_BE( W[15], data, 60 );
  74 + GET_UINT32_BE (W[0], data, 0);
  75 + GET_UINT32_BE (W[1], data, 4);
  76 + GET_UINT32_BE (W[2], data, 8);
  77 + GET_UINT32_BE (W[3], data, 12);
  78 + GET_UINT32_BE (W[4], data, 16);
  79 + GET_UINT32_BE (W[5], data, 20);
  80 + GET_UINT32_BE (W[6], data, 24);
  81 + GET_UINT32_BE (W[7], data, 28);
  82 + GET_UINT32_BE (W[8], data, 32);
  83 + GET_UINT32_BE (W[9], data, 36);
  84 + GET_UINT32_BE (W[10], data, 40);
  85 + GET_UINT32_BE (W[11], data, 44);
  86 + GET_UINT32_BE (W[12], data, 48);
  87 + GET_UINT32_BE (W[13], data, 52);
  88 + GET_UINT32_BE (W[14], data, 56);
  89 + GET_UINT32_BE (W[15], data, 60);
92 90  
93   -#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
  91 +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
94 92  
95   -#define R(t) \
96   -( \
97   - temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
98   - W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
99   - ( W[t & 0x0F] = S(temp,1) ) \
  93 +#define R(t) ( \
  94 + temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
  95 + W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
  96 + ( W[t & 0x0F] = S(temp,1) ) \
100 97 )
101 98  
102   -#define P(a,b,c,d,e,x) \
103   -{ \
104   - e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
  99 +#define P(a,b,c,d,e,x) { \
  100 + e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
105 101 }
106 102  
107   - A = ctx->state[0];
108   - B = ctx->state[1];
109   - C = ctx->state[2];
110   - D = ctx->state[3];
111   - E = ctx->state[4];
  103 + A = ctx->state[0];
  104 + B = ctx->state[1];
  105 + C = ctx->state[2];
  106 + D = ctx->state[3];
  107 + E = ctx->state[4];
112 108  
113 109 #define F(x,y,z) (z ^ (x & (y ^ z)))
114 110 #define K 0x5A827999
115 111  
116   - P( A, B, C, D, E, W[0] );
117   - P( E, A, B, C, D, W[1] );
118   - P( D, E, A, B, C, W[2] );
119   - P( C, D, E, A, B, W[3] );
120   - P( B, C, D, E, A, W[4] );
121   - P( A, B, C, D, E, W[5] );
122   - P( E, A, B, C, D, W[6] );
123   - P( D, E, A, B, C, W[7] );
124   - P( C, D, E, A, B, W[8] );
125   - P( B, C, D, E, A, W[9] );
126   - P( A, B, C, D, E, W[10] );
127   - P( E, A, B, C, D, W[11] );
128   - P( D, E, A, B, C, W[12] );
129   - P( C, D, E, A, B, W[13] );
130   - P( B, C, D, E, A, W[14] );
131   - P( A, B, C, D, E, W[15] );
132   - P( E, A, B, C, D, R(16) );
133   - P( D, E, A, B, C, R(17) );
134   - P( C, D, E, A, B, R(18) );
135   - P( B, C, D, E, A, R(19) );
  112 + P (A, B, C, D, E, W[0]);
  113 + P (E, A, B, C, D, W[1]);
  114 + P (D, E, A, B, C, W[2]);
  115 + P (C, D, E, A, B, W[3]);
  116 + P (B, C, D, E, A, W[4]);
  117 + P (A, B, C, D, E, W[5]);
  118 + P (E, A, B, C, D, W[6]);
  119 + P (D, E, A, B, C, W[7]);
  120 + P (C, D, E, A, B, W[8]);
  121 + P (B, C, D, E, A, W[9]);
  122 + P (A, B, C, D, E, W[10]);
  123 + P (E, A, B, C, D, W[11]);
  124 + P (D, E, A, B, C, W[12]);
  125 + P (C, D, E, A, B, W[13]);
  126 + P (B, C, D, E, A, W[14]);
  127 + P (A, B, C, D, E, W[15]);
  128 + P (E, A, B, C, D, R (16));
  129 + P (D, E, A, B, C, R (17));
  130 + P (C, D, E, A, B, R (18));
  131 + P (B, C, D, E, A, R (19));
136 132  
137 133 #undef K
138 134 #undef F
... ... @@ -140,26 +136,26 @@
140 136 #define F(x,y,z) (x ^ y ^ z)
141 137 #define K 0x6ED9EBA1
142 138  
143   - P( A, B, C, D, E, R(20) );
144   - P( E, A, B, C, D, R(21) );
145   - P( D, E, A, B, C, R(22) );
146   - P( C, D, E, A, B, R(23) );
147   - P( B, C, D, E, A, R(24) );
148   - P( A, B, C, D, E, R(25) );
149   - P( E, A, B, C, D, R(26) );
150   - P( D, E, A, B, C, R(27) );
151   - P( C, D, E, A, B, R(28) );
152   - P( B, C, D, E, A, R(29) );
153   - P( A, B, C, D, E, R(30) );
154   - P( E, A, B, C, D, R(31) );
155   - P( D, E, A, B, C, R(32) );
156   - P( C, D, E, A, B, R(33) );
157   - P( B, C, D, E, A, R(34) );
158   - P( A, B, C, D, E, R(35) );
159   - P( E, A, B, C, D, R(36) );
160   - P( D, E, A, B, C, R(37) );
161   - P( C, D, E, A, B, R(38) );
162   - P( B, C, D, E, A, R(39) );
  139 + P (A, B, C, D, E, R (20));
  140 + P (E, A, B, C, D, R (21));
  141 + P (D, E, A, B, C, R (22));
  142 + P (C, D, E, A, B, R (23));
  143 + P (B, C, D, E, A, R (24));
  144 + P (A, B, C, D, E, R (25));
  145 + P (E, A, B, C, D, R (26));
  146 + P (D, E, A, B, C, R (27));
  147 + P (C, D, E, A, B, R (28));
  148 + P (B, C, D, E, A, R (29));
  149 + P (A, B, C, D, E, R (30));
  150 + P (E, A, B, C, D, R (31));
  151 + P (D, E, A, B, C, R (32));
  152 + P (C, D, E, A, B, R (33));
  153 + P (B, C, D, E, A, R (34));
  154 + P (A, B, C, D, E, R (35));
  155 + P (E, A, B, C, D, R (36));
  156 + P (D, E, A, B, C, R (37));
  157 + P (C, D, E, A, B, R (38));
  158 + P (B, C, D, E, A, R (39));
163 159  
164 160 #undef K
165 161 #undef F
... ... @@ -167,26 +163,26 @@
167 163 #define F(x,y,z) ((x & y) | (z & (x | y)))
168 164 #define K 0x8F1BBCDC
169 165  
170   - P( A, B, C, D, E, R(40) );
171   - P( E, A, B, C, D, R(41) );
172   - P( D, E, A, B, C, R(42) );
173   - P( C, D, E, A, B, R(43) );
174   - P( B, C, D, E, A, R(44) );
175   - P( A, B, C, D, E, R(45) );
176   - P( E, A, B, C, D, R(46) );
177   - P( D, E, A, B, C, R(47) );
178   - P( C, D, E, A, B, R(48) );
179   - P( B, C, D, E, A, R(49) );
180   - P( A, B, C, D, E, R(50) );
181   - P( E, A, B, C, D, R(51) );
182   - P( D, E, A, B, C, R(52) );
183   - P( C, D, E, A, B, R(53) );
184   - P( B, C, D, E, A, R(54) );
185   - P( A, B, C, D, E, R(55) );
186   - P( E, A, B, C, D, R(56) );
187   - P( D, E, A, B, C, R(57) );
188   - P( C, D, E, A, B, R(58) );
189   - P( B, C, D, E, A, R(59) );
  166 + P (A, B, C, D, E, R (40));
  167 + P (E, A, B, C, D, R (41));
  168 + P (D, E, A, B, C, R (42));
  169 + P (C, D, E, A, B, R (43));
  170 + P (B, C, D, E, A, R (44));
  171 + P (A, B, C, D, E, R (45));
  172 + P (E, A, B, C, D, R (46));
  173 + P (D, E, A, B, C, R (47));
  174 + P (C, D, E, A, B, R (48));
  175 + P (B, C, D, E, A, R (49));
  176 + P (A, B, C, D, E, R (50));
  177 + P (E, A, B, C, D, R (51));
  178 + P (D, E, A, B, C, R (52));
  179 + P (C, D, E, A, B, R (53));
  180 + P (B, C, D, E, A, R (54));
  181 + P (A, B, C, D, E, R (55));
  182 + P (E, A, B, C, D, R (56));
  183 + P (D, E, A, B, C, R (57));
  184 + P (C, D, E, A, B, R (58));
  185 + P (B, C, D, E, A, R (59));
190 186  
191 187 #undef K
192 188 #undef F
193 189  
194 190  
195 191  
196 192  
197 193  
198 194  
199 195  
200 196  
201 197  
202 198  
203 199  
204 200  
205 201  
206 202  
207 203  
208 204  
209 205  
210 206  
211 207  
212 208  
213 209  
214 210  
215 211  
216 212  
217 213  
218 214  
219 215  
220 216  
221 217  
... ... @@ -194,169 +190,161 @@
194 190 #define F(x,y,z) (x ^ y ^ z)
195 191 #define K 0xCA62C1D6
196 192  
197   - P( A, B, C, D, E, R(60) );
198   - P( E, A, B, C, D, R(61) );
199   - P( D, E, A, B, C, R(62) );
200   - P( C, D, E, A, B, R(63) );
201   - P( B, C, D, E, A, R(64) );
202   - P( A, B, C, D, E, R(65) );
203   - P( E, A, B, C, D, R(66) );
204   - P( D, E, A, B, C, R(67) );
205   - P( C, D, E, A, B, R(68) );
206   - P( B, C, D, E, A, R(69) );
207   - P( A, B, C, D, E, R(70) );
208   - P( E, A, B, C, D, R(71) );
209   - P( D, E, A, B, C, R(72) );
210   - P( C, D, E, A, B, R(73) );
211   - P( B, C, D, E, A, R(74) );
212   - P( A, B, C, D, E, R(75) );
213   - P( E, A, B, C, D, R(76) );
214   - P( D, E, A, B, C, R(77) );
215   - P( C, D, E, A, B, R(78) );
216   - P( B, C, D, E, A, R(79) );
  193 + P (A, B, C, D, E, R (60));
  194 + P (E, A, B, C, D, R (61));
  195 + P (D, E, A, B, C, R (62));
  196 + P (C, D, E, A, B, R (63));
  197 + P (B, C, D, E, A, R (64));
  198 + P (A, B, C, D, E, R (65));
  199 + P (E, A, B, C, D, R (66));
  200 + P (D, E, A, B, C, R (67));
  201 + P (C, D, E, A, B, R (68));
  202 + P (B, C, D, E, A, R (69));
  203 + P (A, B, C, D, E, R (70));
  204 + P (E, A, B, C, D, R (71));
  205 + P (D, E, A, B, C, R (72));
  206 + P (C, D, E, A, B, R (73));
  207 + P (B, C, D, E, A, R (74));
  208 + P (A, B, C, D, E, R (75));
  209 + P (E, A, B, C, D, R (76));
  210 + P (D, E, A, B, C, R (77));
  211 + P (C, D, E, A, B, R (78));
  212 + P (B, C, D, E, A, R (79));
217 213  
218 214 #undef K
219 215 #undef F
220 216  
221   - ctx->state[0] += A;
222   - ctx->state[1] += B;
223   - ctx->state[2] += C;
224   - ctx->state[3] += D;
225   - ctx->state[4] += E;
  217 + ctx->state[0] += A;
  218 + ctx->state[1] += B;
  219 + ctx->state[2] += C;
  220 + ctx->state[3] += D;
  221 + ctx->state[4] += E;
226 222 }
227 223  
228 224 /*
229 225 * SHA-1 process buffer
230 226 */
231   -void sha1_update( sha1_context *ctx, unsigned char *input, int ilen )
  227 +void sha1_update (sha1_context * ctx, unsigned char *input, int ilen)
232 228 {
233   - int fill;
234   - unsigned long left;
  229 + int fill;
  230 + unsigned long left;
235 231  
236   - if( ilen <= 0 )
237   - return;
  232 + if (ilen <= 0)
  233 + return;
238 234  
239   - left = ctx->total[0] & 0x3F;
240   - fill = 64 - left;
  235 + left = ctx->total[0] & 0x3F;
  236 + fill = 64 - left;
241 237  
242   - ctx->total[0] += ilen;
243   - ctx->total[0] &= 0xFFFFFFFF;
  238 + ctx->total[0] += ilen;
  239 + ctx->total[0] &= 0xFFFFFFFF;
244 240  
245   - if( ctx->total[0] < (unsigned long) ilen )
246   - ctx->total[1]++;
  241 + if (ctx->total[0] < (unsigned long) ilen)
  242 + ctx->total[1]++;
247 243  
248   - if( left && ilen >= fill )
249   - {
250   - memcpy( (void *) (ctx->buffer + left),
251   - (void *) input, fill );
252   - sha1_process( ctx, ctx->buffer );
253   - input += fill;
254   - ilen -= fill;
255   - left = 0;
256   - }
  244 + if (left && ilen >= fill) {
  245 + memcpy ((void *) (ctx->buffer + left), (void *) input, fill);
  246 + sha1_process (ctx, ctx->buffer);
  247 + input += fill;
  248 + ilen -= fill;
  249 + left = 0;
  250 + }
257 251  
258   - while( ilen >= 64 )
259   - {
260   - sha1_process( ctx, input );
261   - input += 64;
262   - ilen -= 64;
263   - }
  252 + while (ilen >= 64) {
  253 + sha1_process (ctx, input);
  254 + input += 64;
  255 + ilen -= 64;
  256 + }
264 257  
265   - if( ilen > 0 )
266   - {
267   - memcpy( (void *) (ctx->buffer + left),
268   - (void *) input, ilen );
269   - }
  258 + if (ilen > 0) {
  259 + memcpy ((void *) (ctx->buffer + left), (void *) input, ilen);
  260 + }
270 261 }
271 262  
272   -static const unsigned char sha1_padding[64] =
273   -{
274   - 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
275   - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
276   - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
277   - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
  263 +static const unsigned char sha1_padding[64] = {
  264 + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  265 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  266 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  267 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
278 268 };
279 269  
280 270 /*
281 271 * SHA-1 final digest
282 272 */
283   -void sha1_finish( sha1_context *ctx, unsigned char output[20] )
  273 +void sha1_finish (sha1_context * ctx, unsigned char output[20])
284 274 {
285   - unsigned long last, padn;
286   - unsigned long high, low;
287   - unsigned char msglen[8];
  275 + unsigned long last, padn;
  276 + unsigned long high, low;
  277 + unsigned char msglen[8];
288 278  
289   - high = ( ctx->total[0] >> 29 )
290   - | ( ctx->total[1] << 3 );
291   - low = ( ctx->total[0] << 3 );
  279 + high = (ctx->total[0] >> 29)
  280 + | (ctx->total[1] << 3);
  281 + low = (ctx->total[0] << 3);
292 282  
293   - PUT_UINT32_BE( high, msglen, 0 );
294   - PUT_UINT32_BE( low, msglen, 4 );
  283 + PUT_UINT32_BE (high, msglen, 0);
  284 + PUT_UINT32_BE (low, msglen, 4);
295 285  
296   - last = ctx->total[0] & 0x3F;
297   - padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
  286 + last = ctx->total[0] & 0x3F;
  287 + padn = (last < 56) ? (56 - last) : (120 - last);
298 288  
299   - sha1_update( ctx, (unsigned char *) sha1_padding, padn );
300   - sha1_update( ctx, msglen, 8 );
  289 + sha1_update (ctx, (unsigned char *) sha1_padding, padn);
  290 + sha1_update (ctx, msglen, 8);
301 291  
302   - PUT_UINT32_BE( ctx->state[0], output, 0 );
303   - PUT_UINT32_BE( ctx->state[1], output, 4 );
304   - PUT_UINT32_BE( ctx->state[2], output, 8 );
305   - PUT_UINT32_BE( ctx->state[3], output, 12 );
306   - PUT_UINT32_BE( ctx->state[4], output, 16 );
  292 + PUT_UINT32_BE (ctx->state[0], output, 0);
  293 + PUT_UINT32_BE (ctx->state[1], output, 4);
  294 + PUT_UINT32_BE (ctx->state[2], output, 8);
  295 + PUT_UINT32_BE (ctx->state[3], output, 12);
  296 + PUT_UINT32_BE (ctx->state[4], output, 16);
307 297 }
308 298  
309 299 /*
310 300 * Output = SHA-1( input buffer )
311 301 */
312   -void sha1_csum( unsigned char *input, int ilen,
313   - unsigned char output[20] )
  302 +void sha1_csum (unsigned char *input, int ilen, unsigned char output[20])
314 303 {
315   - sha1_context ctx;
  304 + sha1_context ctx;
316 305  
317   - sha1_starts( &ctx );
318   - sha1_update( &ctx, input, ilen );
319   - sha1_finish( &ctx, output );
  306 + sha1_starts (&ctx);
  307 + sha1_update (&ctx, input, ilen);
  308 + sha1_finish (&ctx, output);
320 309 }
321 310  
322 311 /*
323 312 * Output = HMAC-SHA-1( input buffer, hmac key )
324 313 */
325   -void sha1_hmac( unsigned char *key, int keylen,
326   - unsigned char *input, int ilen,
327   - unsigned char output[20] )
  314 +void sha1_hmac (unsigned char *key, int keylen,
  315 + unsigned char *input, int ilen, unsigned char output[20])
328 316 {
329   - int i;
330   - sha1_context ctx;
331   - unsigned char k_ipad[64];
332   - unsigned char k_opad[64];
333   - unsigned char tmpbuf[20];
  317 + int i;
  318 + sha1_context ctx;
  319 + unsigned char k_ipad[64];
  320 + unsigned char k_opad[64];
  321 + unsigned char tmpbuf[20];
334 322  
335   - memset( k_ipad, 0x36, 64 );
336   - memset( k_opad, 0x5C, 64 );
  323 + memset (k_ipad, 0x36, 64);
  324 + memset (k_opad, 0x5C, 64);
337 325  
338   - for( i = 0; i < keylen; i++ )
339   - {
340   - if( i >= 64 ) break;
  326 + for (i = 0; i < keylen; i++) {
  327 + if (i >= 64)
  328 + break;
341 329  
342   - k_ipad[i] ^= key[i];
343   - k_opad[i] ^= key[i];
344   - }
  330 + k_ipad[i] ^= key[i];
  331 + k_opad[i] ^= key[i];
  332 + }
345 333  
346   - sha1_starts( &ctx );
347   - sha1_update( &ctx, k_ipad, 64 );
348   - sha1_update( &ctx, input, ilen );
349   - sha1_finish( &ctx, tmpbuf );
  334 + sha1_starts (&ctx);
  335 + sha1_update (&ctx, k_ipad, 64);
  336 + sha1_update (&ctx, input, ilen);
  337 + sha1_finish (&ctx, tmpbuf);
350 338  
351   - sha1_starts( &ctx );
352   - sha1_update( &ctx, k_opad, 64 );
353   - sha1_update( &ctx, tmpbuf, 20 );
354   - sha1_finish( &ctx, output );
  339 + sha1_starts (&ctx);
  340 + sha1_update (&ctx, k_opad, 64);
  341 + sha1_update (&ctx, tmpbuf, 20);
  342 + sha1_finish (&ctx, output);
355 343  
356   - memset( k_ipad, 0, 64 );
357   - memset( k_opad, 0, 64 );
358   - memset( tmpbuf, 0, 20 );
359   - memset( &ctx, 0, sizeof( sha1_context ) );
  344 + memset (k_ipad, 0, 64);
  345 + memset (k_opad, 0, 64);
  346 + memset (tmpbuf, 0, 20);
  347 + memset (&ctx, 0, sizeof (sha1_context));
360 348 }
361 349  
362 350 static const char _sha1_src[] = "_sha1_src";
363 351  
364 352  
365 353  
366 354  
367 355  
368 356  
369 357  
370 358  
371 359  
372 360  
373 361  
374 362  
... ... @@ -365,67 +353,62 @@
365 353 /*
366 354 * FIPS-180-1 test vectors
367 355 */
368   -static const char sha1_test_str[3][57] =
369   -{
370   - { "abc" },
371   - { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" },
372   - { "" }
  356 +static const char sha1_test_str[3][57] = {
  357 + {"abc"},
  358 + {"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"},
  359 + {""}
373 360 };
374 361  
375   -static const unsigned char sha1_test_sum[3][20] =
376   -{
377   - { 0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
378   - 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D },
379   - { 0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
380   - 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1 },
381   - { 0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
382   - 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F }
  362 +static const unsigned char sha1_test_sum[3][20] = {
  363 + {0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
  364 + 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D},
  365 + {0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
  366 + 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1},
  367 + {0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
  368 + 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F}
383 369 };
384 370  
385 371 /*
386 372 * Checkup routine
387 373 */
388   -int sha1_self_test( void )
  374 +int sha1_self_test (void)
389 375 {
390   - int i, j;
391   - unsigned char buf[1000];
392   - unsigned char sha1sum[20];
393   - sha1_context ctx;
  376 + int i, j;
  377 + unsigned char buf[1000];
  378 + unsigned char sha1sum[20];
  379 + sha1_context ctx;
394 380  
395   - for( i = 0; i < 3; i++ )
396   - {
397   - printf( " SHA-1 test #%d: ", i + 1 );
  381 + for (i = 0; i < 3; i++) {
  382 + printf (" SHA-1 test #%d: ", i + 1);
398 383  
399   - sha1_starts( &ctx );
  384 + sha1_starts (&ctx);
400 385  
401   - if( i < 2 )
402   - sha1_update( &ctx, (unsigned char *) sha1_test_str[i],
403   - strlen( sha1_test_str[i] ) );
404   - else
405   - {
406   - memset( buf, 'a', 1000 );
407   - for( j = 0; j < 1000; j++ )
408   - sha1_update( &ctx, buf, 1000 );
409   - }
  386 + if (i < 2)
  387 + sha1_update (&ctx, (unsigned char *) sha1_test_str[i],
  388 + strlen (sha1_test_str[i]));
  389 + else {
  390 + memset (buf, 'a', 1000);
  391 + for (j = 0; j < 1000; j++)
  392 + sha1_update (&ctx, buf, 1000);
  393 + }
410 394  
411   - sha1_finish( &ctx, sha1sum );
  395 + sha1_finish (&ctx, sha1sum);
412 396  
413   - if( memcmp( sha1sum, sha1_test_sum[i], 20 ) != 0 )
414   - {
415   - printf( "failed\n" );
416   - return( 1 );
417   - }
  397 + if (memcmp (sha1sum, sha1_test_sum[i], 20) != 0) {
  398 + printf ("failed\n");
  399 + return (1);
  400 + }
418 401  
419   - printf( "passed\n" );
420   - }
  402 + printf ("passed\n");
  403 + }
421 404  
422   - printf( "\n" );
423   - return( 0 );
  405 + printf ("\n");
  406 + return (0);
424 407 }
425 408 #else
426   -int sha1_self_test( void )
  409 +int sha1_self_test (void)
427 410 {
428   - return( 0 );
  411 + return (0);
429 412 }
430 413 #endif
post/cpu/ppc4xx/cache_4xx.S
Diff comments   View file @ 4ef218f
... ... @@ -438,7 +438,7 @@
438 438 blr
439 439  
440 440 /* Test instructions.
441   - */
  441 + */
442 442 cache_post_test_inst:
443 443 li r3, 0
444 444 li r3, -1
post/cpu/ppc4xx/fpu.c
Diff comments   View file @ 4ef218f
... ... @@ -37,7 +37,7 @@
37 37 {
38 38 if (mfspr(ccr0) & CCR0_DAPUIB)
39 39 return 0; /* Disabled */
40   - else
  40 + else
41 41 return 1; /* Enabled */
42 42 }
43 43  
post/cpu/ppc4xx/spr.c
Diff comments   View file @ 4ef218f
... ... @@ -43,12 +43,11 @@
43 43  
44 44 #include <asm/processor.h>
45 45  
46   -static struct
47   -{
48   - int number;
49   - char * name;
50   - unsigned long mask;
51   - unsigned long value;
  46 +static struct {
  47 + int number;
  48 + char * name;
  49 + unsigned long mask;
  50 + unsigned long value;
52 51 } spr_test_list [] = {
53 52 /* Standard Special-Purpose Registers */
54 53  
... ... @@ -65,7 +64,7 @@
65 64 {0x11f, "PVR", 0x00000000, 0x00000000},
66 65  
67 66 /* Additional Special-Purpose Registers.
68   - * The values must match the initialization
  67 + * The values must match the initialization
69 68 * values from cpu/ppc4xx/start.S
70 69 */
71 70 {0x30, "PID", 0x00000000, 0x00000000},
... ... @@ -84,7 +84,7 @@
84 84 cmdname, imagefile, strerror(errno));
85 85 exit (EXIT_FAILURE);
86 86 }
87   -
  87 +
88 88 /* create a copy, so we can blank out the sha1 sum */
89 89 data = malloc (len);
90 90 memcpy (data, ptr, len);
91 91  
... ... @@ -93,12 +93,11 @@
93 93 for (i = 0; i < SHA1_SUM_LEN; i++) {
94 94 ptroff[i] = 0;
95 95 }
96   -
  96 +
97 97 sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
98 98  
99 99 printf ("U-Boot sum:\n");
100   - for (i = 0; i < 20 ; i++)
101   - {
  100 + for (i = 0; i < 20 ; i++) {
102 101 printf ("%02X ", output[i]);
103 102 }
104 103 printf ("\n");
... ... @@ -109,7 +108,7 @@
109 108 cmdname, imagefile, strerror(errno));
110 109 exit (EXIT_FAILURE);
111 110 }
112   -
  111 +
113 112 free (data);
114 113 (void) munmap((void *)ptr, len);
115 114 (void) close (ifd);