AM3517: Add SPL support

The only change of note is that we move from 0x80008000 to 0x80100000 for CONFIG_SYS_TEXT_BASE Cc: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tom Rini <trini@ti.com>

AM3517: Add SPL support
The only change of note is that we move from 0x80008000 to 0x80100000 for CONFIG_SYS_TEXT_BASE Cc: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini · Albert ARIBAUD
1 parent 673283f3fc
Showing 3 changed files with 56 additions and 33 deletions Side-by-side Diff
board/logicpd/am3517evm/am3517evm.c
board/logicpd/am3517evm/config.mk
include/configs/am3517_evm.h
@@ -76,7 +76,7 @@
 	MUX_AM3517EVM();
 }
  
-#ifdef CONFIG_GENERIC_MMC
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
        omap_mmc_init(0);
-#
-# Author: Vaibhav Hiremath <hvaibhav@ti.com>
-#
-# Based on ti/evm/config.mk
-#
-# Copyright (C) 2010
-# Texas Instruments Incorporated - http://www.ti.com/
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-#
-# Physical Address:
-# 8000'0000 (bank0)
-# A000/0000 (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
@@ -63,7 +63,6 @@
 /*
  * DDR related
  */
-#define CONFIG_OMAP3_MICRON_DDR		1	/* Micron DDR */
 #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
  
 /*
@@ -269,7 +268,6 @@
  */
 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */
 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
  
 /*-----------------------------------------------------------------------
@@ -324,5 +322,60 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
 					 CONFIG_SYS_INIT_RAM_SIZE - \
 					 GENERATED_GBL_DATA_SIZE)
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_TEXT_BASE		0x40200800
+#define CONFIG_SPL_MAX_SIZE		(45 * 1024)
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR	0x80000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
+						10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	3
+#define CONFIG_SYS_NAND_ECCSTEPS	(CONFIG_SYS_NAND_PAGE_SIZE / \
+						CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES * \
+						CONFIG_SYS_NAND_ECCSTEPS)
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
 #endif /* __CONFIG_H */
...	...	@@ -76,7 +76,7 @@
76	76	MUX_AM3517EVM();
77	77	}
78	78
79		-#ifdef CONFIG_GENERIC_MMC
	79	+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
80	80	int board_mmc_init(bd_t *bis)
81	81	{
82	82	omap_mmc_init(0);
1		-#
2		-# Author: Vaibhav Hiremath <hvaibhav@ti.com>
3		-#
4		-# Based on ti/evm/config.mk
5		-#
6		-# Copyright (C) 2010
7		-# Texas Instruments Incorporated - http://www.ti.com/
8		-#
9		-# This program is free software; you can redistribute it and/or modify
10		-# it under the terms of the GNU General Public License as published by
11		-# the Free Software Foundation; either version 2 of the License, or
12		-# (at your option) any later version.
13		-#
14		-# This program is distributed in the hope that it will be useful,
15		-# but WITHOUT ANY WARRANTY; without even the implied warranty of
16		-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17		-# GNU General Public License for more details.
18		-#
19		-# You should have received a copy of the GNU General Public License
20		-# along with this program; if not, write to the Free Software
21		-# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22		-#
23		-# Physical Address:
24		-# 8000'0000 (bank0)
25		-# A000/0000 (bank1)
26		-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
27		-# (mem base + reserved)
28		-
29		-# For use with external or internal boots.
30		-CONFIG_SYS_TEXT_BASE = 0x80008000
...	...	@@ -63,7 +63,6 @@
63	63	/*
64	64	* DDR related
65	65	*/
66		-#define CONFIG_OMAP3_MICRON_DDR 1 /* Micron DDR */
67	66	#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
68	67
69	68	/*
...	...	@@ -269,7 +268,6 @@
269	268	*/
270	269	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
271	270	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
272		-#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
273	271	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
274	272
275	273	/*-----------------------------------------------------------------------
...	...	@@ -324,5 +322,60 @@
324	322	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
325	323	CONFIG_SYS_INIT_RAM_SIZE - \
326	324	GENERATED_GBL_DATA_SIZE)
	325	+
	326	+/* Defines for SPL */
	327	+#define CONFIG_SPL
	328	+#define CONFIG_SPL_NAND_SIMPLE
	329	+#define CONFIG_SPL_TEXT_BASE 0x40200800
	330	+#define CONFIG_SPL_MAX_SIZE (45 * 1024)
	331	+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
	332	+
	333	+#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	334	+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
	335	+
	336	+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	337	+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
	338	+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
	339	+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
	340	+
	341	+#define CONFIG_SPL_LIBCOMMON_SUPPORT
	342	+#define CONFIG_SPL_LIBDISK_SUPPORT
	343	+#define CONFIG_SPL_I2C_SUPPORT
	344	+#define CONFIG_SPL_LIBGENERIC_SUPPORT
	345	+#define CONFIG_SPL_MMC_SUPPORT
	346	+#define CONFIG_SPL_FAT_SUPPORT
	347	+#define CONFIG_SPL_SERIAL_SUPPORT
	348	+#define CONFIG_SPL_NAND_SUPPORT
	349	+#define CONFIG_SPL_POWER_SUPPORT
	350	+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
	351	+
	352	+/* NAND boot config */
	353	+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	354	+#define CONFIG_SYS_NAND_PAGE_COUNT 64
	355	+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	356	+#define CONFIG_SYS_NAND_OOBSIZE 64
	357	+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	358	+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	359	+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
	360	+ 10, 11, 12, 13}
	361	+#define CONFIG_SYS_NAND_ECCSIZE 512
	362	+#define CONFIG_SYS_NAND_ECCBYTES 3
	363	+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
	364	+ CONFIG_SYS_NAND_ECCSIZE)
	365	+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
	366	+ CONFIG_SYS_NAND_ECCSTEPS)
	367	+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	368	+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	369	+
	370	+/*
	371	+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	372	+ * 64 bytes before this address should be set aside for u-boot.img's
	373	+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
	374	+ * other needs.
	375	+ */
	376	+#define CONFIG_SYS_TEXT_BASE 0x80100000
	377	+#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	378	+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
	379	+
327	380	#endif /* __CONFIG_H */