Commit 506f391888b82d1b83bdd749c3cea9eb2fd64df8
Committed by
Wolfgang Denk
Wolfgang Denk
1 parent
cabf7b9c83
Exists in
master
and in
54 other branches
8xx, icache: enabling ICache not before running from RAM
with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache is not enabled before code runs from RAM. Signed-off-by: Heiko Schocher <hs@denx.de>
Showing 6 changed files with 16 additions and 3 deletions Side-by-side Diff
README
| ... | ... | @@ -318,6 +318,11 @@ |
| 318 | 318 | that this requires a (stable) reference clock (32 kHz |
| 319 | 319 | RTC clock or CONFIG_SYS_8XX_XIN) |
| 320 | 320 | |
| 321 | + CONFIG_SYS_DELAYED_ICACHE | |
| 322 | + | |
| 323 | + Define this option if you want to enable the | |
| 324 | + ICache only when Code runs from RAM. | |
| 325 | + | |
| 321 | 326 | - Intel Monahans options: |
| 322 | 327 | CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO |
| 323 | 328 |
cpu/mpc8xx/start.S
| ... | ... | @@ -142,7 +142,7 @@ |
| 142 | 142 | lis r3, IDC_DISABLE@h /* Disable data cache */ |
| 143 | 143 | mtspr DC_CST, r3 |
| 144 | 144 | |
| 145 | -#if !(defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)) | |
| 145 | +#if !defined(CONFIG_SYS_DELAYED_ICACHE) | |
| 146 | 146 | /* On IP860 and PCU E, |
| 147 | 147 | * we cannot enable IC yet |
| 148 | 148 | */ |
include/configs/FLAGADM.h
| ... | ... | @@ -173,6 +173,9 @@ |
| 173 | 173 | #if defined(CONFIG_CMD_KGDB) |
| 174 | 174 | #define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */ |
| 175 | 175 | #endif |
| 176 | +#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before | |
| 177 | + * running in RAM. | |
| 178 | + */ | |
| 176 | 179 | |
| 177 | 180 | /*----------------------------------------------------------------------- |
| 178 | 181 | * SYPCR - System Protection Control 11-9 |
include/configs/IP860.h
| ... | ... | @@ -209,6 +209,9 @@ |
| 209 | 209 | #if defined(CONFIG_CMD_KGDB) |
| 210 | 210 | #define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */ |
| 211 | 211 | #endif |
| 212 | +#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before | |
| 213 | + * running in RAM. | |
| 214 | + */ | |
| 212 | 215 | |
| 213 | 216 | /*----------------------------------------------------------------------- |
| 214 | 217 | * SYPCR - System Protection Control 11-9 |
include/configs/pcu_e.h
| ... | ... | @@ -246,6 +246,9 @@ |
| 246 | 246 | */ |
| 247 | 247 | #define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ |
| 248 | 248 | #define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */ |
| 249 | +#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before | |
| 250 | + * running in RAM. | |
| 251 | + */ | |
| 249 | 252 | |
| 250 | 253 | /*----------------------------------------------------------------------- |
| 251 | 254 | * SYPCR - System Protection Control 11-9 |
lib_ppc/board.c
| ... | ... | @@ -736,8 +736,7 @@ |
| 736 | 736 | |
| 737 | 737 | WATCHDOG_RESET(); |
| 738 | 738 | |
| 739 | -#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \ | |
| 740 | - defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX) | |
| 739 | +#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX) | |
| 741 | 740 | icache_enable (); /* it's time to enable the instruction cache */ |
| 742 | 741 | #endif |
| 743 | 742 |