Commit 51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72

Authored by Neil Armstrong
Committed by Jagan Teki
1 parent ffd4c7c2ec

x86: dts: switch spi-flash to jedec, spi-nor compatible

The x86 code and DT uses "spi-flash" to detect a flash node, switch to
"jedec,spi-nor" in the DTS files and in fdtdec by switching the
GENERIC_SPI_FLASH value to to jedec,spi-nor.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Showing 13 changed files with 13 additions and 13 deletions Side-by-side Diff

arch/x86/dts/bayleybay.dts
... ... @@ -175,7 +175,7 @@
175 175 #size-cells = <1>;
176 176 reg = <0>;
177 177 compatible = "winbond,w25q64dw",
178   - "spi-flash";
  178 + "jedec,spi-nor";
179 179 memory-map = <0xff800000 0x00800000>;
180 180 rw-mrc-cache {
181 181 label = "rw-mrc-cache";
arch/x86/dts/baytrail_som-db5800-som-6867.dts
... ... @@ -199,7 +199,7 @@
199 199 #size-cells = <1>;
200 200 reg = <0>;
201 201 compatible = "macronix,mx25l6405d",
202   - "spi-flash";
  202 + "jedec,spi-nor";
203 203 memory-map = <0xff800000 0x00800000>;
204 204 rw-mrc-cache {
205 205 label = "rw-mrc-cache";
arch/x86/dts/cherryhill.dts
... ... @@ -147,7 +147,7 @@
147 147 #address-cells = <1>;
148 148 #size-cells = <1>;
149 149 reg = <0>;
150   - compatible = "macronix,mx25u6435f", "spi-flash";
  150 + compatible = "macronix,mx25u6435f", "jedec,spi-nor";
151 151 memory-map = <0xff800000 0x00800000>;
152 152 rw-mrc-cache {
153 153 label = "rw-mrc-cache";
arch/x86/dts/chromebook_link.dts
... ... @@ -429,7 +429,7 @@
429 429 u-boot,dm-pre-reloc;
430 430 reg = <0>;
431 431 compatible = "winbond,w25q64",
432   - "spi-flash";
  432 + "jedec,spi-nor";
433 433 memory-map = <0xff800000 0x00800000>;
434 434 rw-mrc-cache {
435 435 label = "rw-mrc-cache";
arch/x86/dts/chromebook_samus.dts
... ... @@ -567,7 +567,7 @@
567 567 #address-cells = <1>;
568 568 reg = <0>;
569 569 compatible = "winbond,w25q64",
570   - "spi-flash";
  570 + "jedec,spi-nor";
571 571 memory-map = <0xff800000 0x00800000>;
572 572 rw-mrc-cache {
573 573 label = "rw-mrc-cache";
arch/x86/dts/chromebox_panther.dts
... ... @@ -47,7 +47,7 @@
47 47 #address-cells = <1>;
48 48 reg = <0>;
49 49 compatible = "winbond,w25q64",
50   - "spi-flash";
  50 + "jedec,spi-nor";
51 51 memory-map = <0xff800000 0x00800000>;
52 52 rw-mrc-cache {
53 53 label = "rw-mrc-cache";
arch/x86/dts/conga-qeval20-qa3-e3845.dts
... ... @@ -186,7 +186,7 @@
186 186 #size-cells = <1>;
187 187 reg = <0>;
188 188 compatible = "stmicro,n25q064a",
189   - "spi-flash";
  189 + "jedec,spi-nor";
190 190 memory-map = <0xff800000 0x00800000>;
191 191 rw-mrc-cache {
192 192 label = "rw-mrc-cache";
arch/x86/dts/cougarcanyon2.dts
... ... @@ -154,7 +154,7 @@
154 154  
155 155 spi-flash@0 {
156 156 reg = <0>;
157   - compatible = "winbond,w25q64bv", "spi-flash";
  157 + compatible = "winbond,w25q64bv", "jedec,spi-nor";
158 158 memory-map = <0xff800000 0x00800000>;
159 159 };
160 160 };
arch/x86/dts/crownbay.dts
... ... @@ -224,7 +224,7 @@
224 224 spi-flash@0 {
225 225 reg = <0>;
226 226 compatible = "sst,25vf016b",
227   - "spi-flash";
  227 + "jedec,spi-nor";
228 228 memory-map = <0xffe00000 0x00200000>;
229 229 };
230 230 };
arch/x86/dts/dfi-bt700.dtsi
... ... @@ -197,7 +197,7 @@
197 197 #size-cells = <1>;
198 198 reg = <0>;
199 199 compatible = "stmicro,n25q064a",
200   - "spi-flash";
  200 + "jedec,spi-nor";
201 201 memory-map = <0xff800000 0x00800000>;
202 202 rw-mrc-cache {
203 203 label = "rw-mrc-cache";
arch/x86/dts/galileo.dts
... ... @@ -139,7 +139,7 @@
139 139 #address-cells = <1>;
140 140 reg = <0>;
141 141 compatible = "winbond,w25q64",
142   - "spi-flash";
  142 + "jedec,spi-nor";
143 143 memory-map = <0xff800000 0x00800000>;
144 144 rw-mrc-cache {
145 145 label = "rw-mrc-cache";
arch/x86/dts/minnowmax.dts
... ... @@ -199,7 +199,7 @@
199 199 #size-cells = <1>;
200 200 reg = <0>;
201 201 compatible = "stmicro,n25q064a",
202   - "spi-flash";
  202 + "jedec,spi-nor";
203 203 memory-map = <0xff800000 0x00800000>;
204 204 rw-mrc-cache {
205 205 label = "rw-mrc-cache";
... ... @@ -45,7 +45,7 @@
45 45 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
46 46 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
47 47 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
48   - COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
  48 + COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
49 49 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
50 50 COMPAT(INTEL_MICROCODE, "intel,microcode"),
51 51 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),