ppc4xx: Set DLVision 10G osd position to linux defaults

Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>

ppc4xx: Set DLVision 10G osd position to linux defaults
Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach · Stefan Roese
1 parent 5cb4100f58
Showing 2 changed files with 7 additions and 2 deletions Side-by-side Diff
board/gdsys/common/osd.c
include/gdsys_fpga.h
@@ -376,6 +376,8 @@
 	out_le16(&osd->control, 0x0049);
  
 	out_le16(&osd->xy_size, ((32 - 1) << 8) | (16 - 1));
+	out_le16(&osd->x_pos, 0x007f);
+	out_le16(&osd->y_pos, 0x005f);
  
 	return 0;
 }
@@ -50,6 +50,9 @@
 	u16 features;
 	u16 control;
 	u16 xy_size;
+	u16 xy_scale;
+	u16 x_pos;
+	u16 y_pos;
 } ihs_osd_t;
  
 #ifdef CONFIG_IO
@@ -79,7 +82,7 @@
 	u16 reserved_2[93];	/* 0x0044 */
 	u16 reflection_high;	/* 0x00fe */
 	ihs_osd_t osd;		/* 0x0100 */
-	u16 reserved_3[892];	/* 0x0108 */
+	u16 reserved_3[88];	/* 0x010e */
 	u16 videomem;		/* 0x0800 */
 } ihs_fpga_t;
 #endif
@@ -98,7 +101,7 @@
 	u16 videocontrol;	/* 0x009e */
 	u16 reserved_3[176];	/* 0x00a0 */
 	ihs_osd_t osd;		/* 0x0200 */
-	u16 reserved_4[764];	/* 0x0208 */
+	u16 reserved_4[761];	/* 0x020e */
 	u16 videomem;		/* 0x0800 */
 } ihs_fpga_t;
 #endif
...	...	@@ -376,6 +376,8 @@
376	376	out_le16(&osd->control, 0x0049);
377	377
378	378	out_le16(&osd->xy_size, ((32 - 1) << 8) \| (16 - 1));
	379	+ out_le16(&osd->x_pos, 0x007f);
	380	+ out_le16(&osd->y_pos, 0x005f);
379	381
380	382	return 0;
381	383	}
...	...	@@ -50,6 +50,9 @@
50	50	u16 features;
51	51	u16 control;
52	52	u16 xy_size;
	53	+ u16 xy_scale;
	54	+ u16 x_pos;
	55	+ u16 y_pos;
53	56	} ihs_osd_t;
54	57
55	58	#ifdef CONFIG_IO
...	...	@@ -79,7 +82,7 @@
79	82	u16 reserved_2[93]; /* 0x0044 */
80	83	u16 reflection_high; /* 0x00fe */
81	84	ihs_osd_t osd; /* 0x0100 */
82		- u16 reserved_3[892]; /* 0x0108 */
	85	+ u16 reserved_3[88]; /* 0x010e */
83	86	u16 videomem; /* 0x0800 */
84	87	} ihs_fpga_t;
85	88	#endif
...	...	@@ -98,7 +101,7 @@
98	101	u16 videocontrol; /* 0x009e */
99	102	u16 reserved_3[176]; /* 0x00a0 */
100	103	ihs_osd_t osd; /* 0x0200 */
101		- u16 reserved_4[764]; /* 0x0208 */
	104	+ u16 reserved_4[761]; /* 0x020e */
102	105	u16 videomem; /* 0x0800 */
103	106	} ihs_fpga_t;
104	107	#endif