Eric Lee / smarc-uboot

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Commit 5289e83a8ca8c4a6613d2d019bad330816dbc2d4

Authored by Chandan Nath
Committed by Albert ARIBAUD
1 parent f0f4b5ff50
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM:AM33XX: Add support for TI AM335X EVM 

This patch adds basic support for booting the board.
This patch adds support for the UART necessary to
get to the u-boot prompt.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

Showing 10 changed files with 592 additions and 3 deletions Side-by-side Diff

... ... @@ -738,6 +738,10 @@
738 738  
739 739 am3517_crane ARM ARMV7 (AM35x SoC)
740 740  
  741 +Chandan Nath <chandan.nath@ti.com>
  742 +
  743 + am335x_evm ARM ARMV7 (AM33xx Soc)
  744 +
741 745 Kyungmin Park <kyungmin.park@samsung.com>
742 746  
743 747 apollon ARM1136EJS
arch/arm/cpu/armv7/am33xx/Makefile
Diff comments   View file @ 5289e83
... ... @@ -22,7 +22,7 @@
22 22 COBJS += sys_info.o
23 23 COBJS += ddr.o
24 24 COBJS += emif4.o
25   -
  25 +COBJS += board.o
26 26  
27 27 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
28 28 OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))
arch/arm/cpu/armv7/am33xx/board.c
Diff comments   View file @ 5289e83
  1 +/*
  2 + * board.c
  3 + *
  4 + * Common board functions for AM33XX based boards
  5 + *
  6 + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  7 + *
  8 + * This program is free software; you can redistribute it and/or
  9 + * modify it under the terms of the GNU General Public License as
  10 + * published by the Free Software Foundation; either version 2 of
  11 + * the License, or (at your option) any later version.
  12 + *
  13 + * This program is distributed in the hope that it will be useful,
  14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
  16 + * GNU General Public License for more details.
  17 + */
  18 +
  19 +#include <common.h>
  20 +#include <asm/arch/cpu.h>
  21 +#include <asm/arch/hardware.h>
  22 +#include <asm/arch/ddr_defs.h>
  23 +#include <asm/arch/clock.h>
  24 +#include <asm/io.h>
  25 +
  26 +DECLARE_GLOBAL_DATA_PTR;
  27 +
  28 +struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
  29 +struct timer_reg *timerreg = (struct timer_reg *)DM_TIMER2_BASE;
  30 +
  31 +/*
  32 + * early system init of muxing and clocks.
  33 + */
  34 +void s_init(u32 in_ddr)
  35 +{
  36 + /* WDT1 is already running when the bootloader gets control
  37 + * Disable it to avoid "random" resets
  38 + */
  39 + writel(0xAAAA, &wdtimer->wdtwspr);
  40 + while (readl(&wdtimer->wdtwwps) != 0x0)
  41 + ;
  42 + writel(0x5555, &wdtimer->wdtwspr);
  43 + while (readl(&wdtimer->wdtwwps) != 0x0)
  44 + ;
  45 +
  46 + /* Setup the PLLs and the clocks for the peripherals */
  47 +#ifdef CONFIG_SETUP_PLL
  48 + pll_init();
  49 +#endif
  50 + if (!in_ddr)
  51 + config_ddr();
  52 +}
  53 +
  54 +/* Initialize timer */
  55 +void init_timer(void)
  56 +{
  57 + /* Reset the Timer */
  58 + writel(0x2, (&timerreg->tsicrreg));
  59 +
  60 + /* Wait until the reset is done */
  61 + while (readl(&timerreg->tiocpcfgreg) & 1)
  62 + ;
  63 +
  64 + /* Start the Timer */
  65 + writel(0x1, (&timerreg->tclrreg));
  66 +}
board/ti/am335x/Makefile
Diff comments   View file @ 5289e83
  1 +#
  2 +# Makefile
  3 +#
  4 +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 +#
  6 +# This program is free software; you can redistribute it and/or
  7 +# modify it under the terms of the GNU General Public License as
  8 +# published by the Free Software Foundation; either version 2 of
  9 +# the License, or (at your option) any later version.
  10 +#
  11 +# This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12 +# kind, whether express or implied; without even the implied warranty
  13 +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14 +# GNU General Public License for more details.
  15 +#
  16 +
  17 +include $(TOPDIR)/config.mk
  18 +
  19 +LIB = $(obj)lib$(BOARD).o
  20 +
  21 +COBJS := evm.o mux.o
  22 +
  23 +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
  24 +OBJS := $(addprefix $(obj),$(COBJS))
  25 +SOBJS := $(addprefix $(obj),$(SOBJS))
  26 +
  27 +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
  28 + $(call cmd_link_o_target, $(OBJS) $(SOBJS))
  29 +
  30 +clean:
  31 + rm -f $(SOBJS) $(OBJS)
  32 +
  33 +distclean: clean
  34 + rm -f $(LIB) core *.bak $(obj).depend
  35 +
  36 +#########################################################################
  37 +
  38 +# defines $(obj).depend target
  39 +include $(SRCTREE)/rules.mk
  40 +
  41 +sinclude $(obj).depend
  42 +
  43 +#########################################################################
board/ti/am335x/common_def.h
Diff comments   View file @ 5289e83
  1 +/*
  2 + * common_def.h
  3 + *
  4 + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or
  7 + * modify it under the terms of the GNU General Public License as
  8 + * published by the Free Software Foundation version 2.
  9 + *
  10 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 + * kind, whether express or implied; without even the implied warranty
  12 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + */
  15 +
  16 +#ifndef __COMMON_DEF_H__
  17 +#define __COMMON_DEF_H__
  18 +
  19 +extern void enable_uart0_pin_mux(void);
  20 +extern void configure_evm_pin_mux(unsigned char daughter_board_id,
  21 + unsigned short daughter_board_profile,
  22 + unsigned char daughter_board_flag);
  23 +
  24 +#endif/*__COMMON_DEF_H__ */
board/ti/am335x/evm.c
Diff comments   View file @ 5289e83
  1 +/*
  2 + * evm.c
  3 + *
  4 + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or
  7 + * modify it under the terms of the GNU General Public License as
  8 + * published by the Free Software Foundation version 2.
  9 + *
  10 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 + * kind, whether express or implied; without even the implied warranty
  12 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + */
  15 +
  16 +#include <common.h>
  17 +#include <asm/arch/cpu.h>
  18 +#include <asm/arch/hardware.h>
  19 +#include "common_def.h"
  20 +#include <serial.h>
  21 +
  22 +DECLARE_GLOBAL_DATA_PTR;
  23 +
  24 +#define UART_RESET (0x1 << 1)
  25 +#define UART_CLK_RUNNING_MASK 0x1
  26 +#define UART_SMART_IDLE_EN (0x1 << 0x3)
  27 +
  28 +/*
  29 + * Basic board specific setup
  30 + */
  31 +int init_basic_setup(void)
  32 +{
  33 + /* Initialize the Timer */
  34 + init_timer();
  35 +
  36 + /* address of boot parameters */
  37 + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
  38 +
  39 + return 0;
  40 +}
  41 +
  42 +int board_init(void)
  43 +{
  44 + enable_uart0_pin_mux();
  45 + init_basic_setup();
  46 +
  47 + return 0;
  48 +}
board/ti/am335x/mux.c
Diff comments   View file @ 5289e83
  1 +/*
  2 + * mux.c
  3 + *
  4 + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or
  7 + * modify it under the terms of the GNU General Public License as
  8 + * published by the Free Software Foundation version 2.
  9 + *
  10 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 + * kind, whether express or implied; without even the implied warranty
  12 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + */
  15 +
  16 +#include <config.h>
  17 +#include "common_def.h"
  18 +#include <asm/arch/hardware.h>
  19 +#include <asm/io.h>
  20 +
  21 +#define MUX_CFG(value, offset) \
  22 + __raw_writel(value, (CTRL_BASE + offset));
  23 +
  24 +/* PAD Control Fields */
  25 +#define SLEWCTRL (0x1 << 6)
  26 +#define RXACTIVE (0x1 << 5)
  27 +#define PULLUP_EN (0x1 << 4) /* Pull UP Selection */
  28 +#define PULLUDEN (0x0 << 3) /* Pull up enabled */
  29 +#define PULLUDDIS (0x1 << 3) /* Pull up disabled */
  30 +#define MODE(val) val /* used for Readability */
  31 +
  32 +/*
  33 + * PAD CONTROL OFFSETS
  34 + * Field names corresponds to the pad signal name
  35 + */
  36 +struct pad_signals {
  37 + int gpmc_ad0;
  38 + int gpmc_ad1;
  39 + int gpmc_ad2;
  40 + int gpmc_ad3;
  41 + int gpmc_ad4;
  42 + int gpmc_ad5;
  43 + int gpmc_ad6;
  44 + int gpmc_ad7;
  45 + int gpmc_ad8;
  46 + int gpmc_ad9;
  47 + int gpmc_ad10;
  48 + int gpmc_ad11;
  49 + int gpmc_ad12;
  50 + int gpmc_ad13;
  51 + int gpmc_ad14;
  52 + int gpmc_ad15;
  53 + int gpmc_a0;
  54 + int gpmc_a1;
  55 + int gpmc_a2;
  56 + int gpmc_a3;
  57 + int gpmc_a4;
  58 + int gpmc_a5;
  59 + int gpmc_a6;
  60 + int gpmc_a7;
  61 + int gpmc_a8;
  62 + int gpmc_a9;
  63 + int gpmc_a10;
  64 + int gpmc_a11;
  65 + int gpmc_wait0;
  66 + int gpmc_wpn;
  67 + int gpmc_be1n;
  68 + int gpmc_csn0;
  69 + int gpmc_csn1;
  70 + int gpmc_csn2;
  71 + int gpmc_csn3;
  72 + int gpmc_clk;
  73 + int gpmc_advn_ale;
  74 + int gpmc_oen_ren;
  75 + int gpmc_wen;
  76 + int gpmc_be0n_cle;
  77 + int lcd_data0;
  78 + int lcd_data1;
  79 + int lcd_data2;
  80 + int lcd_data3;
  81 + int lcd_data4;
  82 + int lcd_data5;
  83 + int lcd_data6;
  84 + int lcd_data7;
  85 + int lcd_data8;
  86 + int lcd_data9;
  87 + int lcd_data10;
  88 + int lcd_data11;
  89 + int lcd_data12;
  90 + int lcd_data13;
  91 + int lcd_data14;
  92 + int lcd_data15;
  93 + int lcd_vsync;
  94 + int lcd_hsync;
  95 + int lcd_pclk;
  96 + int lcd_ac_bias_en;
  97 + int mmc0_dat3;
  98 + int mmc0_dat2;
  99 + int mmc0_dat1;
  100 + int mmc0_dat0;
  101 + int mmc0_clk;
  102 + int mmc0_cmd;
  103 + int mii1_col;
  104 + int mii1_crs;
  105 + int mii1_rxerr;
  106 + int mii1_txen;
  107 + int mii1_rxdv;
  108 + int mii1_txd3;
  109 + int mii1_txd2;
  110 + int mii1_txd1;
  111 + int mii1_txd0;
  112 + int mii1_txclk;
  113 + int mii1_rxclk;
  114 + int mii1_rxd3;
  115 + int mii1_rxd2;
  116 + int mii1_rxd1;
  117 + int mii1_rxd0;
  118 + int rmii1_refclk;
  119 + int mdio_data;
  120 + int mdio_clk;
  121 + int spi0_sclk;
  122 + int spi0_d0;
  123 + int spi0_d1;
  124 + int spi0_cs0;
  125 + int spi0_cs1;
  126 + int ecap0_in_pwm0_out;
  127 + int uart0_ctsn;
  128 + int uart0_rtsn;
  129 + int uart0_rxd;
  130 + int uart0_txd;
  131 + int uart1_ctsn;
  132 + int uart1_rtsn;
  133 + int uart1_rxd;
  134 + int uart1_txd;
  135 + int i2c0_sda;
  136 + int i2c0_scl;
  137 + int mcasp0_aclkx;
  138 + int mcasp0_fsx;
  139 + int mcasp0_axr0;
  140 + int mcasp0_ahclkr;
  141 + int mcasp0_aclkr;
  142 + int mcasp0_fsr;
  143 + int mcasp0_axr1;
  144 + int mcasp0_ahclkx;
  145 + int xdma_event_intr0;
  146 + int xdma_event_intr1;
  147 + int nresetin_out;
  148 + int porz;
  149 + int nnmi;
  150 + int osc0_in;
  151 + int osc0_out;
  152 + int rsvd1;
  153 + int tms;
  154 + int tdi;
  155 + int tdo;
  156 + int tck;
  157 + int ntrst;
  158 + int emu0;
  159 + int emu1;
  160 + int osc1_in;
  161 + int osc1_out;
  162 + int pmic_power_en;
  163 + int rtc_porz;
  164 + int rsvd2;
  165 + int ext_wakeup;
  166 + int enz_kaldo_1p8v;
  167 + int usb0_dm;
  168 + int usb0_dp;
  169 + int usb0_ce;
  170 + int usb0_id;
  171 + int usb0_vbus;
  172 + int usb0_drvvbus;
  173 + int usb1_dm;
  174 + int usb1_dp;
  175 + int usb1_ce;
  176 + int usb1_id;
  177 + int usb1_vbus;
  178 + int usb1_drvvbus;
  179 + int ddr_resetn;
  180 + int ddr_csn0;
  181 + int ddr_cke;
  182 + int ddr_ck;
  183 + int ddr_nck;
  184 + int ddr_casn;
  185 + int ddr_rasn;
  186 + int ddr_wen;
  187 + int ddr_ba0;
  188 + int ddr_ba1;
  189 + int ddr_ba2;
  190 + int ddr_a0;
  191 + int ddr_a1;
  192 + int ddr_a2;
  193 + int ddr_a3;
  194 + int ddr_a4;
  195 + int ddr_a5;
  196 + int ddr_a6;
  197 + int ddr_a7;
  198 + int ddr_a8;
  199 + int ddr_a9;
  200 + int ddr_a10;
  201 + int ddr_a11;
  202 + int ddr_a12;
  203 + int ddr_a13;
  204 + int ddr_a14;
  205 + int ddr_a15;
  206 + int ddr_odt;
  207 + int ddr_d0;
  208 + int ddr_d1;
  209 + int ddr_d2;
  210 + int ddr_d3;
  211 + int ddr_d4;
  212 + int ddr_d5;
  213 + int ddr_d6;
  214 + int ddr_d7;
  215 + int ddr_d8;
  216 + int ddr_d9;
  217 + int ddr_d10;
  218 + int ddr_d11;
  219 + int ddr_d12;
  220 + int ddr_d13;
  221 + int ddr_d14;
  222 + int ddr_d15;
  223 + int ddr_dqm0;
  224 + int ddr_dqm1;
  225 + int ddr_dqs0;
  226 + int ddr_dqsn0;
  227 + int ddr_dqs1;
  228 + int ddr_dqsn1;
  229 + int ddr_vref;
  230 + int ddr_vtp;
  231 + int ddr_strben0;
  232 + int ddr_strben1;
  233 + int ain7;
  234 + int ain6;
  235 + int ain5;
  236 + int ain4;
  237 + int ain3;
  238 + int ain2;
  239 + int ain1;
  240 + int ain0;
  241 + int vrefp;
  242 + int vrefn;
  243 +};
  244 +
  245 +struct module_pin_mux {
  246 + short reg_offset;
  247 + unsigned char val;
  248 +};
  249 +
  250 +/* Pad control register offset */
  251 +#define PAD_CTRL_BASE 0x800
  252 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \
  253 + (PAD_CTRL_BASE))->x)
  254 +
  255 +static struct module_pin_mux uart0_pin_mux[] = {
  256 + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
  257 + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
  258 + {-1},
  259 +};
  260 +
  261 +/*
  262 + * Configure the pin mux for the module
  263 + */
  264 +static void configure_module_pin_mux(struct module_pin_mux *mod_pin_mux)
  265 +{
  266 + int i;
  267 +
  268 + if (!mod_pin_mux)
  269 + return;
  270 +
  271 + for (i = 0; mod_pin_mux[i].reg_offset != -1; i++)
  272 + MUX_CFG(mod_pin_mux[i].val, mod_pin_mux[i].reg_offset);
  273 +}
  274 +
  275 +void enable_uart0_pin_mux(void)
  276 +{
  277 + configure_module_pin_mux(uart0_pin_mux);
  278 +}
... ... @@ -161,6 +161,7 @@
161 161 integratorap_cm946es arm arm946es integrator armltd - integratorap
162 162 integratorcp_cm946es arm arm946es integrator armltd - integratorcp
163 163 ca9x4_ct_vxp arm armv7 vexpress armltd
  164 +am335x_evm arm armv7 am335x ti am33xx
164 165 efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg
165 166 efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg
166 167 mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
drivers/serial/ns16550.c
Diff comments   View file @ 5289e83
... ... @@ -37,7 +37,8 @@
37 37 void NS16550_init(NS16550_t com_port, int baud_divisor)
38 38 {
39 39 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
40   -#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
  40 +#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
  41 + defined(CONFIG_AM33XX)
41 42 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
42 43 #endif
43 44 serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr);
... ... @@ -50,7 +51,9 @@
50 51 serial_out(baud_divisor & 0xff, &com_port->dll);
51 52 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
52 53 serial_out(UART_LCRVAL, &com_port->lcr);
53   -#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
  54 +#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
  55 + defined(CONFIG_AM33XX)
  56 +
54 57 #if defined(CONFIG_APTIX)
55 58 /* /13 mode so Aptix 6MHz can hit 115200 */
56 59 serial_out(3, &com_port->mdr1);
include/configs/am335x_evm.h
Diff comments   View file @ 5289e83
  1 +/*
  2 + * am335x_evm.h
  3 + *
  4 + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or
  7 + * modify it under the terms of the GNU General Public License as
  8 + * published by the Free Software Foundation version 2.
  9 + *
  10 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 + * kind, whether express or implied; without even the implied warranty
  12 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + */
  15 +
  16 +#ifndef __CONFIG_AM335X_EVM_H
  17 +#define __CONFIG_AM335X_EVM_H
  18 +
  19 +#define CONFIG_AM335X
  20 +#define CONFIG_CMD_MEMORY /* for mtest */
  21 +#undef CONFIG_GZIP
  22 +#undef CONFIG_ZLIB
  23 +#undef CONFIG_SYS_HUSH_PARSER
  24 +#undef CONFIG_CMD_NET
  25 +
  26 +#include <asm/arch/cpu.h>
  27 +#include <asm/arch/hardware.h>
  28 +
  29 +#define CONFIG_SETUP_PLL
  30 +#define CONFIG_AM335X_CONFIG_DDR
  31 +#define CONFIG_ENV_SIZE 0x400
  32 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024))
  33 +#define CONFIG_SYS_PROMPT "AM335X# "
  34 +#define CONFIG_SYS_NO_FLASH
  35 +#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
  36 +
  37 +#define CONFIG_CMD_ASKENV
  38 +#define CONFIG_VERSION_VARIABLE
  39 +
  40 +/* set to negative value for no autoboot */
  41 +#define CONFIG_BOOTDELAY 3
  42 +#define CONFIG_SYS_AUTOLOAD "no"
  43 +#define CONFIG_BOOTFILE "uImage"
  44 +#define CONFIG_EXTRA_ENV_SETTINGS \
  45 + "verify=yes\0" \
  46 + "ramdisk_file=ramdisk.gz\0" \
  47 +
  48 +/* Clock Defines */
  49 +#define V_OSCK 24000000 /* Clock output from T2 */
  50 +#define V_SCLK (V_OSCK >> 1)
  51 +
  52 +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for
  53 + initial data */
  54 +#define CONFIG_CMD_ECHO
  55 +
  56 +/* max number of command args */
  57 +#define CONFIG_SYS_MAXARGS 32
  58 +
  59 +/* Console I/O Buffer Size */
  60 +#define CONFIG_SYS_CBSIZE 512
  61 +
  62 +/* Print Buffer Size */
  63 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
  64 + + sizeof(CONFIG_SYS_PROMPT) + 16)
  65 +
  66 +/* Boot Argument Buffer Size */
  67 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  68 +
  69 +/*
  70 + * memtest works on 8 MB in DRAM after skipping 32MB from
  71 + * start addr of ram disk
  72 + */
  73 +#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
  74 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
  75 + + (8 * 1024 * 1024))
  76 +
  77 +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
  78 +#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
  79 +#define CONFIG_SYS_HZ 1000 /* 1ms clock */
  80 +
  81 + /* Physical Memory Map */
  82 +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
  83 +#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
  84 +#define PHYS_DRAM_1_SIZE 0x10000000 /*(0x80000000 / 8) 256 MB */
  85 +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
  86 +
  87 +#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
  88 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
  89 + GENERATED_GBL_DATA_SIZE)
  90 + /* Platform/Board specific defs */
  91 +#define CONFIG_SYS_CLK_FREQ 24000000
  92 +#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
  93 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  94 +#define CONFIG_SYS_HZ 1000
  95 +
  96 +/* NS16550 Configuration */
  97 +#define CONFIG_SYS_NS16550
  98 +#define CONFIG_SYS_NS16550_SERIAL
  99 +#define CONFIG_SYS_NS16550_REG_SIZE (-4)
  100 +#define CONFIG_SYS_NS16550_CLK (48000000)
  101 +#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
  102 +#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3 on IA BOard */
  103 +
  104 +#define CONFIG_BAUDRATE 115200
  105 +#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
  106 +4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
  107 +
  108 +/*
  109 + * select serial console configuration
  110 + */
  111 +#define CONFIG_SERIAL1 1
  112 +#define CONFIG_CONS_INDEX 1
  113 +#define CONFIG_SYS_CONSOLE_INFO_QUIET
  114 +
  115 +#define CONFIG_ENV_IS_NOWHERE
  116 +
  117 +#define CONFIG_SYS_TEXT_BASE 0x402f0400
  118 +
  119 +/* Unsupported features */
  120 +#undef CONFIG_USE_IRQ
  121 +
  122 +#endif /* ! __CONFIG_AM335X_EVM_H */