Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

Mobile storage is used the CLK_DIV_FSYS3 value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk
Mobile storage is used the CLK_DIV_FSYS3 value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Jaehoon Chung · Minkyu Kang
1 parent c39e969e8e
Showing 1 changed file with 5 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/exynos/clock.c
@@ -591,9 +591,14 @@
 	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
 	 * CLK_DIV_FSYS2
 	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+	 * CLK_DIV_FSYS3
+	 * MMC4_PRE_RATIO [15:8]
 	 */
 	if (dev_index < 2) {
 		addr = (unsigned int)&clk->div_fsys1;
+	}  else if (dev_index == 4) {
+		addr = (unsigned int)&clk->div_fsys3;
+		dev_index -= 4;
 	} else {
 		addr = (unsigned int)&clk->div_fsys2;
 		dev_index -= 2;
...	...	@@ -591,9 +591,14 @@
591	591	* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
592	592	* CLK_DIV_FSYS2
593	593	* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
	594	+ * CLK_DIV_FSYS3
	595	+ * MMC4_PRE_RATIO [15:8]
594	596	*/
595	597	if (dev_index < 2) {
596	598	addr = (unsigned int)&clk->div_fsys1;
	599	+ } else if (dev_index == 4) {
	600	+ addr = (unsigned int)&clk->div_fsys3;
	601	+ dev_index -= 4;
597	602	} else {
598	603	addr = (unsigned int)&clk->div_fsys2;
599	604	dev_index -= 2;