Eric Lee / smarc-uboot

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Commit 5411988242cea736c27e9ec758fe5365c0162838

Authored by Valentin Longchamp
Committed by Tom Rini
1 parent 38467df5d6
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

powerpc/83xx: add support for kmtegr1 board 

This board uses the same CPU (8309) as VECT1. The memory however is
different since it has NAND Flash, the NOR Flash partitioning is
different and of course the FPGAs as well.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Christoph Dietrich <christoph.dietrich@keymile.com>

Showing 3 changed files with 66 additions and 4 deletions Side-by-side Diff

board/keymile/km83xx/MAINTAINERS
Diff comments   View file @ 5411988
... ... @@ -9,6 +9,7 @@
9 9 F: configs/kmopti2_defconfig
10 10 F: configs/kmtepr2_defconfig
11 11 F: include/configs/suvd3.h
  12 +F: configs/kmtegr1_defconfig
12 13 F: configs/kmvect1_defconfig
13 14 F: configs/suvd3_defconfig
14 15 F: configs/tuge1_defconfig
configs/kmtegr1_defconfig
Diff comments   View file @ 5411988
  1 +CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
  2 +CONFIG_PPC=y
  3 +CONFIG_MPC83xx=y
  4 +CONFIG_TARGET_SUVD3=y
include/configs/suvd3.h
Diff comments   View file @ 5411988
... ... @@ -29,13 +29,48 @@
29 29 #define CONFIG_KM_BOARD_NAME "suvd3"
30 30 /* include common defines/options for all 8321 Keymile boards */
31 31 #include "km/km8321-common.h"
  32 +
32 33 #elif defined(CONFIG_KMVECT1) /* VECT1 board specific */
33 34 #define CONFIG_HOSTNAME kmvect1
34 35 #define CONFIG_KM_BOARD_NAME "kmvect1"
  36 +/* at end of uboot partition, before env */
  37 +#define CONFIG_SYS_QE_FW_ADDR 0xF00B0000
35 38 /* include common defines/options for all 8309 Keymile boards */
36 39 #include "km/km8309-common.h"
  40 +
  41 +#elif defined(CONFIG_KMTEGR1) /* TEGR1 board specific */
  42 +#define CONFIG_HOSTNAME kmtegr1
  43 +#define CONFIG_KM_BOARD_NAME "kmtegr1"
  44 +#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0"
  45 +#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1"
  46 +#define MTDIDS_DEFAULT "nor0=boot,nand0=app"
  47 +#define MTDPARTS_DEFAULT "mtdparts=" \
  48 + "boot:" \
  49 + "768k(u-boot)," \
  50 + "256k(qe-fw)," \
  51 + "128k(env)," \
  52 + "128k(envred)," \
  53 + "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" \
  54 + "app:" \
  55 + "-(" CONFIG_KM_UBI_PARTITION_NAME_APP ");"
  56 +
  57 +#define CONFIG_ENV_ADDR 0xF0100000
  58 +#define CONFIG_ENV_OFFSET 0x100000
  59 +
  60 +#define CONFIG_CMD_NAND
  61 +#define CONFIG_NAND_ECC_BCH
  62 +#define CONFIG_BCH
  63 +#define CONFIG_NAND_KMETER1
  64 +#define CONFIG_SYS_MAX_NAND_DEVICE 1
  65 +#define NAND_MAX_CHIPS 1
  66 +
  67 +/* include common defines/options for all 8309 Keymile boards */
  68 +#include "km/km8309-common.h"
  69 +/* must be after the include because KMBEC_FPGA is otherwise undefined */
  70 +#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
  71 +
37 72 #else
38   -#error Supported boards are: SUVD3, KMVECT1
  73 +#error Supported boards are: SUVD3, KMVECT1, KMTEGR1
39 74 #endif
40 75  
41 76 #define CONFIG_SYS_APP1_BASE 0xA0000000
... ... @@ -56,6 +91,7 @@
56 91 *
57 92 */
58 93  
  94 +#if defined(CONFIG_SUVD3) || defined(CONFIG_KMVECT1)
59 95 /*
60 96 * APP1 on the local bus CS2
61 97 */
62 98  
... ... @@ -82,14 +118,26 @@
82 118 0x0000c000 | \
83 119 MxMR_WLFx_2X)
84 120  
  121 +#elif defined(CONFIG_KMTEGR1)
  122 +#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
  123 + BR_PS_16 | \
  124 + BR_MS_GPCM | \
  125 + BR_V)
  126 +
  127 +#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
  128 + OR_GPCM_SCY_5 | \
  129 + OR_GPCM_TRLX_CLEAR | \
  130 + OR_GPCM_EHTR_CLEAR)
  131 +
  132 +#endif /* CONFIG_KMTEGR1 */
  133 +
85 134 #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
86 135 #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
87 136  
88 137 /*
89 138 * MMU Setup
90 139 */
91   -
92   -
  140 +#if defined(CONFIG_SUVD3) || defined(CONFIG_KMVECT1)
93 141 /* APP1: icache cacheable, but dcache-inhibit and guarded */
94 142 #define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
95 143 BATL_MEMCOHERENCE)
... ... @@ -99,6 +147,13 @@
99 147 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
100 148 #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
101 149  
  150 +#elif defined(CONFIG_KMTEGR1)
  151 +#define CONFIG_SYS_IBAT5L (0)
  152 +#define CONFIG_SYS_IBAT5U (0)
  153 +#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
  154 +#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
  155 +#endif /* CONFIG_KMTEGR1 */
  156 +
102 157 #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
103 158 BATL_MEMCOHERENCE)
104 159 #define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \
105 160  
... ... @@ -131,7 +186,9 @@
131 186 #define CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_FIXED_PHY_ADDR
132 187 #define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII
133 188 #define CONFIG_SYS_UEC1_INTERFACE_SPEED 100
  189 +#endif /* CONFIG_KMVECT1 */
134 190  
  191 +#if defined(CONFIG_KMVECT1) || defined(CONFIG_KMTEGR1)
135 192 /* ethernet port connected to piggy (UEC2) */
136 193 #define CONFIG_HAS_ETH1
137 194 #define CONFIG_UEC_ETH2
... ... @@ -142,7 +199,7 @@
142 199 #define CONFIG_SYS_UEC2_PHY_ADDR 0
143 200 #define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
144 201 #define CONFIG_SYS_UEC2_INTERFACE_SPEED 100
145   -#endif /* CONFIG_KMVECT1 */
  202 +#endif /* CONFIG_KMVECT1 || CONFIG_KMTEGR1 */
146 203  
147 204 #endif /* __CONFIG_H */