SPEAr : Support added for SPEAr600 board

SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>

SPEAr : Support added for SPEAr600 board
SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by: Vipin <vipin.kumar@st.com>
Vipin KUMAR · Tom Rix
1 parent 62db1c0d79
Showing 12 changed files with 928 additions and 0 deletions Side-by-side Diff
MAKEALL
Makefile
board/spear/common/Makefile
board/spear/common/spr_lowlevel_init.S
board/spear/common/spr_misc.c
board/spear/spear600/Makefile
board/spear/spear600/config.mk
board/spear/spear600/spear600.c
include/asm-arm/arch-spear/spr_defs.h
include/asm-arm/arch-spear/spr_xloader_table.h
include/configs/spear-common.h
include/configs/spear6xx.h
@@ -574,6 +574,7 @@
 	sheevaplug		\
 	smdk2400		\
 	smdk2410		\
+	spear600		\
 	trab			\
 	VCMA9			\
 	versatile		\
@@ -3036,6 +3036,9 @@
 smdk2410_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
  
+spear600_config :	unconfig
+	@$(MKCONFIG) -n $@ -t $(@:_config=) spear6xx arm arm926ejs $(@:_config=) spear spear
+
 SX1_stdout_serial_config \
 SX1_config:		unconfig
 	@mkdir -p $(obj)include
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB	= $(obj)lib$(VENDOR).a
+
+COBJS	:= spr_misc.o
+SOBJS	:= spr_lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+/*
+ * (C) Copyright 2006
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+/*
+ * platform specific initializations are already done in Xloader
+ * Initializations already done include
+ * DDR, PLLs, IP's clock enable and reset release etc
+ */
+.globl lowlevel_init
+lowlevel_init:
+	/* By default, U-Boot switches CPU to low-vector */
+	/* Revert this as we work in high vector even in U-Boot */
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #0x00002000
+	mcr	p15, 0, r0, c1, c0, 0
+	mov	pc, lr
+
+/* void setfreq(unsigned int device, unsigned int frequency) */
+.global setfreq
+setfreq:
+	stmfd 	sp!,{r14}
+	stmfd 	sp!,{r0-r12}
+
+	mov  	r8,sp
+	ldr 	sp,SRAM_STACK_V
+
+	/* Saving the function arguements for later use */
+	mov  	r4,r0
+	mov  	r5,r1
+
+	/* Putting DDR into self refresh */
+	ldr 	r0,DDR_07_V
+	ldr	r1,[r0]
+	ldr	r2,DDR_ACTIVE_V
+	bic	r1, r1, r2
+	str	r1,[r0]
+	ldr 	r0,DDR_57_V
+	ldr	r1,[r0]
+	ldr	r2,CYCLES_MASK_V
+	bic	r1, r1, r2
+	ldr	r2,REFRESH_CYCLES_V
+	orr	r1, r1, r2, lsl #16
+	str	r1,[r0]
+	ldr 	r0,DDR_07_V
+	ldr	r1,[r0]
+	ldr	r2,SREFRESH_MASK_V
+	orr	r1, r1, r2
+	str	r1,[r0]
+
+	/* flush pipeline */
+	b	flush
+	.align 5
+flush:
+	/* Delay to ensure self refresh mode */
+	ldr	r0,SREFRESH_DELAY_V
+delay:
+	sub	r0,r0,#1
+	cmp	r0,#0
+	bne	delay
+
+	/* Putting system in slow mode */
+	ldr	r0,SCCTRL_V
+	mov	r1,#2
+	str	r1,[r0]
+
+	/* Changing PLL(1/2) frequency */
+	mov	r0,r4
+	mov	r1,r5
+
+	cmp	r4,#0
+	beq	pll1_freq
+
+	/* Change PLL2 (DDR frequency) */
+	ldr	r6,PLL2_FREQ_V
+	ldr	r7,PLL2_CNTL_V
+	b	pll2_freq
+
+pll1_freq:
+	/* Change PLL1 (CPU frequency) */
+	ldr	r6,PLL1_FREQ_V
+	ldr	r7,PLL1_CNTL_V
+
+pll2_freq:
+	mov	r0,r6
+	ldr	r1,[r0]
+	ldr	r2,PLLFREQ_MASK_V
+	bic	r1,r1,r2
+	mov	r2,r5,lsr#1
+	orr	r1,r1,r2,lsl#24
+	str	r1,[r0]
+
+	mov	r0,r7
+	ldr	r1,P1C0A_V
+	str	r1,[r0]
+	ldr	r1,P1C0E_V
+	str	r1,[r0]
+	ldr	r1,P1C06_V
+	str	r1,[r0]
+	ldr	r1,P1C0E_V
+	str	r1,[r0]
+
+lock:
+	ldr	r1,[r0]
+	and	r1,r1,#1
+	cmp	r1,#0
+	beq	lock
+
+	/* Putting system back to normal mode */
+	ldr	r0,SCCTRL_V
+	mov	r1,#4
+	str	r1,[r0]
+
+	/* Putting DDR back to normal */
+	ldr	r0,DDR_07_V
+	ldr	r1,[R0]
+	ldr	r2,SREFRESH_MASK_V
+	bic	r1, r1, r2
+	str	r1,[r0]
+	ldr	r2,DDR_ACTIVE_V
+	orr	r1, r1, r2
+	str	r1,[r0]
+
+	/* Delay to ensure self refresh mode */
+	ldr	r0,SREFRESH_DELAY_V
+1:
+	sub	r0,r0,#1
+	cmp	r0,#0
+	bne	1b
+
+	mov	sp,r8
+	/* Resuming back to code */
+	ldmia	sp!,{r0-r12}
+	ldmia	sp!,{pc}
+
+SCCTRL_V:
+	.word 0xfca00000
+PLL1_FREQ_V:
+	.word 0xfca8000C
+PLL1_CNTL_V:
+	.word 0xfca80008
+PLL2_FREQ_V:
+	.word 0xfca80018
+PLL2_CNTL_V:
+	.word 0xfca80014
+PLLFREQ_MASK_V:
+	.word 0xff000000
+P1C0A_V:
+	.word 0x1C0A
+P1C0E_V:
+	.word 0x1C0E
+P1C06_V:
+	.word 0x1C06
+
+SREFRESH_DELAY_V:
+	.word 0x9999
+SRAM_STACK_V:
+	.word 0xD2800600
+DDR_07_V:
+	.word 0xfc60001c
+DDR_ACTIVE_V:
+	.word 0x01000000
+DDR_57_V:
+	.word 0xfc6000e4
+CYCLES_MASK_V:
+	.word 0xffff0000
+REFRESH_CYCLES_V:
+	.word 0xf0f0
+SREFRESH_MASK_V:
+	.word 0x00010000
+
+.global setfreq_sz
+setfreq_sz:
+	.word setfreq_sz - setfreq
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <net.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spr_xloader_table.h>
+#include <asm/arch/spr_defs.h>
+
+#define CPU		0
+#define DDR		1
+#define SRAM_REL	0xD2801000
+
+DECLARE_GLOBAL_DATA_PTR;
+static struct chip_data chip_data;
+
+int dram_init(void)
+{
+	struct xloader_table *xloader_tb =
+	    (struct xloader_table *)XLOADER_TABLE_ADDRESS;
+	struct xloader_table_1_1 *table_1_1;
+	struct xloader_table_1_2 *table_1_2;
+	struct chip_data *chip = &chip_data;
+
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1,
+					       PHYS_SDRAM_1_MAXSIZE);
+
+	if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) {
+		table_1_1 = &xloader_tb->table.table_1_1;
+		chip->dramfreq = table_1_1->ddrfreq;
+		chip->dramtype = table_1_1->ddrtype;
+
+	} else if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
+		table_1_2 = &xloader_tb->table.table_1_2;
+		chip->dramfreq = table_1_2->ddrfreq;
+		chip->dramtype = table_1_2->ddrtype;
+	} else {
+		chip->dramfreq = -1;
+	}
+
+	return 0;
+}
+
+int misc_init_r(void)
+{
+	setenv("verify", "n");
+
+#if defined(CONFIG_SPEAR_USBTTY)
+	setenv("stdin", "usbtty");
+	setenv("stdout", "usbtty");
+	setenv("stderr", "usbtty");
+#endif
+	return 0;
+}
+
+int spear_board_init(ulong mach_type)
+{
+	struct xloader_table *xloader_tb =
+	    (struct xloader_table *)XLOADER_TABLE_ADDRESS;
+	struct xloader_table_1_2 *table_1_2;
+	struct chip_data *chip = &chip_data;
+
+	gd->bd->bi_arch_number = mach_type;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
+
+	/* CPU is initialized to work at 333MHz in Xloader */
+	chip->cpufreq = 333;
+
+	if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
+		table_1_2 = &xloader_tb->table.table_1_2;
+		memcpy(chip->version, table_1_2->version,
+		       sizeof(chip->version));
+	}
+
+	return 0;
+}
+
+int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	void (*sram_setfreq) (unsigned int, unsigned int);
+	struct chip_data *chip = &chip_data;
+	unsigned char mac[6];
+	unsigned int frequency;
+
+	if ((argc > 3) || (argc < 2)) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
+
+		frequency = simple_strtoul(argv[2], NULL, 0);
+
+		if (frequency > 333) {
+			printf("Frequency is limited to 333MHz\n");
+			return 1;
+		}
+
+		sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
+
+		if (!strcmp(argv[1], "cpufreq")) {
+			sram_setfreq(CPU, frequency);
+			printf("CPU frequency changed to %u\n", frequency);
+
+			chip->cpufreq = frequency;
+		} else {
+			sram_setfreq(DDR, frequency);
+			printf("DDR frequency changed to %u\n", frequency);
+
+			chip->dramfreq = frequency;
+		}
+
+		return 0;
+	} else if (!strcmp(argv[1], "print")) {
+
+		if (chip->cpufreq == -1)
+			printf("CPU Freq    = Not Known\n");
+		else
+			printf("CPU Freq    = %d MHz\n", chip->cpufreq);
+
+		if (chip->dramfreq == -1)
+			printf("DDR Freq    = Not Known\n");
+		else
+			printf("DDR Freq    = %d MHz\n", chip->dramfreq);
+
+		if (chip->dramtype == DDRMOBILE)
+			printf("DDR Type    = MOBILE\n");
+		else if (chip->dramtype == DDR2)
+			printf("DDR Type    = DDR2\n");
+		else
+			printf("DDR Type    = Not Known\n");
+
+		printf("Xloader Rev = %s\n", chip->version);
+
+		return 0;
+	}
+
+	cmd_usage(cmdtp);
+	return 1;
+}
+
+U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
+	   "configure chip",
+	   "chip_config cpufreq/ddrfreq frequency\n"
+	   "chip_config print");
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= spear600.o
+SOBJS	:=
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+#
+# (C) Copyright 2009
+# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#########################################################################
+
+TEXT_BASE = 0x00700000
+
+ALL += $(obj)u-boot.img
+
+# Environment variables in NAND
+ifeq ($(ENV),NAND)
+PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
+else
+PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
+endif
+
+ifeq ($(CONSOLE),USB)
+PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY
+endif
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spr_defs.h>
+#include <asm/arch/spr_misc.h>
+#include <asm/arch/spr_nand.h>
+
+int board_init(void)
+{
+	return spear_board_init(MACH_TYPE_SPEAR600);
+}
+
+/*
+ * board_nand_init - Board specific NAND initialization
+ * @nand:	mtd private chip structure
+ *
+ * Called by nand_init_chip to initialize the board specific functions
+ */
+
+int board_nand_init(struct nand_chip *nand)
+{
+	struct misc_regs *const misc_regs_p =
+	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+
+	if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
+		return spear_nand_init(nand);
+
+	return -1;
+}
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __SPR_DEFS_H__
+#define __SPR_DEFS_H__
+
+extern int spear_board_init(ulong);
+extern void setfreq(unsigned int, unsigned int);
+extern unsigned int setfreq_sz;
+
+struct chip_data {
+	int cpufreq;
+	int dramfreq;
+	int dramtype;
+	uchar version[32];
+};
+
+#endif
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SPR_XLOADER_TABLE_H
+#define _SPR_XLOADER_TABLE_H
+
+#define XLOADER_TABLE_VERSION_1_1	2
+#define XLOADER_TABLE_VERSION_1_2	3
+
+#define XLOADER_TABLE_ADDRESS		0xD2801FF0
+
+#define DDRMOBILE	1
+#define DDR2		2
+
+#define REV_BA		1
+#define REV_AA		2
+#define REV_AB		3
+
+struct xloader_table_1_1 {
+	unsigned short ddrfreq;
+	unsigned char ddrsize;
+	unsigned char ddrtype;
+
+	unsigned char soc_rev;
+} __attribute__ ((packed));
+
+struct xloader_table_1_2 {
+	unsigned const char *version;
+
+	unsigned short ddrfreq;
+	unsigned char ddrsize;
+	unsigned char ddrtype;
+
+	unsigned char soc_rev;
+} __attribute__ ((packed));
+
+union table_contents {
+	struct xloader_table_1_1 table_1_1;
+	struct xloader_table_1_2 table_1_2;
+};
+
+struct xloader_table {
+	unsigned char table_version;
+	union table_contents table;
+} __attribute__ ((packed));
+
+#endif
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SPEAR_COMMON_H
+#define _SPEAR_COMMON_H
+/*
+ * Common configurations used for both spear3xx as well as spear6xx
+ */
+
+/* USBD driver configuration */
+#define CONFIG_SPEARUDC
+#define CONFIG_USB_DEVICE
+#define CONFIG_USB_TTY
+
+#define CONFIG_USBD_PRODUCT_NAME		"SPEAr SoC"
+#define CONFIG_USBD_MANUFACTURER		"ST Microelectronics"
+
+#define CONFIG_EXTRA_ENV_USBTTY			"usbtty=cdc_acm\0"
+
+/* I2C driver configuration */
+#define CONFIG_HARD_I2C
+#define CONFIG_SPEAR_I2C
+#define CONFIG_SYS_I2C_SPEED			400000
+#define CONFIG_SYS_I2C_SLAVE			0x02
+
+#define CONFIG_I2C_CHIPADDRESS			0x50
+
+/* Timer, HZ specific defines */
+#define CONFIG_SYS_HZ				(1000)
+#define CONFIG_SYS_HZ_CLOCK			(8300000)
+
+/* Flash configuration */
+#if defined(CONFIG_FLASH_PNOR)
+#define CONFIG_SPEAR_EMI			1
+#else
+#define CONFIG_SPEARSMI				1
+#endif
+
+#if defined(CONFIG_SPEARSMI)
+
+#define CONFIG_SYS_MAX_FLASH_BANKS		2
+#define CONFIG_SYS_FLASH_BASE			(0xF8000000)
+#define CONFIG_SYS_CS1_FLASH_BASE		(0xF9000000)
+#define CONFIG_SYS_FLASH_BANK_SIZE		(0x01000000)
+#define CONFIG_SYS_FLASH_ADDR_BASE		{CONFIG_SYS_FLASH_BASE, \
+						CONFIG_SYS_CS1_FLASH_BASE}
+#define CONFIG_SYS_MAX_FLASH_SECT		128
+
+#define CONFIG_SYS_FLASH_EMPTY_INFO		1
+#define CONFIG_SYS_FLASH_ERASE_TOUT		(3 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT		(3 * CONFIG_SYS_HZ)
+
+#endif
+
+/*
+ * Serial Configuration (PL011)
+ * CONFIG_PL01x_PORTS is defined in specific files
+ */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK			(48 * 1000 * 1000)
+#define CONFIG_CONS_INDEX			0
+#define CONFIG_BAUDRATE				115200
+#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, \
+						57600, 115200 }
+
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+/* NAND FLASH Configuration */
+#define CONFIG_NAND_SPEAR			1
+#define CONFIG_SYS_MAX_NAND_DEVICE		1
+#define CONFIG_MTD_NAND_VERIFY_WRITE		1
+
+/*
+ * Command support defines
+ */
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+/*
+ * Default Environment Varible definitions
+ */
+#if defined(CONFIG_SPEAR_USBTTY)
+#define CONFIG_BOOTDELAY			-1
+#else
+#define CONFIG_BOOTDELAY			1
+#endif
+
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * U-Boot Environment placing definitions.
+ */
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+#ifdef CONFIG_SPEARSMI
+/*
+ * Environment is in serial NOR flash
+ */
+#define CONFIG_SYS_MONITOR_LEN			0x00040000
+#define CONFIG_ENV_SECT_SIZE			0x00010000
+#define CONFIG_FSMTDBLK				"/dev/mtdblock8 "
+
+#define CONFIG_BOOTCOMMAND			"bootm 0xf8050000"
+
+#elif defined(CONFIG_SPEAR_EMI)
+/*
+ * Environment is in parallel NOR flash
+ */
+#define CONFIG_SYS_MONITOR_LEN			0x00060000
+#define CONFIG_ENV_SECT_SIZE			0x00020000
+#define CONFIG_FSMTDBLK				"/dev/mtdblock3 "
+
+#define CONFIG_BOOTCOMMAND			"cp.b 0x50080000 0x1600000 " \
+						"0x4C0000; bootm 0x1600000"
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_FLASH_BASE
+#define CONFIG_ENV_ADDR				(CONFIG_SYS_MONITOR_BASE + \
+						CONFIG_SYS_MONITOR_LEN)
+#elif defined(CONFIG_ENV_IS_IN_NAND)
+/*
+ * Environment is in NAND
+ */
+
+#define CONFIG_ENV_OFFSET			0x60000
+#define CONFIG_ENV_RANGE			0x10000
+#define CONFIG_FSMTDBLK				"/dev/mtdblock12 "
+
+#define CONFIG_BOOTCOMMAND			"nand read.jffs2 0x1600000 " \
+						"0x80000 0x4C0000; " \
+						"bootm 0x1600000"
+#endif
+
+#define CONFIG_BOOTARGS_NFS			"root=/dev/nfs ip=dhcp " \
+						"console=ttyS0 init=/bin/sh"
+#define CONFIG_BOOTARGS				"console=ttyS0 mem=128M "  \
+						"root="CONFIG_FSMTDBLK \
+						"rootfstype=jffs2"
+
+#define CONFIG_ENV_SIZE				0x02000
+
+/* Miscellaneous configurable options */
+#define CONFIG_BOOT_PARAMS_ADDR			0x00000100
+#define CONFIG_CMDLINE_TAG			1
+#define CONFIG_SETUP_MEMORY_TAGS		1
+#define CONFIG_MISC_INIT_R			1
+#define CONFIG_ZERO_BOOTDELAY_CHECK		1
+#define CONFIG_AUTOBOOT_KEYED			1
+#define CONFIG_AUTOBOOT_STOP_STR		" "
+#define CONFIG_AUTOBOOT_PROMPT			\
+		"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
+
+#define CONFIG_SYS_MEMTEST_START		0x00800000
+#define CONFIG_SYS_MEMTEST_END			0x04000000
+#define CONFIG_SYS_MALLOC_LEN			(1024*1024)
+#define CONFIG_SYS_GBL_DATA_SIZE		128
+#define CONFIG_IDENT_STRING			"-SPEAr"
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT			"u-boot> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_CBSIZE			256
+#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
+						sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS			16
+#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LOAD_ADDR			0x00800000
+#define CONFIG_SYS_CONSOLE_INFO_QUIET		1
+#define CONFIG_SYS_64BIT_VSPRINTF		1
+
+#define CONFIG_EXTRA_ENV_SETTINGS		CONFIG_EXTRA_ENV_USBTTY
+
+/* Stack sizes */
+#define CONFIG_STACKSIZE			(128*1024)
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ			(4*1024)
+#define CONFIG_STACKSIZE_FIQ			(4*1024)
+#endif
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS			1
+#define PHYS_SDRAM_1				0x00000000
+#define PHYS_SDRAM_1_MAXSIZE			0x40000000
+
+#endif
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_SPEAR600				1
+
+#include <configs/spear-common.h>
+
+/* Serial Configuration (PL011) */
+#define CONFIG_SYS_SERIAL0			0xD0000000
+#define CONFIG_SYS_SERIAL1			0xD0080000
+#define CONFIG_PL01x_PORTS			{ (void *)CONFIG_SYS_SERIAL0, \
+						(void *)CONFIG_SYS_SERIAL1 }
+
+#define CONFIG_SYS_NAND_BASE			(0xD2000000)
+
+#endif  /* __CONFIG_H */
...	...	@@ -574,6 +574,7 @@
574	574	sheevaplug \
575	575	smdk2400 \
576	576	smdk2410 \
	577	+ spear600 \
577	578	trab \
578	579	VCMA9 \
579	580	versatile \
...	...	@@ -3036,6 +3036,9 @@
3036	3036	smdk2410_config : unconfig
3037	3037	@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
3038	3038
	3039	+spear600_config : unconfig
	3040	+ @$(MKCONFIG) -n $@ -t $(@:_config=) spear6xx arm arm926ejs $(@:_config=) spear spear
	3041	+
3039	3042	SX1_stdout_serial_config \
3040	3043	SX1_config: unconfig
3041	3044	@mkdir -p $(obj)include
	1	+#
	2	+# (C) Copyright 2006
	3	+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	+#
	5	+# See file CREDITS for list of people who contributed to this
	6	+# project.
	7	+#
	8	+# This program is free software; you can redistribute it and/or
	9	+# modify it under the terms of the GNU General Public License as
	10	+# published by the Free Software Foundation; either version 2 of
	11	+# the License, or (at your option) any later version.
	12	+#
	13	+# This program is distributed in the hope that it will be useful,
	14	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+# GNU General Public License for more details.
	17	+#
	18	+# You should have received a copy of the GNU General Public License
	19	+# along with this program; if not, write to the Free Software
	20	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+# MA 02111-1307 USA
	22	+#
	23	+
	24	+include $(TOPDIR)/config.mk
	25	+
	26	+ifneq ($(OBJTREE),$(SRCTREE))
	27	+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
	28	+endif
	29	+
	30	+LIB = $(obj)lib$(VENDOR).a
	31	+
	32	+COBJS := spr_misc.o
	33	+SOBJS := spr_lowlevel_init.o
	34	+
	35	+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
	36	+OBJS := $(addprefix $(obj),$(COBJS))
	37	+SOBJS := $(addprefix $(obj),$(SOBJS))
	38	+
	39	+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
	40	+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
	41	+
	42	+clean:
	43	+ rm -f $(SOBJS) $(OBJS)
	44	+
	45	+distclean: clean
	46	+ rm -f $(LIB) core *.bak $(obj).depend
	47	+
	48	+#########################################################################
	49	+# This is for $(obj).depend target
	50	+include $(SRCTREE)/rules.mk
	51	+
	52	+sinclude $(obj).depend
	53	+
	54	+#########################################################################
	1	+/*
	2	+ * (C) Copyright 2006
	3	+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
	4	+ *
	5	+ * See file CREDITS for list of people who contributed to this
	6	+ * project.
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or
	9	+ * modify it under the terms of the GNU General Public License as
	10	+ * published by the Free Software Foundation; either version 2 of
	11	+ * the License, or (at your option) any later version.
	12	+ *
	13	+ * This program is distributed in the hope that it will be useful,
	14	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+ * GNU General Public License for more details.
	17	+ *
	18	+ * You should have received a copy of the GNU General Public License
	19	+ * along with this program; if not, write to the Free Software
	20	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+ * MA 02111-1307 USA
	22	+ */
	23	+
	24	+#include <config.h>
	25	+
	26	+/*
	27	+ * platform specific initializations are already done in Xloader
	28	+ * Initializations already done include
	29	+ * DDR, PLLs, IP's clock enable and reset release etc
	30	+ */
	31	+.globl lowlevel_init
	32	+lowlevel_init:
	33	+ /* By default, U-Boot switches CPU to low-vector */
	34	+ /* Revert this as we work in high vector even in U-Boot */
	35	+ mrc p15, 0, r0, c1, c0, 0
	36	+ orr r0, r0, #0x00002000
	37	+ mcr p15, 0, r0, c1, c0, 0
	38	+ mov pc, lr
	39	+
	40	+/* void setfreq(unsigned int device, unsigned int frequency) */
	41	+.global setfreq
	42	+setfreq:
	43	+ stmfd sp!,{r14}
	44	+ stmfd sp!,{r0-r12}
	45	+
	46	+ mov r8,sp
	47	+ ldr sp,SRAM_STACK_V
	48	+
	49	+ /* Saving the function arguements for later use */
	50	+ mov r4,r0
	51	+ mov r5,r1
	52	+
	53	+ /* Putting DDR into self refresh */
	54	+ ldr r0,DDR_07_V
	55	+ ldr r1,[r0]
	56	+ ldr r2,DDR_ACTIVE_V
	57	+ bic r1, r1, r2
	58	+ str r1,[r0]
	59	+ ldr r0,DDR_57_V
	60	+ ldr r1,[r0]
	61	+ ldr r2,CYCLES_MASK_V
	62	+ bic r1, r1, r2
	63	+ ldr r2,REFRESH_CYCLES_V
	64	+ orr r1, r1, r2, lsl #16
	65	+ str r1,[r0]
	66	+ ldr r0,DDR_07_V
	67	+ ldr r1,[r0]
	68	+ ldr r2,SREFRESH_MASK_V
	69	+ orr r1, r1, r2
	70	+ str r1,[r0]
	71	+
	72	+ /* flush pipeline */
	73	+ b flush
	74	+ .align 5
	75	+flush:
	76	+ /* Delay to ensure self refresh mode */
	77	+ ldr r0,SREFRESH_DELAY_V
	78	+delay:
	79	+ sub r0,r0,#1
	80	+ cmp r0,#0
	81	+ bne delay
	82	+
	83	+ /* Putting system in slow mode */
	84	+ ldr r0,SCCTRL_V
	85	+ mov r1,#2
	86	+ str r1,[r0]
	87	+
	88	+ /* Changing PLL(1/2) frequency */
	89	+ mov r0,r4
	90	+ mov r1,r5
	91	+
	92	+ cmp r4,#0
	93	+ beq pll1_freq
	94	+
	95	+ /* Change PLL2 (DDR frequency) */
	96	+ ldr r6,PLL2_FREQ_V
	97	+ ldr r7,PLL2_CNTL_V
	98	+ b pll2_freq
	99	+
	100	+pll1_freq:
	101	+ /* Change PLL1 (CPU frequency) */
	102	+ ldr r6,PLL1_FREQ_V
	103	+ ldr r7,PLL1_CNTL_V
	104	+
	105	+pll2_freq:
	106	+ mov r0,r6
	107	+ ldr r1,[r0]
	108	+ ldr r2,PLLFREQ_MASK_V
	109	+ bic r1,r1,r2
	110	+ mov r2,r5,lsr#1
	111	+ orr r1,r1,r2,lsl#24
	112	+ str r1,[r0]
	113	+
	114	+ mov r0,r7
	115	+ ldr r1,P1C0A_V
	116	+ str r1,[r0]
	117	+ ldr r1,P1C0E_V
	118	+ str r1,[r0]
	119	+ ldr r1,P1C06_V
	120	+ str r1,[r0]
	121	+ ldr r1,P1C0E_V
	122	+ str r1,[r0]
	123	+
	124	+lock:
	125	+ ldr r1,[r0]
	126	+ and r1,r1,#1
	127	+ cmp r1,#0
	128	+ beq lock
	129	+
	130	+ /* Putting system back to normal mode */
	131	+ ldr r0,SCCTRL_V
	132	+ mov r1,#4
	133	+ str r1,[r0]
	134	+
	135	+ /* Putting DDR back to normal */
	136	+ ldr r0,DDR_07_V
	137	+ ldr r1,[R0]
	138	+ ldr r2,SREFRESH_MASK_V
	139	+ bic r1, r1, r2
	140	+ str r1,[r0]
	141	+ ldr r2,DDR_ACTIVE_V
	142	+ orr r1, r1, r2
	143	+ str r1,[r0]
	144	+
	145	+ /* Delay to ensure self refresh mode */
	146	+ ldr r0,SREFRESH_DELAY_V
	147	+1:
	148	+ sub r0,r0,#1
	149	+ cmp r0,#0
	150	+ bne 1b
	151	+
	152	+ mov sp,r8
	153	+ /* Resuming back to code */
	154	+ ldmia sp!,{r0-r12}
	155	+ ldmia sp!,{pc}
	156	+
	157	+SCCTRL_V:
	158	+ .word 0xfca00000
	159	+PLL1_FREQ_V:
	160	+ .word 0xfca8000C
	161	+PLL1_CNTL_V:
	162	+ .word 0xfca80008
	163	+PLL2_FREQ_V:
	164	+ .word 0xfca80018
	165	+PLL2_CNTL_V:
	166	+ .word 0xfca80014
	167	+PLLFREQ_MASK_V:
	168	+ .word 0xff000000
	169	+P1C0A_V:
	170	+ .word 0x1C0A
	171	+P1C0E_V:
	172	+ .word 0x1C0E
	173	+P1C06_V:
	174	+ .word 0x1C06
	175	+
	176	+SREFRESH_DELAY_V:
	177	+ .word 0x9999
	178	+SRAM_STACK_V:
	179	+ .word 0xD2800600
	180	+DDR_07_V:
	181	+ .word 0xfc60001c
	182	+DDR_ACTIVE_V:
	183	+ .word 0x01000000
	184	+DDR_57_V:
	185	+ .word 0xfc6000e4
	186	+CYCLES_MASK_V:
	187	+ .word 0xffff0000
	188	+REFRESH_CYCLES_V:
	189	+ .word 0xf0f0
	190	+SREFRESH_MASK_V:
	191	+ .word 0x00010000
	192	+
	193	+.global setfreq_sz
	194	+setfreq_sz:
	195	+ .word setfreq_sz - setfreq
	1	+/*
	2	+ * (C) Copyright 2009
	3	+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
	4	+ *
	5	+ * See file CREDITS for list of people who contributed to this
	6	+ * project.
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or
	9	+ * modify it under the terms of the GNU General Public License as
	10	+ * published by the Free Software Foundation; either version 2 of
	11	+ * the License, or (at your option) any later version.
	12	+ *
	13	+ * This program is distributed in the hope that it will be useful,
	14	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+ * GNU General Public License for more details.
	17	+ *
	18	+ * You should have received a copy of the GNU General Public License
	19	+ * along with this program; if not, write to the Free Software
	20	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+ * MA 02111-1307 USA
	22	+ */
	23	+
	24	+#include <common.h>
	25	+#include <command.h>
	26	+#include <i2c.h>
	27	+#include <net.h>
	28	+#include <asm/io.h>
	29	+#include <asm/arch/hardware.h>
	30	+#include <asm/arch/spr_xloader_table.h>
	31	+#include <asm/arch/spr_defs.h>
	32	+
	33	+#define CPU 0
	34	+#define DDR 1
	35	+#define SRAM_REL 0xD2801000
	36	+
	37	+DECLARE_GLOBAL_DATA_PTR;
	38	+static struct chip_data chip_data;
	39	+
	40	+int dram_init(void)
	41	+{
	42	+ struct xloader_table *xloader_tb =
	43	+ (struct xloader_table *)XLOADER_TABLE_ADDRESS;
	44	+ struct xloader_table_1_1 *table_1_1;
	45	+ struct xloader_table_1_2 *table_1_2;
	46	+ struct chip_data *chip = &chip_data;
	47	+
	48	+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	49	+ gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1,
	50	+ PHYS_SDRAM_1_MAXSIZE);
	51	+
	52	+ if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) {
	53	+ table_1_1 = &xloader_tb->table.table_1_1;
	54	+ chip->dramfreq = table_1_1->ddrfreq;
	55	+ chip->dramtype = table_1_1->ddrtype;
	56	+
	57	+ } else if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
	58	+ table_1_2 = &xloader_tb->table.table_1_2;
	59	+ chip->dramfreq = table_1_2->ddrfreq;
	60	+ chip->dramtype = table_1_2->ddrtype;
	61	+ } else {
	62	+ chip->dramfreq = -1;
	63	+ }
	64	+
	65	+ return 0;
	66	+}
	67	+
	68	+int misc_init_r(void)
	69	+{
	70	+ setenv("verify", "n");
	71	+
	72	+#if defined(CONFIG_SPEAR_USBTTY)
	73	+ setenv("stdin", "usbtty");
	74	+ setenv("stdout", "usbtty");
	75	+ setenv("stderr", "usbtty");
	76	+#endif
	77	+ return 0;
	78	+}
	79	+
	80	+int spear_board_init(ulong mach_type)
	81	+{
	82	+ struct xloader_table *xloader_tb =
	83	+ (struct xloader_table *)XLOADER_TABLE_ADDRESS;
	84	+ struct xloader_table_1_2 *table_1_2;
	85	+ struct chip_data *chip = &chip_data;
	86	+
	87	+ gd->bd->bi_arch_number = mach_type;
	88	+
	89	+ /* adress of boot parameters */
	90	+ gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
	91	+
	92	+ /* CPU is initialized to work at 333MHz in Xloader */
	93	+ chip->cpufreq = 333;
	94	+
	95	+ if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
	96	+ table_1_2 = &xloader_tb->table.table_1_2;
	97	+ memcpy(chip->version, table_1_2->version,
	98	+ sizeof(chip->version));
	99	+ }
	100	+
	101	+ return 0;
	102	+}
	103	+
	104	+int do_chip_config(cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	105	+{
	106	+ void (*sram_setfreq) (unsigned int, unsigned int);
	107	+ struct chip_data *chip = &chip_data;
	108	+ unsigned char mac[6];
	109	+ unsigned int frequency;
	110	+
	111	+ if ((argc > 3) \|\| (argc < 2)) {
	112	+ cmd_usage(cmdtp);
	113	+ return 1;
	114	+ }
	115	+
	116	+ if ((!strcmp(argv[1], "cpufreq")) \|\| (!strcmp(argv[1], "ddrfreq"))) {
	117	+
	118	+ frequency = simple_strtoul(argv[2], NULL, 0);
	119	+
	120	+ if (frequency > 333) {
	121	+ printf("Frequency is limited to 333MHz\n");
	122	+ return 1;
	123	+ }
	124	+
	125	+ sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
	126	+
	127	+ if (!strcmp(argv[1], "cpufreq")) {
	128	+ sram_setfreq(CPU, frequency);
	129	+ printf("CPU frequency changed to %u\n", frequency);
	130	+
	131	+ chip->cpufreq = frequency;
	132	+ } else {
	133	+ sram_setfreq(DDR, frequency);
	134	+ printf("DDR frequency changed to %u\n", frequency);
	135	+
	136	+ chip->dramfreq = frequency;
	137	+ }
	138	+
	139	+ return 0;
	140	+ } else if (!strcmp(argv[1], "print")) {
	141	+
	142	+ if (chip->cpufreq == -1)
	143	+ printf("CPU Freq = Not Known\n");
	144	+ else
	145	+ printf("CPU Freq = %d MHz\n", chip->cpufreq);
	146	+
	147	+ if (chip->dramfreq == -1)
	148	+ printf("DDR Freq = Not Known\n");
	149	+ else
	150	+ printf("DDR Freq = %d MHz\n", chip->dramfreq);
	151	+
	152	+ if (chip->dramtype == DDRMOBILE)
	153	+ printf("DDR Type = MOBILE\n");
	154	+ else if (chip->dramtype == DDR2)
	155	+ printf("DDR Type = DDR2\n");
	156	+ else
	157	+ printf("DDR Type = Not Known\n");
	158	+
	159	+ printf("Xloader Rev = %s\n", chip->version);
	160	+
	161	+ return 0;
	162	+ }
	163	+
	164	+ cmd_usage(cmdtp);
	165	+ return 1;
	166	+}
	167	+
	168	+U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
	169	+ "configure chip",
	170	+ "chip_config cpufreq/ddrfreq frequency\n"
	171	+ "chip_config print");
	1	+#
	2	+# (C) Copyright 2000-2004
	3	+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	+#
	5	+# See file CREDITS for list of people who contributed to this
	6	+# project.
	7	+#
	8	+# This program is free software; you can redistribute it and/or
	9	+# modify it under the terms of the GNU General Public License as
	10	+# published by the Free Software Foundation; either version 2 of
	11	+# the License, or (at your option) any later version.
	12	+#
	13	+# This program is distributed in the hope that it will be useful,
	14	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+# GNU General Public License for more details.
	17	+#
	18	+# You should have received a copy of the GNU General Public License
	19	+# along with this program; if not, write to the Free Software
	20	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+# MA 02111-1307 USA
	22	+#
	23	+
	24	+include $(TOPDIR)/config.mk
	25	+
	26	+LIB = $(obj)lib$(BOARD).a
	27	+
	28	+COBJS := spear600.o
	29	+SOBJS :=
	30	+
	31	+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
	32	+OBJS := $(addprefix $(obj),$(COBJS))
	33	+SOBJS := $(addprefix $(obj),$(SOBJS))
	34	+
	35	+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
	36	+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
	37	+
	38	+clean:
	39	+ rm -f $(SOBJS) $(OBJS)
	40	+
	41	+distclean: clean
	42	+ rm -f $(LIB) core *.bak $(obj).depend
	43	+
	44	+#########################################################################
	45	+
	46	+# defines $(obj).depend target
	47	+include $(SRCTREE)/rules.mk
	48	+
	49	+sinclude $(obj).depend
	50	+
	51	+#########################################################################
	1	+#
	2	+# (C) Copyright 2009
	3	+# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com>
	4	+#
	5	+# See file CREDITS for list of people who contributed to this
	6	+# project.
	7	+#
	8	+# This program is free software; you can redistribute it and/or
	9	+# modify it under the terms of the GNU General Public License as
	10	+# published by the Free Software Foundation; either version 2 of
	11	+# the License, or (at your option) any later version.
	12	+#
	13	+# This program is distributed in the hope that it will be useful,
	14	+# but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+# GNU General Public License for more details.
	17	+#
	18	+# You should have received a copy of the GNU General Public License
	19	+# along with this program; if not, write to the Free Software
	20	+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+# MA 02111-1307 USA
	22	+#
	23	+
	24	+#########################################################################
	25	+
	26	+TEXT_BASE = 0x00700000
	27	+
	28	+ALL += $(obj)u-boot.img
	29	+
	30	+# Environment variables in NAND
	31	+ifeq ($(ENV),NAND)
	32	+PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
	33	+else
	34	+PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
	35	+endif
	36	+
	37	+ifeq ($(CONSOLE),USB)
	38	+PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY
	39	+endif
	1	+/*
	2	+ * (C) Copyright 2009
	3	+ * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
	4	+ *
	5	+ * See file CREDITS for list of people who contributed to this
	6	+ * project.
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or
	9	+ * modify it under the terms of the GNU General Public License as
	10	+ * published by the Free Software Foundation; either version 2 of
	11	+ * the License, or (at your option) any later version.
	12	+ *
	13	+ * This program is distributed in the hope that it will be useful,
	14	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+ * GNU General Public License for more details.
	17	+ *
	18	+ * You should have received a copy of the GNU General Public License
	19	+ * along with this program; if not, write to the Free Software
	20	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	+ * MA 02111-1307 USA
	22	+ */
	23	+
	24	+#ifndef _SPEAR_COMMON_H
	25	+#define _SPEAR_COMMON_H
	26	+/*
	27	+ * Common configurations used for both spear3xx as well as spear6xx
	28	+ */
	29	+
	30	+/* USBD driver configuration */
	31	+#define CONFIG_SPEARUDC
	32	+#define CONFIG_USB_DEVICE
	33	+#define CONFIG_USB_TTY
	34	+
	35	+#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
	36	+#define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
	37	+
	38	+#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
	39	+
	40	+/* I2C driver configuration */
	41	+#define CONFIG_HARD_I2C
	42	+#define CONFIG_SPEAR_I2C
	43	+#define CONFIG_SYS_I2C_SPEED 400000
	44	+#define CONFIG_SYS_I2C_SLAVE 0x02
	45	+
	46	+#define CONFIG_I2C_CHIPADDRESS 0x50
	47	+
	48	+/* Timer, HZ specific defines */
	49	+#define CONFIG_SYS_HZ (1000)
	50	+#define CONFIG_SYS_HZ_CLOCK (8300000)
	51	+
	52	+/* Flash configuration */
	53	+#if defined(CONFIG_FLASH_PNOR)
	54	+#define CONFIG_SPEAR_EMI 1
	55	+#else
	56	+#define CONFIG_SPEARSMI 1
	57	+#endif
	58	+
	59	+#if defined(CONFIG_SPEARSMI)
	60	+
	61	+#define CONFIG_SYS_MAX_FLASH_BANKS 2
	62	+#define CONFIG_SYS_FLASH_BASE (0xF8000000)
	63	+#define CONFIG_SYS_CS1_FLASH_BASE (0xF9000000)
	64	+#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000)
	65	+#define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
	66	+ CONFIG_SYS_CS1_FLASH_BASE}
	67	+#define CONFIG_SYS_MAX_FLASH_SECT 128
	68	+
	69	+#define CONFIG_SYS_FLASH_EMPTY_INFO 1
	70	+#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
	71	+#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
	72	+
	73	+#endif
	74	+
	75	+/*
	76	+ * Serial Configuration (PL011)
	77	+ * CONFIG_PL01x_PORTS is defined in specific files
	78	+ */
	79	+#define CONFIG_PL011_SERIAL
	80	+#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
	81	+#define CONFIG_CONS_INDEX 0
	82	+#define CONFIG_BAUDRATE 115200
	83	+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
	84	+ 57600, 115200 }
	85	+
	86	+#define CONFIG_SYS_LOADS_BAUD_CHANGE
	87	+
	88	+/* NAND FLASH Configuration */
	89	+#define CONFIG_NAND_SPEAR 1
	90	+#define CONFIG_SYS_MAX_NAND_DEVICE 1
	91	+#define CONFIG_MTD_NAND_VERIFY_WRITE 1
	92	+
	93	+/*
	94	+ * Command support defines
	95	+ */
	96	+#define CONFIG_CMD_I2C
	97	+#define CONFIG_CMD_NAND
	98	+#define CONFIG_CMD_ENV
	99	+#define CONFIG_CMD_MEMORY
	100	+#define CONFIG_CMD_RUN
	101	+#define CONFIG_CMD_SAVES
	102	+
	103	+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
	104	+#include <config_cmd_default.h>
	105	+#undef CONFIG_CMD_NET
	106	+#undef CONFIG_CMD_NFS
	107	+
	108	+/*
	109	+ * Default Environment Varible definitions
	110	+ */
	111	+#if defined(CONFIG_SPEAR_USBTTY)
	112	+#define CONFIG_BOOTDELAY -1
	113	+#else
	114	+#define CONFIG_BOOTDELAY 1
	115	+#endif
	116	+
	117	+#define CONFIG_ENV_OVERWRITE
	118	+
	119	+/*
	120	+ * U-Boot Environment placing definitions.
	121	+ */
	122	+#if defined(CONFIG_ENV_IS_IN_FLASH)
	123	+#ifdef CONFIG_SPEARSMI
	124	+/*
	125	+ * Environment is in serial NOR flash
	126	+ */
	127	+#define CONFIG_SYS_MONITOR_LEN 0x00040000
	128	+#define CONFIG_ENV_SECT_SIZE 0x00010000
	129	+#define CONFIG_FSMTDBLK "/dev/mtdblock8 "
	130	+
	131	+#define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
	132	+
	133	+#elif defined(CONFIG_SPEAR_EMI)
	134	+/*
	135	+ * Environment is in parallel NOR flash
	136	+ */
	137	+#define CONFIG_SYS_MONITOR_LEN 0x00060000
	138	+#define CONFIG_ENV_SECT_SIZE 0x00020000
	139	+#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
	140	+
	141	+#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
	142	+ "0x4C0000; bootm 0x1600000"
	143	+#endif
	144	+
	145	+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	146	+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
	147	+ CONFIG_SYS_MONITOR_LEN)
	148	+#elif defined(CONFIG_ENV_IS_IN_NAND)
	149	+/*
	150	+ * Environment is in NAND
	151	+ */
	152	+
	153	+#define CONFIG_ENV_OFFSET 0x60000
	154	+#define CONFIG_ENV_RANGE 0x10000
	155	+#define CONFIG_FSMTDBLK "/dev/mtdblock12 "
	156	+
	157	+#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
	158	+ "0x80000 0x4C0000; " \
	159	+ "bootm 0x1600000"
	160	+#endif
	161	+
	162	+#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \
	163	+ "console=ttyS0 init=/bin/sh"
	164	+#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \
	165	+ "root="CONFIG_FSMTDBLK \
	166	+ "rootfstype=jffs2"
	167	+
	168	+#define CONFIG_ENV_SIZE 0x02000
	169	+
	170	+/* Miscellaneous configurable options */
	171	+#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
	172	+#define CONFIG_CMDLINE_TAG 1
	173	+#define CONFIG_SETUP_MEMORY_TAGS 1
	174	+#define CONFIG_MISC_INIT_R 1
	175	+#define CONFIG_ZERO_BOOTDELAY_CHECK 1
	176	+#define CONFIG_AUTOBOOT_KEYED 1
	177	+#define CONFIG_AUTOBOOT_STOP_STR " "
	178	+#define CONFIG_AUTOBOOT_PROMPT \
	179	+ "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
	180	+
	181	+#define CONFIG_SYS_MEMTEST_START 0x00800000
	182	+#define CONFIG_SYS_MEMTEST_END 0x04000000
	183	+#define CONFIG_SYS_MALLOC_LEN (1024*1024)
	184	+#define CONFIG_SYS_GBL_DATA_SIZE 128
	185	+#define CONFIG_IDENT_STRING "-SPEAr"
	186	+#define CONFIG_SYS_LONGHELP
	187	+#define CONFIG_SYS_PROMPT "u-boot> "
	188	+#define CONFIG_CMDLINE_EDITING
	189	+#define CONFIG_SYS_CBSIZE 256
	190	+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	191	+ sizeof(CONFIG_SYS_PROMPT) + 16)
	192	+#define CONFIG_SYS_MAXARGS 16
	193	+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	194	+#define CONFIG_SYS_LOAD_ADDR 0x00800000
	195	+#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
	196	+#define CONFIG_SYS_64BIT_VSPRINTF 1
	197	+
	198	+#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY
	199	+
	200	+/* Stack sizes */
	201	+#define CONFIG_STACKSIZE (128*1024)
	202	+
	203	+#ifdef CONFIG_USE_IRQ
	204	+#define CONFIG_STACKSIZE_IRQ (4*1024)
	205	+#define CONFIG_STACKSIZE_FIQ (4*1024)
	206	+#endif
	207	+
	208	+/* Physical Memory Map */
	209	+#define CONFIG_NR_DRAM_BANKS 1
	210	+#define PHYS_SDRAM_1 0x00000000
	211	+#define PHYS_SDRAM_1_MAXSIZE 0x40000000
	212	+
	213	+#endif