Commit 568336ecc7083afd0b8b16a6b8b4a796491c142f

Authored by chenhui zhao
Committed by Kumar Gala
1 parent a6d0bfa86f

powerpc/mpc85xxcds: Fix PCI speed

The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz.

Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Showing 4 changed files with 12 additions and 12 deletions Side-by-side Diff

board/freescale/common/cadmus.c
1 1 /*
2   - * Copyright 2004 Freescale Semiconductor.
  2 + * Copyright 2004, 2011 Freescale Semiconductor.
3 3 *
4 4 * See file CREDITS for list of people who contributed to this
5 5 * project.
6 6  
7 7  
... ... @@ -61,12 +61,12 @@
61 61 uint pci1_speed = (cadmus->cm_pci >> 2) & 0x3; /* PSPEED in [4:5] */
62 62  
63 63 if (pci1_speed == 0) {
64   - return 33000000;
  64 + return 33333333;
65 65 } else if (pci1_speed == 1) {
66   - return 66000000;
  66 + return 66666666;
67 67 } else {
68 68 /* Really, unknown. Be safe? */
69   - return 33000000;
  69 + return 33333333;
70 70 }
71 71 }
72 72  
board/freescale/mpc8541cds/mpc8541cds.c
1 1 /*
2   - * Copyright 2004 Freescale Semiconductor.
  2 + * Copyright 2004, 2011 Freescale Semiconductor.
3 3 *
4 4 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
5 5 *
... ... @@ -200,6 +200,7 @@
200 200 int checkboard (void)
201 201 {
202 202 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  203 + char buf[32];
203 204  
204 205 /* PCI slot in USER bits CSR[6:7] by convention. */
205 206 uint pci_slot = get_pci_slot ();
... ... @@ -222,8 +223,7 @@
222 223  
223 224 printf("PCI1: %d bit, %s MHz, %s\n",
224 225 (pci1_32) ? 32 : 64,
225   - (pci1_speed == 33000000) ? "33" :
226   - (pci1_speed == 66000000) ? "66" : "unknown",
  226 + strmhz(buf, pci1_speed),
227 227 pci1_clk_sel ? "sync" : "async");
228 228  
229 229 if (pci_dual) {
board/freescale/mpc8548cds/mpc8548cds.c
... ... @@ -214,6 +214,7 @@
214 214 u32 devdisr, pordevsr, io_sel;
215 215 u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
216 216 int first_free_busno = 0;
  217 + char buf[32];
217 218  
218 219 devdisr = in_be32(&gur->devdisr);
219 220 pordevsr = in_be32(&gur->pordevsr);
... ... @@ -238,8 +239,7 @@
238 239 pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs);
239 240 printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
240 241 (pci_32) ? 32 : 64,
241   - (pci_speed == 33333000) ? "33" :
242   - (pci_speed == 66666000) ? "66" : "unknown",
  242 + strmhz(buf, pci_speed),
243 243 pci_clk_sel ? "sync" : "async",
244 244 pci_agent ? "agent" : "host",
245 245 pci_arb ? "arbiter" : "external-arbiter",
board/freescale/mpc8555cds/mpc8555cds.c
1 1 /*
2   - * Copyright 2004 Freescale Semiconductor.
  2 + * Copyright 2004, 2011 Freescale Semiconductor.
3 3 *
4 4 * See file CREDITS for list of people who contributed to this
5 5 * project.
... ... @@ -198,6 +198,7 @@
198 198 int checkboard (void)
199 199 {
200 200 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  201 + char buf[32];
201 202  
202 203 /* PCI slot in USER bits CSR[6:7] by convention. */
203 204 uint pci_slot = get_pci_slot ();
... ... @@ -220,8 +221,7 @@
220 221  
221 222 printf("PCI1: %d bit, %s MHz, %s\n",
222 223 (pci1_32) ? 32 : 64,
223   - (pci1_speed == 33000000) ? "33" :
224   - (pci1_speed == 66000000) ? "66" : "unknown",
  224 + strmhz(buf, pci1_speed),
225 225 pci1_clk_sel ? "sync" : "async");
226 226  
227 227 if (pci_dual) {