Commit 5710a48afc0fbc5a90727404f1da1df52af99c46
Committed by
Stefano Babic
1 parent
0468be6e7c
Exists in
smarc_8mq_lf_v2020.04
and in
12 other branches
imx: add i.MX8 cpu type
Add i.MX8 cpu type and is_imx8/is_imx8qxp help macros. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Showing 2 changed files with 8 additions and 0 deletions Side-by-side Diff
arch/arm/include/asm/arch-imx/cpu.h
... | ... | @@ -25,12 +25,14 @@ |
25 | 25 | #define MXC_CPU_MX7S 0x71 /* dummy ID */ |
26 | 26 | #define MXC_CPU_MX7D 0x72 |
27 | 27 | #define MXC_CPU_MX8MQ 0x82 |
28 | +#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */ | |
28 | 29 | #define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */ |
29 | 30 | #define MXC_CPU_VF610 0xF6 /* dummy ID */ |
30 | 31 | |
31 | 32 | #define MXC_SOC_MX6 0x60 |
32 | 33 | #define MXC_SOC_MX7 0x70 |
33 | 34 | #define MXC_SOC_MX8M 0x80 |
35 | +#define MXC_SOC_IMX8 0x90 /* dummy */ | |
34 | 36 | #define MXC_SOC_MX7ULP 0xE0 /* dummy */ |
35 | 37 | |
36 | 38 | #define CHIP_REV_1_0 0x10 |
... | ... | @@ -40,6 +42,9 @@ |
40 | 42 | #define CHIP_REV_2_0 0x20 |
41 | 43 | #define CHIP_REV_2_5 0x25 |
42 | 44 | #define CHIP_REV_3_0 0x30 |
45 | + | |
46 | +#define CHIP_REV_A 0x0 | |
47 | +#define CHIP_REV_B 0x1 | |
43 | 48 | |
44 | 49 | #define BOARD_REV_1_0 0x0 |
45 | 50 | #define BOARD_REV_2_0 0x1 |
arch/arm/include/asm/mach-imx/sys_proto.h
... | ... | @@ -27,6 +27,7 @@ |
27 | 27 | #define is_mx6() (is_soc_type(MXC_SOC_MX6)) |
28 | 28 | #define is_mx7() (is_soc_type(MXC_SOC_MX7)) |
29 | 29 | #define is_mx8m() (is_soc_type(MXC_SOC_MX8M)) |
30 | +#define is_imx8() (is_soc_type(MXC_SOC_IMX8)) | |
30 | 31 | |
31 | 32 | #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) |
32 | 33 | #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) |
... | ... | @@ -40,6 +41,8 @@ |
40 | 41 | #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL)) |
41 | 42 | |
42 | 43 | #define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP)) |
44 | + | |
45 | +#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) | |
43 | 46 | |
44 | 47 | #ifdef CONFIG_MX6 |
45 | 48 | #define IMX6_SRC_GPR10_BMODE BIT(28) |