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board/icu862/Makefile
1 | +# | |
2 | +# (C) Copyright 2001 | |
3 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | +# | |
5 | +# See file CREDITS for list of people who contributed to this | |
6 | +# project. | |
7 | +# | |
8 | +# This program is free software; you can redistribute it and/or | |
9 | +# modify it under the terms of the GNU General Public License as | |
10 | +# published by the Free Software Foundation; either version 2 of | |
11 | +# the License, or (at your option) any later version. | |
12 | +# | |
13 | +# This program is distributed in the hope that it will be useful, | |
14 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | +# GNU General Public License for more details. | |
17 | +# | |
18 | +# You should have received a copy of the GNU General Public License | |
19 | +# along with this program; if not, write to the Free Software | |
20 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | +# MA 02111-1307 USA | |
22 | +# | |
23 | + | |
24 | +include $(TOPDIR)/config.mk | |
25 | + | |
26 | +LIB = lib$(BOARD).a | |
27 | + | |
28 | +OBJS = $(BOARD).o flash.o | |
29 | + | |
30 | +$(LIB): .depend $(OBJS) | |
31 | + $(AR) crv $@ $^ | |
32 | + | |
33 | +######################################################################### | |
34 | + | |
35 | +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) | |
36 | + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ | |
37 | + | |
38 | +sinclude .depend | |
39 | + | |
40 | +######################################################################### |
board/icu862/config.mk
1 | +# | |
2 | +# (C) Copyright 2001 | |
3 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | +# | |
5 | +# See file CREDITS for list of people who contributed to this | |
6 | +# project. | |
7 | +# | |
8 | +# This program is free software; you can redistribute it and/or | |
9 | +# modify it under the terms of the GNU General Public License as | |
10 | +# published by the Free Software Foundation; either version 2 of | |
11 | +# the License, or (at your option) any later version. | |
12 | +# | |
13 | +# This program is distributed in the hope that it will be useful, | |
14 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | +# GNU General Public License for more details. | |
17 | +# | |
18 | +# You should have received a copy of the GNU General Public License | |
19 | +# along with this program; if not, write to the Free Software | |
20 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | +# MA 02111-1307 USA | |
22 | +# | |
23 | + | |
24 | +# | |
25 | +# ICU862 boards | |
26 | +# | |
27 | + | |
28 | +TEXT_BASE = 0x40F00000 | |
29 | +OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data |
board/pm826/Makefile
1 | +# | |
2 | +# (C) Copyright 2001 | |
3 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | +# | |
5 | +# See file CREDITS for list of people who contributed to this | |
6 | +# project. | |
7 | +# | |
8 | +# This program is free software; you can redistribute it and/or | |
9 | +# modify it under the terms of the GNU General Public License as | |
10 | +# published by the Free Software Foundation; either version 2 of | |
11 | +# the License, or (at your option) any later version. | |
12 | +# | |
13 | +# This program is distributed in the hope that it will be useful, | |
14 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | +# GNU General Public License for more details. | |
17 | +# | |
18 | +# You should have received a copy of the GNU General Public License | |
19 | +# along with this program; if not, write to the Free Software | |
20 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | +# MA 02111-1307 USA | |
22 | +# | |
23 | + | |
24 | +include $(TOPDIR)/config.mk | |
25 | + | |
26 | +LIB = lib$(BOARD).a | |
27 | + | |
28 | +OBJS = $(BOARD).o flash.o | |
29 | + | |
30 | +$(LIB): .depend $(OBJS) | |
31 | + $(AR) crv $@ $^ | |
32 | + | |
33 | +######################################################################### | |
34 | + | |
35 | +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) | |
36 | + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ | |
37 | + | |
38 | +sinclude .depend | |
39 | + | |
40 | +######################################################################### |
board/pm826/u-boot.lds
1 | +/* | |
2 | + * (C) Copyright 2001 | |
3 | + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | + * | |
5 | + * See file CREDITS for list of people who contributed to this | |
6 | + * project. | |
7 | + * | |
8 | + * This program is free software; you can redistribute it and/or | |
9 | + * modify it under the terms of the GNU General Public License as | |
10 | + * published by the Free Software Foundation; either version 2 of | |
11 | + * the License, or (at your option) any later version. | |
12 | + * | |
13 | + * This program is distributed in the hope that it will be useful, | |
14 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | + * GNU General Public License for more details. | |
17 | + * | |
18 | + * You should have received a copy of the GNU General Public License | |
19 | + * along with this program; if not, write to the Free Software | |
20 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | + * MA 02111-1307 USA | |
22 | + */ | |
23 | + | |
24 | +OUTPUT_ARCH(powerpc) | |
25 | +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); | |
26 | +/* Do we need any of these for elf? | |
27 | + __DYNAMIC = 0; */ | |
28 | +SECTIONS | |
29 | +{ | |
30 | + /* Read-only sections, merged into text segment: */ | |
31 | + . = + SIZEOF_HEADERS; | |
32 | + .interp : { *(.interp) } | |
33 | + .hash : { *(.hash) } | |
34 | + .dynsym : { *(.dynsym) } | |
35 | + .dynstr : { *(.dynstr) } | |
36 | + .rel.text : { *(.rel.text) } | |
37 | + .rela.text : { *(.rela.text) } | |
38 | + .rel.data : { *(.rel.data) } | |
39 | + .rela.data : { *(.rela.data) } | |
40 | + .rel.rodata : { *(.rel.rodata) } | |
41 | + .rela.rodata : { *(.rela.rodata) } | |
42 | + .rel.got : { *(.rel.got) } | |
43 | + .rela.got : { *(.rela.got) } | |
44 | + .rel.ctors : { *(.rel.ctors) } | |
45 | + .rela.ctors : { *(.rela.ctors) } | |
46 | + .rel.dtors : { *(.rel.dtors) } | |
47 | + .rela.dtors : { *(.rela.dtors) } | |
48 | + .rel.bss : { *(.rel.bss) } | |
49 | + .rela.bss : { *(.rela.bss) } | |
50 | + .rel.plt : { *(.rel.plt) } | |
51 | + .rela.plt : { *(.rela.plt) } | |
52 | + .init : { *(.init) } | |
53 | + .plt : { *(.plt) } | |
54 | + .text : | |
55 | + { | |
56 | + cpu/mpc8260/start.o (.text) | |
57 | + *(.text) | |
58 | + common/environment.o(.text) | |
59 | + *(.fixup) | |
60 | + *(.got1) | |
61 | + . = ALIGN(16); | |
62 | + *(.rodata) | |
63 | + *(.rodata1) | |
64 | + } | |
65 | + .fini : { *(.fini) } =0 | |
66 | + .ctors : { *(.ctors) } | |
67 | + .dtors : { *(.dtors) } | |
68 | + | |
69 | + /* Read-write section, merged into data segment: */ | |
70 | + . = (. + 0x0FFF) & 0xFFFFF000; | |
71 | + _erotext = .; | |
72 | + PROVIDE (erotext = .); | |
73 | + .reloc : | |
74 | + { | |
75 | + *(.got) | |
76 | + _GOT2_TABLE_ = .; | |
77 | + *(.got2) | |
78 | + _FIXUP_TABLE_ = .; | |
79 | + *(.fixup) | |
80 | + } | |
81 | + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; | |
82 | + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; | |
83 | + | |
84 | + .data : | |
85 | + { | |
86 | + *(.data) | |
87 | + *(.data1) | |
88 | + *(.sdata) | |
89 | + *(.sdata2) | |
90 | + *(.dynamic) | |
91 | + CONSTRUCTORS | |
92 | + } | |
93 | + _edata = .; | |
94 | + PROVIDE (edata = .); | |
95 | + | |
96 | + __start___ex_table = .; | |
97 | + __ex_table : { *(__ex_table) } | |
98 | + __stop___ex_table = .; | |
99 | + | |
100 | + . = ALIGN(4096); | |
101 | + __init_begin = .; | |
102 | + .text.init : { *(.text.init) } | |
103 | + .data.init : { *(.data.init) } | |
104 | + . = ALIGN(4096); | |
105 | + __init_end = .; | |
106 | + | |
107 | + __bss_start = .; | |
108 | + .bss : | |
109 | + { | |
110 | + *(.sbss) *(.scommon) | |
111 | + *(.dynbss) | |
112 | + *(.bss) | |
113 | + *(COMMON) | |
114 | + } | |
115 | + _end = . ; | |
116 | + PROVIDE (end = .); | |
117 | +} |
board/westel/amx860/Makefile
1 | +# | |
2 | +# (C) Copyright 2001 | |
3 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | +# | |
5 | +# See file CREDITS for list of people who contributed to this | |
6 | +# project. | |
7 | +# | |
8 | +# This program is free software; you can redistribute it and/or | |
9 | +# modify it under the terms of the GNU General Public License as | |
10 | +# published by the Free Software Foundation; either version 2 of | |
11 | +# the License, or (at your option) any later version. | |
12 | +# | |
13 | +# This program is distributed in the hope that it will be useful, | |
14 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | +# GNU General Public License for more details. | |
17 | +# | |
18 | +# You should have received a copy of the GNU General Public License | |
19 | +# along with this program; if not, write to the Free Software | |
20 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | +# MA 02111-1307 USA | |
22 | +# | |
23 | + | |
24 | +include $(TOPDIR)/config.mk | |
25 | + | |
26 | +LIB = lib$(BOARD).a | |
27 | + | |
28 | +OBJS = $(BOARD).o flash.o | |
29 | + | |
30 | +$(LIB): .depend $(OBJS) | |
31 | + $(AR) crv $@ $^ | |
32 | + | |
33 | +######################################################################### | |
34 | + | |
35 | +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) | |
36 | + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ | |
37 | + | |
38 | +sinclude .depend | |
39 | + | |
40 | +######################################################################### |
board/westel/amx860/config.mk
1 | +# | |
2 | +# (C) Copyright 2001 | |
3 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | +# | |
5 | +# See file CREDITS for list of people who contributed to this | |
6 | +# project. | |
7 | +# | |
8 | +# This program is free software; you can redistribute it and/or | |
9 | +# modify it under the terms of the GNU General Public License as | |
10 | +# published by the Free Software Foundation; either version 2 of | |
11 | +# the License, or (at your option) any later version. | |
12 | +# | |
13 | +# This program is distributed in the hope that it will be useful, | |
14 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | +# GNU General Public License for more details. | |
17 | +# | |
18 | +# You should have received a copy of the GNU General Public License | |
19 | +# along with this program; if not, write to the Free Software | |
20 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | +# MA 02111-1307 USA | |
22 | +# | |
23 | + | |
24 | +#TEXT_BASE = 0xFE000000 | |
25 | +TEXT_BASE = 0x40000000 | |
26 | +OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data |
include/asm-ppc/8xx_immap.h
1 | + | |
2 | +/* | |
3 | + * MPC8xx Internal Memory Map | |
4 | + * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) | |
5 | + * | |
6 | + * The I/O on the MPC860 is comprised of blocks of special registers | |
7 | + * and the dual port ram for the Communication Processor Module. | |
8 | + * Within this space are functional units such as the SIU, memory | |
9 | + * controller, system timers, and other control functions. It is | |
10 | + * a combination that I found difficult to separate into logical | |
11 | + * functional files.....but anyone else is welcome to try. -- Dan | |
12 | + */ | |
13 | +#ifndef __IMMAP_8XX__ | |
14 | +#define __IMMAP_8XX__ | |
15 | + | |
16 | +/* System configuration registers. | |
17 | +*/ | |
18 | +typedef struct sys_conf { | |
19 | + uint sc_siumcr; | |
20 | + uint sc_sypcr; | |
21 | + uint sc_swt; | |
22 | + char res1[2]; | |
23 | + ushort sc_swsr; | |
24 | + uint sc_sipend; | |
25 | + uint sc_simask; | |
26 | + uint sc_siel; | |
27 | + uint sc_sivec; | |
28 | + uint sc_tesr; | |
29 | + char res2[0xc]; | |
30 | + uint sc_sdcr; | |
31 | + char res3[0x4c]; | |
32 | +} sysconf8xx_t; | |
33 | + | |
34 | +/* PCMCIA configuration registers. | |
35 | +*/ | |
36 | +typedef struct pcmcia_conf { | |
37 | + uint pcmc_pbr0; | |
38 | + uint pcmc_por0; | |
39 | + uint pcmc_pbr1; | |
40 | + uint pcmc_por1; | |
41 | + uint pcmc_pbr2; | |
42 | + uint pcmc_por2; | |
43 | + uint pcmc_pbr3; | |
44 | + uint pcmc_por3; | |
45 | + uint pcmc_pbr4; | |
46 | + uint pcmc_por4; | |
47 | + uint pcmc_pbr5; | |
48 | + uint pcmc_por5; | |
49 | + uint pcmc_pbr6; | |
50 | + uint pcmc_por6; | |
51 | + uint pcmc_pbr7; | |
52 | + uint pcmc_por7; | |
53 | + char res1[0x20]; | |
54 | + uint pcmc_pgcra; | |
55 | + uint pcmc_pgcrb; | |
56 | + uint pcmc_pscr; | |
57 | + char res2[4]; | |
58 | + uint pcmc_pipr; | |
59 | + char res3[4]; | |
60 | + uint pcmc_per; | |
61 | + char res4[4]; | |
62 | +} pcmconf8xx_t; | |
63 | + | |
64 | +/* Memory controller registers. | |
65 | +*/ | |
66 | +typedef struct mem_ctlr { | |
67 | + uint memc_br0; | |
68 | + uint memc_or0; | |
69 | + uint memc_br1; | |
70 | + uint memc_or1; | |
71 | + uint memc_br2; | |
72 | + uint memc_or2; | |
73 | + uint memc_br3; | |
74 | + uint memc_or3; | |
75 | + uint memc_br4; | |
76 | + uint memc_or4; | |
77 | + uint memc_br5; | |
78 | + uint memc_or5; | |
79 | + uint memc_br6; | |
80 | + uint memc_or6; | |
81 | + uint memc_br7; | |
82 | + uint memc_or7; | |
83 | + char res1[0x24]; | |
84 | + uint memc_mar; | |
85 | + uint memc_mcr; | |
86 | + char res2[4]; | |
87 | + uint memc_mamr; | |
88 | + uint memc_mbmr; | |
89 | + ushort memc_mstat; | |
90 | + ushort memc_mptpr; | |
91 | + uint memc_mdr; | |
92 | + char res3[0x80]; | |
93 | +} memctl8xx_t; | |
94 | + | |
95 | +/* System Integration Timers. | |
96 | +*/ | |
97 | +typedef struct sys_int_timers { | |
98 | + ushort sit_tbscr; | |
99 | + char res0[0x02]; | |
100 | + uint sit_tbreff0; | |
101 | + uint sit_tbreff1; | |
102 | + char res1[0x14]; | |
103 | + ushort sit_rtcsc; | |
104 | + char res2[0x02]; | |
105 | + uint sit_rtc; | |
106 | + uint sit_rtsec; | |
107 | + uint sit_rtcal; | |
108 | + char res3[0x10]; | |
109 | + ushort sit_piscr; | |
110 | + char res4[2]; | |
111 | + uint sit_pitc; | |
112 | + uint sit_pitr; | |
113 | + char res5[0x34]; | |
114 | +} sit8xx_t; | |
115 | + | |
116 | +#define TBSCR_TBIRQ_MASK ((ushort)0xff00) | |
117 | +#define TBSCR_REFA ((ushort)0x0080) | |
118 | +#define TBSCR_REFB ((ushort)0x0040) | |
119 | +#define TBSCR_REFAE ((ushort)0x0008) | |
120 | +#define TBSCR_REFBE ((ushort)0x0004) | |
121 | +#define TBSCR_TBF ((ushort)0x0002) | |
122 | +#define TBSCR_TBE ((ushort)0x0001) | |
123 | + | |
124 | +#define RTCSC_RTCIRQ_MASK ((ushort)0xff00) | |
125 | +#define RTCSC_SEC ((ushort)0x0080) | |
126 | +#define RTCSC_ALR ((ushort)0x0040) | |
127 | +#define RTCSC_38K ((ushort)0x0010) | |
128 | +#define RTCSC_SIE ((ushort)0x0008) | |
129 | +#define RTCSC_ALE ((ushort)0x0004) | |
130 | +#define RTCSC_RTF ((ushort)0x0002) | |
131 | +#define RTCSC_RTE ((ushort)0x0001) | |
132 | + | |
133 | +#define PISCR_PIRQ_MASK ((ushort)0xff00) | |
134 | +#define PISCR_PS ((ushort)0x0080) | |
135 | +#define PISCR_PIE ((ushort)0x0004) | |
136 | +#define PISCR_PTF ((ushort)0x0002) | |
137 | +#define PISCR_PTE ((ushort)0x0001) | |
138 | + | |
139 | +/* Clocks and Reset. | |
140 | +*/ | |
141 | +typedef struct clk_and_reset { | |
142 | + uint car_sccr; | |
143 | + uint car_plprcr; | |
144 | + uint car_rsr; | |
145 | + char res[0x74]; /* Reserved area */ | |
146 | +} car8xx_t; | |
147 | + | |
148 | +/* System Integration Timers keys. | |
149 | +*/ | |
150 | +typedef struct sitk { | |
151 | + uint sitk_tbscrk; | |
152 | + uint sitk_tbreff0k; | |
153 | + uint sitk_tbreff1k; | |
154 | + uint sitk_tbk; | |
155 | + char res1[0x10]; | |
156 | + uint sitk_rtcsck; | |
157 | + uint sitk_rtck; | |
158 | + uint sitk_rtseck; | |
159 | + uint sitk_rtcalk; | |
160 | + char res2[0x10]; | |
161 | + uint sitk_piscrk; | |
162 | + uint sitk_pitck; | |
163 | + char res3[0x38]; | |
164 | +} sitk8xx_t; | |
165 | + | |
166 | +/* Clocks and reset keys. | |
167 | +*/ | |
168 | +typedef struct cark { | |
169 | + uint cark_sccrk; | |
170 | + uint cark_plprcrk; | |
171 | + uint cark_rsrk; | |
172 | + char res[0x474]; | |
173 | +} cark8xx_t; | |
174 | + | |
175 | +/* The key to unlock registers maintained by keep-alive power. | |
176 | +*/ | |
177 | +#define KAPWR_KEY ((unsigned int)0x55ccaa33) | |
178 | + | |
179 | +/* Video interface. MPC823 Only. | |
180 | +*/ | |
181 | +typedef struct vid823 { | |
182 | + ushort vid_vccr; | |
183 | + ushort res1; | |
184 | + u_char vid_vsr; | |
185 | + u_char res2; | |
186 | + u_char vid_vcmr; | |
187 | + u_char res3; | |
188 | + uint vid_vbcb; | |
189 | + uint res4; | |
190 | + uint vid_vfcr0; | |
191 | + uint vid_vfaa0; | |
192 | + uint vid_vfba0; | |
193 | + uint vid_vfcr1; | |
194 | + uint vid_vfaa1; | |
195 | + uint vid_vfba1; | |
196 | + u_char res5[0x18]; | |
197 | +} vid823_t; | |
198 | + | |
199 | +/* LCD interface. 823 Only. | |
200 | +*/ | |
201 | +typedef struct lcd { | |
202 | + uint lcd_lccr; | |
203 | + uint lcd_lchcr; | |
204 | + uint lcd_lcvcr; | |
205 | + char res1[4]; | |
206 | + uint lcd_lcfaa; | |
207 | + uint lcd_lcfba; | |
208 | + char lcd_lcsr; | |
209 | + char res2[0x7]; | |
210 | +} lcd823_t; | |
211 | + | |
212 | +/* I2C | |
213 | +*/ | |
214 | +typedef struct i2c { | |
215 | + u_char i2c_i2mod; | |
216 | + char res1[3]; | |
217 | + u_char i2c_i2add; | |
218 | + char res2[3]; | |
219 | + u_char i2c_i2brg; | |
220 | + char res3[3]; | |
221 | + u_char i2c_i2com; | |
222 | + char res4[3]; | |
223 | + u_char i2c_i2cer; | |
224 | + char res5[3]; | |
225 | + u_char i2c_i2cmr; | |
226 | + char res6[0x8b]; | |
227 | +} i2c8xx_t; | |
228 | + | |
229 | +/* DMA control/status registers. | |
230 | +*/ | |
231 | +typedef struct sdma_csr { | |
232 | + char res1[4]; | |
233 | + uint sdma_sdar; | |
234 | + u_char sdma_sdsr; | |
235 | + char res3[3]; | |
236 | + u_char sdma_sdmr; | |
237 | + char res4[3]; | |
238 | + u_char sdma_idsr1; | |
239 | + char res5[3]; | |
240 | + u_char sdma_idmr1; | |
241 | + char res6[3]; | |
242 | + u_char sdma_idsr2; | |
243 | + char res7[3]; | |
244 | + u_char sdma_idmr2; | |
245 | + char res8[0x13]; | |
246 | +} sdma8xx_t; | |
247 | + | |
248 | +/* Communication Processor Module Interrupt Controller. | |
249 | +*/ | |
250 | +typedef struct cpm_ic { | |
251 | + ushort cpic_civr; | |
252 | + char res[0xe]; | |
253 | + uint cpic_cicr; | |
254 | + uint cpic_cipr; | |
255 | + uint cpic_cimr; | |
256 | + uint cpic_cisr; | |
257 | +} cpic8xx_t; | |
258 | + | |
259 | +/* Input/Output Port control/status registers. | |
260 | +*/ | |
261 | +typedef struct io_port { | |
262 | + ushort iop_padir; | |
263 | + ushort iop_papar; | |
264 | + ushort iop_paodr; | |
265 | + ushort iop_padat; | |
266 | + char res1[8]; | |
267 | + ushort iop_pcdir; | |
268 | + ushort iop_pcpar; | |
269 | + ushort iop_pcso; | |
270 | + ushort iop_pcdat; | |
271 | + ushort iop_pcint; | |
272 | + char res2[6]; | |
273 | + ushort iop_pddir; | |
274 | + ushort iop_pdpar; | |
275 | + char res3[2]; | |
276 | + ushort iop_pddat; | |
277 | + uint utmode; | |
278 | + char res4[4]; | |
279 | +} iop8xx_t; | |
280 | + | |
281 | +/* Communication Processor Module Timers | |
282 | +*/ | |
283 | +typedef struct cpm_timers { | |
284 | + ushort cpmt_tgcr; | |
285 | + char res1[0xe]; | |
286 | + ushort cpmt_tmr1; | |
287 | + ushort cpmt_tmr2; | |
288 | + ushort cpmt_trr1; | |
289 | + ushort cpmt_trr2; | |
290 | + ushort cpmt_tcr1; | |
291 | + ushort cpmt_tcr2; | |
292 | + ushort cpmt_tcn1; | |
293 | + ushort cpmt_tcn2; | |
294 | + ushort cpmt_tmr3; | |
295 | + ushort cpmt_tmr4; | |
296 | + ushort cpmt_trr3; | |
297 | + ushort cpmt_trr4; | |
298 | + ushort cpmt_tcr3; | |
299 | + ushort cpmt_tcr4; | |
300 | + ushort cpmt_tcn3; | |
301 | + ushort cpmt_tcn4; | |
302 | + ushort cpmt_ter1; | |
303 | + ushort cpmt_ter2; | |
304 | + ushort cpmt_ter3; | |
305 | + ushort cpmt_ter4; | |
306 | + char res2[8]; | |
307 | +} cpmtimer8xx_t; | |
308 | + | |
309 | +/* Finally, the Communication Processor stuff..... | |
310 | +*/ | |
311 | +typedef struct scc { /* Serial communication channels */ | |
312 | + uint scc_gsmrl; | |
313 | + uint scc_gsmrh; | |
314 | + ushort scc_psmr; | |
315 | + char res1[2]; | |
316 | + ushort scc_todr; | |
317 | + ushort scc_dsr; | |
318 | + ushort scc_scce; | |
319 | + char res2[2]; | |
320 | + ushort scc_sccm; | |
321 | + char res3; | |
322 | + u_char scc_sccs; | |
323 | + char res4[8]; | |
324 | +} scc_t; | |
325 | + | |
326 | +typedef struct smc { /* Serial management channels */ | |
327 | + char res1[2]; | |
328 | + ushort smc_smcmr; | |
329 | + char res2[2]; | |
330 | + u_char smc_smce; | |
331 | + char res3[3]; | |
332 | + u_char smc_smcm; | |
333 | + char res4[5]; | |
334 | +} smc_t; | |
335 | + | |
336 | +/* MPC860T Fast Ethernet Controller. It isn't part of the CPM, but | |
337 | + * it fits within the address space. | |
338 | + */ | |
339 | + | |
340 | +typedef struct fec { | |
341 | + uint fec_addr_low; /* lower 32 bits of station address */ | |
342 | + ushort fec_addr_high; /* upper 16 bits of station address */ | |
343 | + ushort res1; /* reserved */ | |
344 | + uint fec_hash_table_high; /* upper 32-bits of hash table */ | |
345 | + uint fec_hash_table_low; /* lower 32-bits of hash table */ | |
346 | + uint fec_r_des_start; /* beginning of Rx descriptor ring */ | |
347 | + uint fec_x_des_start; /* beginning of Tx descriptor ring */ | |
348 | + uint fec_r_buff_size; /* Rx buffer size */ | |
349 | + uint res2[9]; /* reserved */ | |
350 | + uint fec_ecntrl; /* ethernet control register */ | |
351 | + uint fec_ievent; /* interrupt event register */ | |
352 | + uint fec_imask; /* interrupt mask register */ | |
353 | + uint fec_ivec; /* interrupt level and vector status */ | |
354 | + uint fec_r_des_active; /* Rx ring updated flag */ | |
355 | + uint fec_x_des_active; /* Tx ring updated flag */ | |
356 | + uint res3[10]; /* reserved */ | |
357 | + uint fec_mii_data; /* MII data register */ | |
358 | + uint fec_mii_speed; /* MII speed control register */ | |
359 | + uint res4[17]; /* reserved */ | |
360 | + uint fec_r_bound; /* end of RAM (read-only) */ | |
361 | + uint fec_r_fstart; /* Rx FIFO start address */ | |
362 | + uint res5[6]; /* reserved */ | |
363 | + uint fec_x_fstart; /* Tx FIFO start address */ | |
364 | + uint res6[17]; /* reserved */ | |
365 | + uint fec_fun_code; /* fec SDMA function code */ | |
366 | + uint res7[3]; /* reserved */ | |
367 | + uint fec_r_cntrl; /* Rx control register */ | |
368 | + uint fec_r_hash; /* Rx hash register */ | |
369 | + uint res8[14]; /* reserved */ | |
370 | + uint fec_x_cntrl; /* Tx control register */ | |
371 | + uint res9[0x1e]; /* reserved */ | |
372 | +} fec_t; | |
373 | + | |
374 | +/* The FEC and LCD color map share the same address space.... | |
375 | + * I guess we will never see an 823T :-). | |
376 | + */ | |
377 | +union fec_lcd { | |
378 | + fec_t fl_un_fec; | |
379 | + u_char fl_un_cmap[0x200]; | |
380 | +}; | |
381 | + | |
382 | +typedef struct comm_proc { | |
383 | + /* General control and status registers. | |
384 | + */ | |
385 | + ushort cp_cpcr; | |
386 | + u_char res1[2]; | |
387 | + ushort cp_rccr; | |
388 | + u_char res2; | |
389 | + u_char cp_rmds; | |
390 | + u_char res3[4]; | |
391 | + ushort cp_cpmcr1; | |
392 | + ushort cp_cpmcr2; | |
393 | + ushort cp_cpmcr3; | |
394 | + ushort cp_cpmcr4; | |
395 | + u_char res4[2]; | |
396 | + ushort cp_rter; | |
397 | + u_char res5[2]; | |
398 | + ushort cp_rtmr; | |
399 | + u_char res6[0x14]; | |
400 | + | |
401 | + /* Baud rate generators. | |
402 | + */ | |
403 | + uint cp_brgc1; | |
404 | + uint cp_brgc2; | |
405 | + uint cp_brgc3; | |
406 | + uint cp_brgc4; | |
407 | + | |
408 | + /* Serial Communication Channels. | |
409 | + */ | |
410 | + scc_t cp_scc[4]; | |
411 | + | |
412 | + /* Serial Management Channels. | |
413 | + */ | |
414 | + smc_t cp_smc[2]; | |
415 | + | |
416 | + /* Serial Peripheral Interface. | |
417 | + */ | |
418 | + ushort cp_spmode; | |
419 | + u_char res7[4]; | |
420 | + u_char cp_spie; | |
421 | + u_char res8[3]; | |
422 | + u_char cp_spim; | |
423 | + u_char res9[2]; | |
424 | + u_char cp_spcom; | |
425 | + u_char res10[2]; | |
426 | + | |
427 | + /* Parallel Interface Port. | |
428 | + */ | |
429 | + u_char res11[2]; | |
430 | + ushort cp_pipc; | |
431 | + u_char res12[2]; | |
432 | + ushort cp_ptpr; | |
433 | + uint cp_pbdir; | |
434 | + uint cp_pbpar; | |
435 | + u_char res13[2]; | |
436 | + ushort cp_pbodr; | |
437 | + uint cp_pbdat; | |
438 | + u_char res14[0x18]; | |
439 | + | |
440 | + /* Serial Interface and Time Slot Assignment. | |
441 | + */ | |
442 | + uint cp_simode; | |
443 | + u_char cp_sigmr; | |
444 | + u_char res15; | |
445 | + u_char cp_sistr; | |
446 | + u_char cp_sicmr; | |
447 | + u_char res16[4]; | |
448 | + uint cp_sicr; | |
449 | + uint cp_sirp; | |
450 | + u_char res17[0xc]; | |
451 | + | |
452 | + /* 256 bytes of MPC823 video controller RAM array. | |
453 | + */ | |
454 | + u_char cp_vcram[0x100]; | |
455 | + u_char cp_siram[0x200]; | |
456 | + | |
457 | + /* The fast ethernet controller is not really part of the CPM, | |
458 | + * but it resides in the address space. | |
459 | + * The LCD color map is also here. | |
460 | + */ | |
461 | + union fec_lcd fl_un; | |
462 | +#define cp_fec fl_un.fl_un_fec | |
463 | +#define lcd_cmap fl_un.fl_un_cmap | |
464 | + char res18[0x1000]; | |
465 | + | |
466 | + /* Dual Ported RAM follows. | |
467 | + * There are many different formats for this memory area | |
468 | + * depending upon the devices used and options chosen. | |
469 | + * Some processors don't have all of it populated. | |
470 | + */ | |
471 | + u_char cp_dpmem[0x1C00]; /* BD / Data / ucode */ | |
472 | + u_char cp_dparam[0x400]; /* Parameter RAM */ | |
473 | +} cpm8xx_t; | |
474 | + | |
475 | +/* Internal memory map. | |
476 | +*/ | |
477 | +typedef struct immap { | |
478 | + sysconf8xx_t im_siu_conf; /* SIU Configuration */ | |
479 | + pcmconf8xx_t im_pcmcia; /* PCMCIA Configuration */ | |
480 | + memctl8xx_t im_memctl; /* Memory Controller */ | |
481 | + sit8xx_t im_sit; /* System integration timers */ | |
482 | + car8xx_t im_clkrst; /* Clocks and reset */ | |
483 | + sitk8xx_t im_sitk; /* Sys int timer keys */ | |
484 | + cark8xx_t im_clkrstk; /* Clocks and reset keys */ | |
485 | + vid823_t im_vid; /* Video (823 only) */ | |
486 | + lcd823_t im_lcd; /* LCD (823 only) */ | |
487 | + i2c8xx_t im_i2c; /* I2C control/status */ | |
488 | + sdma8xx_t im_sdma; /* SDMA control/status */ | |
489 | + cpic8xx_t im_cpic; /* CPM Interrupt Controller */ | |
490 | + iop8xx_t im_ioport; /* IO Port control/status */ | |
491 | + cpmtimer8xx_t im_cpmtimer; /* CPM timers */ | |
492 | + cpm8xx_t im_cpm; /* Communication processor */ | |
493 | +} immap_t; | |
494 | + | |
495 | +#endif /* __IMMAP_8XX__ */ |
tools/gen_eth_addr.c
1 | +/* | |
2 | + * (C) Copyright 2001 | |
3 | + * Murray Jensen <Murray.Jensen@cmst.csiro.au> | |
4 | + * | |
5 | + * See file CREDITS for list of people who contributed to this | |
6 | + * project. | |
7 | + * | |
8 | + * This program is free software; you can redistribute it and/or | |
9 | + * modify it under the terms of the GNU General Public License as | |
10 | + * published by the Free Software Foundation; either version 2 of | |
11 | + * the License, or (at your option) any later version. | |
12 | + * | |
13 | + * This program is distributed in the hope that it will be useful, | |
14 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | + * GNU General Public License for more details. | |
17 | + * | |
18 | + * You should have received a copy of the GNU General Public License | |
19 | + * along with this program; if not, write to the Free Software | |
20 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | + * MA 02111-1307 USA | |
22 | + */ | |
23 | + | |
24 | +#include <stdio.h> | |
25 | +#include <stdlib.h> | |
26 | +#include <unistd.h> | |
27 | +#include <time.h> | |
28 | + | |
29 | +int | |
30 | +main(int argc, char *argv[]) | |
31 | +{ | |
32 | + unsigned long ethaddr_low, ethaddr_high; | |
33 | + | |
34 | + srandom(time(0) | getpid()); | |
35 | + | |
36 | + /* | |
37 | + * setting the 2nd LSB in the most significant byte of | |
38 | + * the address makes it a locally administered ethernet | |
39 | + * address | |
40 | + */ | |
41 | + ethaddr_high = (random() & 0xfeff) | 0x0200; | |
42 | + ethaddr_low = random(); | |
43 | + | |
44 | + printf("%02lx:%02lx:%02lx:%02lx:%02lx:%02lx\n", | |
45 | + ethaddr_high >> 8, ethaddr_high & 0xff, | |
46 | + ethaddr_low >> 24, (ethaddr_low >> 16) & 0xff, | |
47 | + (ethaddr_low >> 8) & 0xff, ethaddr_low & 0xff); | |
48 | + | |
49 | + return (0); | |
50 | +} |