ARM: arm1176: Define arch_cpu_init() at the SoC level

Commit 86c6326 "ARM: arm1176: enable instruction cache in arch_cpu_init()" defined arch_cpu_init() in a file that is shared across all arm1176 SoCs. tnetv107x already implemented this function, which caused linking to break. Move the new conflicting arch_cpu_init() into arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this function is usually defined at the SoC-level, not the CPU-level, at least for ARM. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Marek Vasut <marex@denx.de>

ARM: arm1176: Define arch_cpu_init() at the SoC level
Commit 86c6326 "ARM: arm1176: enable instruction cache in arch_cpu_init()" defined arch_cpu_init() in a file that is shared across all arm1176 SoCs. tnetv107x already implemented this function, which caused linking to break. Move the new conflicting arch_cpu_init() into arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this function is usually defined at the SoC-level, not the CPU-level, at least for ARM. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Marek Vasut <marex@denx.de>
Stephen Warren · Tom Rini
1 parent 5675b50916
Showing 3 changed files with 25 additions and 8 deletions Side-by-side Diff
arch/arm/cpu/arm1176/bcm2835/Makefile
arch/arm/cpu/arm1176/bcm2835/init.c
arch/arm/cpu/arm1176/cpu.c
@@ -17,7 +17,7 @@
 LIB	= $(obj)lib$(SOC).o
  
 SOBJS	:= lowlevel_init.o
-COBJS	:= reset.o timer.o
+COBJS	:= init.o reset.o timer.o
  
 SRCS	:= $(SOBJS:.o=.c) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+
+int arch_cpu_init(void)
+{
+	icache_enable();
+
+	return 0;
+}
@@ -65,11 +65,4 @@
 	/* mem barrier to sync things */
 	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
 }
-
-int arch_cpu_init(void)
-{
-	icache_enable();
-
-	return 0;
-}
...	...	@@ -17,7 +17,7 @@
17	17	LIB = $(obj)lib$(SOC).o
18	18
19	19	SOBJS := lowlevel_init.o
20		-COBJS := reset.o timer.o
	20	+COBJS := init.o reset.o timer.o
21	21
22	22	SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c)
23	23	OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
	1	+/*
	2	+ * (C) Copyright 2012 Stephen Warren
	3	+ *
	4	+ * See file CREDITS for list of people who contributed to this
	5	+ * project.
	6	+ *
	7	+ * This program is free software; you can redistribute it and/or
	8	+ * modify it under the terms of the GNU General Public License
	9	+ * version 2 as published by the Free Software Foundation.
	10	+ *
	11	+ * This program is distributed in the hope that it will be useful, but
	12	+ * WITHOUT ANY WARRANTY; without even the implied warranty of
	13	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	+ * GNU General Public License for more details.
	15	+ */
	16	+
	17	+#include <common.h>
	18	+
	19	+int arch_cpu_init(void)
	20	+{
	21	+ icache_enable();
	22	+
	23	+ return 0;
	24	+}
...	...	@@ -65,11 +65,4 @@
65	65	/* mem barrier to sync things */
66	66	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
67	67	}
68		-
69		-int arch_cpu_init(void)
70		-{
71		- icache_enable();
72		-
73		- return 0;
74		-}