dm: ram: bmips: add BCM6338/BCM6348 support

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>

dm: ram: bmips: add BCM6338/BCM6348 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas · Daniel Schwierzeck
1 parent 2165961c37
Showing 1 changed file with 31 additions and 0 deletions Side-by-side Diff
drivers/ram/bmips_ram.c
@@ -14,6 +14,16 @@
 #include <asm/io.h>
 #include <dm/device.h>
  
+#define SDRAM_CFG_REG		0x0
+#define SDRAM_CFG_COL_SHIFT	4
+#define SDRAM_CFG_COL_MASK	(0x3 << SDRAM_CFG_COL_SHIFT)
+#define SDRAM_CFG_ROW_SHIFT	6
+#define SDRAM_CFG_ROW_MASK	(0x3 << SDRAM_CFG_ROW_SHIFT)
+#define SDRAM_CFG_32B_SHIFT	10
+#define SDRAM_CFG_32B_MASK	(1 << SDRAM_CFG_32B_SHIFT)
+#define SDRAM_CFG_BANK_SHIFT	13
+#define SDRAM_CFG_BANK_MASK	(1 << SDRAM_CFG_BANK_SHIFT)
+
 #define MEMC_CFG_REG		0x4
 #define MEMC_CFG_32B_SHIFT	1
 #define MEMC_CFG_32B_MASK	(1 << MEMC_CFG_32B_SHIFT)
@@ -50,6 +60,20 @@
 	return 1 << (cols + rows + is_32b + banks);
 }
  
+static ulong bcm6338_get_ram_size(struct bmips_ram_priv *priv)
+{
+	unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0;
+	u32 val;
+
+	val = readl_be(priv->regs + SDRAM_CFG_REG);
+	rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT;
+	cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT;
+	is_32b = (val & SDRAM_CFG_32B_MASK) ? 1 : 0;
+	banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
+
+	return bmips_dram_size(cols, rows, is_32b, banks);
+}
+
 static ulong bcm6358_get_ram_size(struct bmips_ram_priv *priv)
 {
 	unsigned int cols = 0, rows = 0, is_32b = 0;
@@ -82,6 +106,10 @@
 	.get_ram_size = bcm6328_get_ram_size,
 };
  
+static const struct bmips_ram_hw bmips_ram_bcm6338 = {
+	.get_ram_size = bcm6338_get_ram_size,
+};
+
 static const struct bmips_ram_hw bmips_ram_bcm6358 = {
 	.get_ram_size = bcm6358_get_ram_size,
 };
@@ -90,6 +118,9 @@
 	{
 		.compatible = "brcm,bcm6328-mc",
 		.data = (ulong)&bmips_ram_bcm6328,
+	}, {
+		.compatible = "brcm,bcm6338-mc",
+		.data = (ulong)&bmips_ram_bcm6338,
 	}, {
 		.compatible = "brcm,bcm6358-mc",
 		.data = (ulong)&bmips_ram_bcm6358,
...	...	@@ -14,6 +14,16 @@
14	14	#include <asm/io.h>
15	15	#include <dm/device.h>
16	16
	17	+#define SDRAM_CFG_REG 0x0
	18	+#define SDRAM_CFG_COL_SHIFT 4
	19	+#define SDRAM_CFG_COL_MASK (0x3 << SDRAM_CFG_COL_SHIFT)
	20	+#define SDRAM_CFG_ROW_SHIFT 6
	21	+#define SDRAM_CFG_ROW_MASK (0x3 << SDRAM_CFG_ROW_SHIFT)
	22	+#define SDRAM_CFG_32B_SHIFT 10
	23	+#define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
	24	+#define SDRAM_CFG_BANK_SHIFT 13
	25	+#define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
	26	+
17	27	#define MEMC_CFG_REG 0x4
18	28	#define MEMC_CFG_32B_SHIFT 1
19	29	#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT)
...	...	@@ -50,6 +60,20 @@
50	60	return 1 << (cols + rows + is_32b + banks);
51	61	}
52	62
	63	+static ulong bcm6338_get_ram_size(struct bmips_ram_priv *priv)
	64	+{
	65	+ unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0;
	66	+ u32 val;
	67	+
	68	+ val = readl_be(priv->regs + SDRAM_CFG_REG);
	69	+ rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT;
	70	+ cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT;
	71	+ is_32b = (val & SDRAM_CFG_32B_MASK) ? 1 : 0;
	72	+ banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
	73	+
	74	+ return bmips_dram_size(cols, rows, is_32b, banks);
	75	+}
	76	+
53	77	static ulong bcm6358_get_ram_size(struct bmips_ram_priv *priv)
54	78	{
55	79	unsigned int cols = 0, rows = 0, is_32b = 0;
...	...	@@ -82,6 +106,10 @@
82	106	.get_ram_size = bcm6328_get_ram_size,
83	107	};
84	108
	109	+static const struct bmips_ram_hw bmips_ram_bcm6338 = {
	110	+ .get_ram_size = bcm6338_get_ram_size,
	111	+};
	112	+
85	113	static const struct bmips_ram_hw bmips_ram_bcm6358 = {
86	114	.get_ram_size = bcm6358_get_ram_size,
87	115	};
...	...	@@ -90,6 +118,9 @@
90	118	{
91	119	.compatible = "brcm,bcm6328-mc",
92	120	.data = (ulong)&bmips_ram_bcm6328,
	121	+ }, {
	122	+ .compatible = "brcm,bcm6338-mc",
	123	+ .data = (ulong)&bmips_ram_bcm6338,
93	124	}, {
94	125	.compatible = "brcm,bcm6358-mc",
95	126	.data = (ulong)&bmips_ram_bcm6358,